Index: trunk/softs/giet_tsar/giet.S
===================================================================
--- trunk/softs/giet_tsar/giet.S	(revision 622)
+++ trunk/softs/giet_tsar/giet.S	(revision 629)
@@ -169,52 +169,52 @@
     /* It depends on both the cluster_xy & local_id,  */
     /* and we must use the physical address extension */
-    mfc0    $10,    $15,    1       /* $10 <= proc_id */
-    andi    $10,    $10,    0x3FF   /* at most 1024 processors */ 
+    mfc0    $10,    $15,    1        /* $10 <= proc_id                                 */
+    andi    $10,    $10,    0x3FF    /* at most 1024 processors                        */ 
     li      $11,    NB_PROCS_MAX
     divu    $10,    $11
-    mflo    $12                      /* $12 <= cluster_xy */
-    mfhi    $13                      /* $13 <= local_id */
-
-    li      $7,     0b011110000000   /* $7 <= PRIO offset */
-    sll     $8,     $13,    2        /* $8 <= local_id*4 */
-    addu    $9,     $7,     $8       /* $9 <= PRIO offset + local_id*4 */
-    la      $27,    seg_xcu_base    
-    addu    $26,    $9,     $27      /* $26 <= seg_icu_base + PRIO offset + local_id*4 */
-
-    /* XCU[cluster_xy] access to get PRIO register value */
-    mtc2    $12,    $24              /* set PADDR extension */
-    lw      $14,    ($26)            /* $14 <= PRIO register value */
-    mtc2    $0,     $24              /* reset PADDR extension */
-
-    /* test PTI, then HWI, then WTI */
-    andi    $27,    $14,    0x1      /* test bit T in PRIO register */
-    bne     $27,    $0,     _int_PTI /* branch to PTI handler */
-    andi    $27,    $14,    0x2      /* test bit W in PRIO register */
-    bne     $27,    $0,     _int_HWI /* branch to HWI handler */
-    andi    $27,    $14,    0x4      /* test bit W in PRIO register */
-    bne     $27,    $0,     _int_WTI /* branch to IPI handler */
+    mflo    $12                      /* $12 <= cluster_xy                              */
+    mfhi    $13                      /* $13 <= local_id                                */
+    la      $14,    seg_xcu_base     /* $14 <= seg_xcu_base                            */
+
+    li      $7,     0b011110000000   /* $7 <= PRIO offset                              */
+    sll     $8,     $13,    2        /* $8 <= local_id*4                               */
+    addu    $9,     $7,     $8       /* $9 <= PRIO offset + local_id*4                 */
+    addu    $26,    $9,     $14      /* $26 <= seg_icu_base + PRIO offset + local_id*4 */
+
+    /* XCU[cluster_xy] access to get PRIO register value                               */
+    mtc2    $12,    $24              /* set PADDR extension                            */
+    lw      $15,    ($26)            /* $15 <= PRIO register value                     */
+    mtc2    $0,     $24              /* reset PADDR extension                          */
+
+    /* test PTI, then HWI, then WTI                                                    */
+    andi    $27,    $15,    0x1      /* test bit T in PRIO register                    */
+    bne     $27,    $0,     _int_PTI /* branch to PTI handler                          */
+    andi    $27,    $15,    0x2      /* test bit W in PRIO register                    */
+    bne     $27,    $0,     _int_HWI /* branch to HWI handler                          */
+    andi    $27,    $15,    0x4      /* test bit W in PRIO register                    */
+    bne     $27,    $0,     _int_WTI /* branch to WTI handler                          */
     
     /* exit interrupt handler: restore registers */
 _int_restore:
     .set noat
-    lw      $1,     4*4($29)         /* restore $1 */
+    lw      $1,     4*4($29)
     .set at
-    lw      $2,     4*5($29)         /* restore $2 */
-    lw      $3,     4*6($29)         /* restore $3 */
-    lw      $4,     4*7($29)         /* restore $4 */
-    lw      $5,     4*8($29)         /* restore $5 */
-    lw      $6,     4*9($29)         /* restore $6 */
-    lw      $7,     4*10($29)        /* restore $7 */
-    lw      $8,     4*11($29)        /* restore $8 */
-    lw      $9,     4*12($29)        /* restore $9 */
-    lw      $10,    4*13($29)        /* restore $10 */
-    lw      $11,    4*14($29)        /* restore $11 */
-    lw      $12,    4*15($29)        /* restore $12 */
-    lw      $13,    4*16($29)        /* restore $13 */
-    lw      $14,    4*17($29)        /* restore $14 */
-    lw      $15,    4*18($29)        /* restore $15 */
-    lw      $24,    4*19($29)        /* restore $24 */
-    lw      $25,    4*20($29)        /* restore $25 */
-    lw      $31,    4*21($29)        /* restore $31 */
+    lw      $2,     4*5($29) 
+    lw      $3,     4*6($29) 
+    lw      $4,     4*7($29)
+    lw      $5,     4*8($29) 
+    lw      $6,     4*9($29)
+    lw      $7,     4*10($29) 
+    lw      $8,     4*11($29)
+    lw      $9,     4*12($29)
+    lw      $10,    4*13($29)
+    lw      $11,    4*14($29)
+    lw      $12,    4*15($29)
+    lw      $13,    4*16($29)
+    lw      $14,    4*17($29)
+    lw      $15,    4*18($29)
+    lw      $24,    4*19($29)
+    lw      $25,    4*20($29)
+    lw      $31,    4*21($29)
     lw      $27,    4*22($29)        /* get EPC */ 
     addiu   $29,    $29,    23*4     /* restore SP */
@@ -222,30 +222,50 @@
     eret                             /* exit GIET */
 
+    /* The PTI handler get PTI index, */
+    /* acknowledge the PTI register   */
+    /* and call the corresponding ISR */
 _int_PTI:
-    srl     $26,    $14,    6        /* $26 <= (PRIO>>6  = PTI index) */ 
-    j       _int_call_isr
-    nop
-
-_int_HWI:
-    srl     $26,    $14,    14       /* $26 <= (PRIO>>14 = HWI index) */
-    j       _int_call_isr
-    nop
-
-_int_WTI:
-    srl     $26,    $14,    22       /* $26 <= (PRIO>>22 = WTI index) */
-    j       _int_call_isr
-    nop
-    
-    /* Call the relevant ISR */
-_int_call_isr:
-    andi    $26,    $26,    0x7C     /* $26 <= interrupt_index * 4 */
+    srl     $26,    $15,    6        /* $26 <= PRIO >> 6             */
+    andi    $26,    $26,    0x7C     /* $26 <= PTI_INDEX * 4         */
+    addi    $27,    $14,    0x180    /* $27 <= &PTI_ACK[0]           */
+    add     $27,    $27,    $26      /* $27 <= &PTI_ACK[PTI_INDEX]   */
+    lw      $0,     ($27)            /* acknowledge XICU PTI         */
     la      $27,    _interrupt_vector
     addu    $26,    $26,    $27
-    lw      $26,    ($26)            /* read ISR address */ 
-    jalr    $26                      /* call ISR */
-    nop
-    j       _int_restore
-    nop
-
+    lw      $26,    ($26)            /* read ISR address             */ 
+    jalr    $26                      /* call ISR                     */
+    nop
+    j       _int_restore             /* return from INT handler      */
+    nop
+
+    /* The HWI handler get HWI index  */
+    /* and call the corresponding ISR */
+_int_HWI:
+    srl     $26,    $15,    14       /* $26 <= PRIO >> 14            */
+    andi    $26,    $26,    0x7C     /* $26 <= HWI_INDEX * 4         */
+    la      $27,    _interrupt_vector
+    addu    $26,    $26,    $27      /* $26 <= &ISR[HWI_INDEX        */
+    lw      $26,    ($26)            /* read ISR address             */ 
+    jalr    $26                      /* call ISR                     */
+    nop
+    j       _int_restore             /* return from INT handler      */
+    nop
+
+    /* The WTI handler get WTI index, */
+    /* acknowledge the WTI register   */
+    /* and call the corresponding ISR */
+_int_WTI:
+    srl     $26,    $15,    22       /* $26 <= PRIO >> 22            */
+    andi    $26,    $26,    0x7C     /* $26 <= WTI_INDEX * 4         */
+    add     $27,    $14,    $26      /* $27 <= &WTI_REG[WTI_INDEX]   */
+    lw      $0,     ($27)            /* acknowledge XICU WTI         */
+    la      $27,    _interrupt_vector
+    addu    $26,    $26,    $27      /* $26 <= &ISR[WTI_INDEX]       */
+    lw      $26,    ($26)            /* read ISR address             */ 
+    jalr    $26                      /* call ISR                     */
+    nop
+    j       _int_restore             /* return from INT handler */
+    nop
+    
 /* The default ISR is called when no specific ISR has been installed */
 /* in the interrupt vector. It simply displays a message on TTY0     */
