Changeset 646 for branches/RWT/modules/vci_mem_cache

Timestamp:

Feb 28, 2014, 4:45:35 PM (11 years ago)

Author:

haoliu

Message:

(RWT) merging the lastest modification in trunk:

Modification in vci_cc_vcache_wrapper:
a) Non cacheable write request will not any more be sent by multi_write_buffer.

A write non cacheable access is retreated with a synchronous way, like the
read non cacheable access. When Cache L1 receives a write non cacheable request,
it will block the processor until the response of this request arrives.
The advantage of this method is that the cache L1 can supply the virtual address
to OS when it receives a bus error response.

b) In VCI_CMD_STATE, the unc_read request will not check the multi_write_buffer for

an matching address. But the CAS and SC request must be check this point
before sent to the target.

Modifcation in vci_mem_cache:
Change an assert in memcache for the modification in cache L1(UNC WRITE)

File:

• branches/RWT/modules/vci_mem_cache/caba/source/src/vci_mem_cache.cpp (modified) (1 diff)

branches/RWT/modules/vci_mem_cache/caba/source/src/vci_mem_cache.cpp

@@ -1404 +1404 @@
                             // ==> TYPE_WRITE = X100 with the TSAR encoding
                             // ==> mask = 0b0111 = 0x7
-                            assert(((p_vci_tgt.pktid.read() & 0x7) == 0x4) and
+                            assert(((p_vci_tgt.pktid.read() & 0x7) == 0x4 or (p_vci_tgt.pktid.read() == 0x0)) and
                                     "The type specified in the pktid field is incompatible with the WRITE CMD");
                             r_tgt_cmd_fsm = TGT_CMD_WRITE;