Changeset 653 for trunk/softs/tsar_boot/conf/platform_tsarv4_mono_mmu_ioc
- Timestamp:
- Mar 3, 2014, 5:11:06 PM (11 years ago)
- Location:
- trunk/softs/tsar_boot/conf/platform_tsarv4_mono_mmu_ioc
- Files:
-
- 2 edited
Legend:
- Unmodified
- Added
- Removed
-
trunk/softs/tsar_boot/conf/platform_tsarv4_mono_mmu_ioc/defs_platform.h
r568 r653 1 #define NB_PROCS 12 #define NB_CLUSTERS 11 #define NB_PROCS 1 2 #define NB_CLUSTERS 1 3 3 4 #define IRQ_PER_PROC 14 #define IRQ_PER_PROC 1 5 5 6 #define USE_IOB 0 7 #define CACHE_COHERENCE 1 8 #define CACHE_LINE_SIZE 64 // bytes (ie 16 x 32-bit word) 6 #define USE_IOB 0 7 #define CACHE_COHERENCE 1 8 #define CACHE_LINE_SIZE 64 // bytes (ie 16 x 32-bit word) 9 #define RESET_DEBUG 0 9 10 10 #define BOOT_DEBUG 1 11 #define BOOT_DEBUG_IOC 0 12 13 #define TTY_BASE 0x20000000 14 #define ICU_BASE 0x30000000 15 #define IOC_BASE 0x40000000 16 #define MCC_BASE 0xFFFFFFFF // not used 11 #define TTY_PADDR_BASE 0x20000000 12 #define ICU_PADDR_BASE 0x30000000 13 #define IOC_PADDR_BASE 0x40000000 14 #define MCC_PADDR_BASE 0xFFFFFFFF // not used 15 #define RDK_PADDR_BASE 0xFFFFFFFF // not used -
trunk/softs/tsar_boot/conf/platform_tsarv4_mono_mmu_ioc/ldscript
r563 r653 5 5 **********************************************************/ 6 6 7 /* Definition of the base address for all segments*/7 /* Definition of the base address for code segment */ 8 8 9 seg_stack_base = 0x10000000 - 0x8000 - 0x4; 10 seg_boot_base = 0xBFC00000; /* le code de boot */ 9 seg_reset_boot_base = 0xBFC00000; /* le code de boot */ 10 11 seg_reset_stack_base = 0x10000000 - 0x8000 - 0x4; 12 seg_reset_stack_base = 0x00008000; 11 13 12 14 /* Grouping sections into segments */ 13 15 14 ENTRY(boot) 16 ENTRY(reset) 17 15 18 SECTIONS 16 19 { 17 . = seg_ boot_base;18 .text : {19 *(.boot)20 . = seg_reset_code_base; 21 .text : 22 { 20 23 *(.reset) 21 22 23 24 25 24 *(.rodata) 25 *(.rodata.*) 26 . = ALIGN(0x4); 27 dtb_addr = .; 28 INCLUDE "build/platform.ld"; 26 29 } 27 30 28 . = seg_stack_base; 29 .bss ALIGN(0x4) (NOLOAD) : { 31 . = seg_reset_stack_base; 32 .bss ALIGN(0x4) (NOLOAD) : 33 { 30 34 *(.data) 31 35 *(.bss)
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