Changeset 658
- Timestamp:
- Mar 7, 2014, 10:29:22 AM (11 years ago)
- Location:
- branches/fault_tolerance/platform/tsar_generic_iob
- Files:
-
- 7 edited
Legend:
- Unmodified
- Added
- Removed
-
branches/fault_tolerance/platform/tsar_generic_iob/Makefile
r652 r658 4 4 MAKE := make 5 5 TARGET := simul.x 6 ARGS ?= 6 7 7 8 all: $(TARGET) preloader tags … … 37 38 SIMULATOR_ARGS += -DISK soft/disk.dmg 38 39 SIMULATOR_ARGS += -XSIZE 2 -YSIZE 2 -NPROCS 1 40 SIMULATOR_ARGS += $(ARGS) 39 41 40 42 run: $(TARGET) $(PRELOADER_NAME) -
branches/fault_tolerance/platform/tsar_generic_iob/conf/preloader_4c1p/defs_platform.h
r648 r658 14 14 #define IOC_PADDR_BASE 0xB3000000 15 15 #define TTY_PADDR_BASE 0xB4000000 16 #define RDK_PADDR_BASE 0xFFFFFFFF // not used 16 17 17 18 #define SYSCLK_FREQ 50000000 -
branches/fault_tolerance/platform/tsar_generic_iob/top.cpp
r648 r658 126 126 #include "vci_multi_tty.h" 127 127 #include "vci_multi_nic.h" 128 #include "vci_simple_rom.h"129 128 #include "vci_block_device_tsar.h" 130 129 #include "vci_framebuffer.h" … … 233 232 234 233 #define BROM_BASE 0x00BFC00000 235 #define BROM_SIZE 0x0000 100000 // 1 MKbytes234 #define BROM_SIZE 0x0000010000 // 64 Kbytes 236 235 237 236 #define IOBX_BASE 0x00BE000000 238 #define IOBX_SIZE 0x0000001000 // 4 KKbytes237 #define IOBX_SIZE 0x0000001000 // 4 Kbytes 239 238 240 239 #define BDEV_BASE 0x00B3000000 241 #define BDEV_SIZE 0x0000008000 // 4 Kbytes240 #define BDEV_SIZE 0x0000008000 // 4 Kbytes 242 241 243 242 #define MTTY_BASE 0x00B4000000 … … 305 304 #define INT_MEMC_TGT_ID 0 306 305 #define INT_XICU_TGT_ID 1 307 #define INT_MDMA_TGT_ID 2 308 #define INT_IOBX_TGT_ID 3 306 #define INT_BROM_TGT_ID 2 307 #define INT_MDMA_TGT_ID 3 308 #define INT_IOBX_TGT_ID 4 309 309 310 310 #define INT_PROC_INI_ID 0 // from 0 to 7 … … 331 331 #define IOX_MNIC_TGT_ID 4 332 332 #define IOX_CDMA_TGT_ID 5 333 #define IOX_BROM_TGT_ID 6 334 #define IOX_MTTY_TGT_ID 7 333 #define IOX_MTTY_TGT_ID 6 335 334 336 335 #define IOX_IOB0_INI_ID 0 // Don't change this value … … 552 551 bool cacheable = true; 553 552 554 // the f ourfollowing segments are defined in all clusters553 // the five following segments are defined in all clusters 555 554 556 555 std::ostringstream smemc_conf; … … 572 571 not cacheable)); 573 572 573 std::ostringstream sbrom; 574 sbrom << "int_seg_brom_" << x << "_" << y; 575 maptab_int.add(Segment(sbrom.str(), BROM_BASE+offset, BROM_SIZE, 576 IntTab(cluster(x,y),INT_BROM_TGT_ID), 577 cacheable)); 578 574 579 std::ostringstream smdma; 575 580 smdma << "int_seg_mdma_" << x << "_" << y; … … 611 616 IntTab(cluster(x,y), INT_IOBX_TGT_ID), 612 617 not cacheable)); 613 614 std::ostringstream srom;615 srom << "int_seg_brom_" << x << "_" << y;616 maptab_int.add(Segment(srom.str(), BROM_BASE+offset, BROM_SIZE,617 IntTab(cluster(x,y), INT_IOBX_TGT_ID),618 cacheable ));619 618 620 619 std::ostringstream sdma; … … 728 727 maptab_iox.add(Segment("iox_seg_cdma_1", CDMA_BASE + iob1_base, CDMA_SIZE, 729 728 IntTab(cluster_iob1, IOX_CDMA_TGT_ID), false)); 730 maptab_iox.add(Segment("iox_seg_brom_0", BROM_BASE + iob0_base, BROM_SIZE,731 IntTab(cluster_iob0,IOX_BROM_TGT_ID), false));732 maptab_iox.add(Segment("iox_seg_brom_1", BROM_BASE + iob1_base, BROM_SIZE,733 IntTab(cluster_iob1,IOX_BROM_TGT_ID), false));734 729 735 730 // Each physical RAM can be accessed through IOB0, or through IOB1. … … 832 827 VciSignals<vci_param_ext> signal_vci_tgt_fbuf("signal_vci_tgt_fbuf"); 833 828 VciSignals<vci_param_ext> signal_vci_tgt_mnic("signal_vci_tgt_mnic"); 834 VciSignals<vci_param_ext> signal_vci_tgt_brom("signal_vci_tgt_brom");835 829 VciSignals<vci_param_ext> signal_vci_tgt_bdev("signal_vci_tgt_bdev"); 836 830 VciSignals<vci_param_ext> signal_vci_tgt_cdma("signal_vci_tgt_cdma"); … … 947 941 iox_network = new VciIoxNetwork<vci_param_ext>("iox_network", 948 942 maptab_iox, 949 8, // number of targets943 7, // number of targets 950 944 4 ); // number of initiators 951 // boot ROM 952 VciSimpleRom<vci_param_ext>* brom; 953 brom = new VciSimpleRom<vci_param_ext>("brom", 954 IntTab(0, IOX_BROM_TGT_ID), 955 maptab_iox, 956 loader ); 945 957 946 // Network Controller 958 947 VciMultiNic<vci_param_ext>* mnic; … … 1060 1049 .int_mdma_tgtid = INT_MDMA_TGT_ID, 1061 1050 .int_iobx_tgtid = INT_IOBX_TGT_ID, 1051 .int_brom_tgtid = INT_BROM_TGT_ID, 1062 1052 .int_proc_srcid = INT_PROC_INI_ID, 1063 1053 .int_mdma_srcid = INT_MDMA_INI_ID, … … 1109 1099 iox_network->p_to_tgt[IOX_FBUF_TGT_ID] (signal_vci_tgt_fbuf); 1110 1100 iox_network->p_to_tgt[IOX_MNIC_TGT_ID] (signal_vci_tgt_mnic); 1111 iox_network->p_to_tgt[IOX_BROM_TGT_ID] (signal_vci_tgt_brom);1112 1101 iox_network->p_to_tgt[IOX_BDEV_TGT_ID] (signal_vci_tgt_bdev); 1113 1102 iox_network->p_to_tgt[IOX_CDMA_TGT_ID] (signal_vci_tgt_cdma); … … 1144 1133 1145 1134 std::cout << " - MNIC connected" << std::endl; 1146 1147 // BROM connexion1148 brom->p_clk (signal_clk);1149 brom->p_resetn (signal_resetn);1150 brom->p_vci (signal_vci_tgt_brom);1151 1152 std::cout << " - BROM connected" << std::endl;1153 1135 1154 1136 // MTTY connexion … … 1635 1617 signal_vci_ini_cdma.print_trace("[SIG]IOX_CDMA_INI"); 1636 1618 1637 // brom->print_trace();1638 // signal_vci_tgt_brom.print_trace("[SIG]IOX_BROM_TGT");1639 1640 1619 // mtty->print_trace(); 1641 1620 // signal_vci_tgt_mtty.print_trace("[SIG]IOX_MTTY_TGT"); … … 1660 1639 1661 1640 delete iox_network; 1662 delete brom;1663 1641 delete mnic; 1664 1642 delete fbuf; -
branches/fault_tolerance/platform/tsar_generic_iob/top.desc
r450 r658 40 40 cell_size = vci_cell_size_ext), 41 41 42 # ROM43 Uses('caba:vci_simple_rom',44 cell_size = vci_cell_size_ext),45 46 42 # Frame Buffer 47 43 Uses('caba:vci_framebuffer', -
branches/fault_tolerance/platform/tsar_generic_iob/tsar_iob_cluster/caba/metadata/tsar_iob_cluster.sd
r550 r658 45 45 46 46 Uses('caba:vci_xicu', 47 cell_size = parameter.Reference('vci_data_width_int')), 48 49 Uses('caba:vci_simple_rom', 47 50 cell_size = parameter.Reference('vci_data_width_int')), 48 51 -
branches/fault_tolerance/platform/tsar_generic_iob/tsar_iob_cluster/caba/source/include/tsar_iob_cluster.h
r648 r658 21 21 #include "mips32.h" 22 22 #include "vci_simple_ram.h" 23 #include "vci_simple_rom.h" 23 24 #include "vci_xicu.h" 24 25 #include "dspin_local_crossbar.h" … … 102 103 VciSignals<vci_param_int> signal_int_vci_tgt_memc; 103 104 VciSignals<vci_param_int> signal_int_vci_tgt_xicu; 105 VciSignals<vci_param_int> signal_int_vci_tgt_brom; 104 106 VciSignals<vci_param_int> signal_int_vci_tgt_mdma; 105 107 VciSignals<vci_param_int> signal_int_vci_tgt_iobx; … … 118 120 DspinSignals<dspin_int_cmd_width> signal_int_dspin_cmd_xicu_t; 119 121 DspinSignals<dspin_int_rsp_width> signal_int_dspin_rsp_xicu_t; 122 DspinSignals<dspin_int_cmd_width> signal_int_dspin_cmd_brom_t; 123 DspinSignals<dspin_int_rsp_width> signal_int_dspin_rsp_brom_t; 120 124 DspinSignals<dspin_int_cmd_width> signal_int_dspin_cmd_mdma_t; 121 125 DspinSignals<dspin_int_rsp_width> signal_int_dspin_rsp_mdma_t; … … 179 183 VciIntDspinTargetWrapperType* mdma_int_wt; 180 184 185 VciSimpleRom<vci_param_int>* brom; 186 VciIntDspinTargetWrapperType* brom_int_wt; 187 181 188 DspinLocalCrossbar<dspin_int_cmd_width>* int_xbar_cmd_d; 182 189 DspinLocalCrossbar<dspin_int_rsp_width>* int_xbar_rsp_d; … … 225 232 size_t int_mdma_tgtid; 226 233 size_t int_iobx_tgtid; 234 size_t int_brom_tgtid; 227 235 size_t int_proc_srcid; 228 236 size_t int_mdma_srcid; -
branches/fault_tolerance/platform/tsar_generic_iob/tsar_iob_cluster/caba/source/src/tsar_iob_cluster.cpp
r648 r658 160 160 params.x_width + params.y_width + params.l_width); 161 161 162 /////////// LOCAL ROM 163 brom = new VciSimpleRom<vci_param_int>( 164 "brom", 165 IntTab(cluster_id, params.int_brom_tgtid), 166 params.mt_int, 167 params.loader, 168 params.x_width + params.y_width); 169 170 std::ostringstream s_wt_brom; 171 s_wt_brom << "brom_wt_" << params.x_id << "_" << params.y_id; 172 brom_int_wt = new VciIntDspinTargetWrapperType ( 173 s_wt_brom.str().c_str(), 174 params.x_width + params.y_width + params.l_width); 175 162 176 /////////// XICU 163 177 std::ostringstream s_xicu; … … 201 215 /////////// Direct LOCAL_XBAR(S) 202 216 size_t nb_direct_initiators = params.nb_procs + 1; 203 size_t nb_direct_targets = 3;217 size_t nb_direct_targets = 4; 204 218 if ((cluster_id == cluster_iob0) or (cluster_id == cluster_iob1)) 205 219 { 206 220 nb_direct_initiators = params.nb_procs + 2; 207 nb_direct_targets = 4;221 nb_direct_targets = 5; 208 222 } 209 223 … … 462 476 int_xbar_cmd_d->p_local_out[params.int_xicu_tgtid]( 463 477 signal_int_dspin_cmd_xicu_t); 478 int_xbar_cmd_d->p_local_out[params.int_brom_tgtid]( 479 signal_int_dspin_cmd_brom_t); 464 480 int_xbar_cmd_d->p_local_out[params.int_mdma_tgtid]( 465 481 signal_int_dspin_cmd_mdma_t); … … 490 506 int_xbar_rsp_d->p_local_in[params.int_xicu_tgtid]( 491 507 signal_int_dspin_rsp_xicu_t); 508 int_xbar_rsp_d->p_local_in[params.int_brom_tgtid]( 509 signal_int_dspin_rsp_brom_t); 492 510 int_xbar_rsp_d->p_local_in[params.int_mdma_tgtid]( 493 511 signal_int_dspin_rsp_mdma_t); … … 609 627 memc_ram_wi->p_vci (signal_ram_vci_ini_memc); 610 628 629 //////////////////////////////////// BROM 630 brom->p_clk (this->p_clk); 631 brom->p_resetn (this->p_resetn); 632 brom->p_vci (signal_int_vci_tgt_brom); 633 634 //wrapper to INT network 635 brom_int_wt->p_clk (this->p_clk); 636 brom_int_wt->p_resetn (this->p_resetn); 637 brom_int_wt->p_dspin_cmd (signal_int_dspin_cmd_brom_t); 638 brom_int_wt->p_dspin_rsp (signal_int_dspin_rsp_brom_t); 639 brom_int_wt->p_vci (signal_int_vci_tgt_brom); 640 611 641 //////////////////////////////////// XRAM 612 642 xram->p_clk (this->p_clk); … … 726 756 delete xicu; 727 757 delete xicu_int_wt; 758 delete brom; 759 delete brom_int_wt; 728 760 delete mdma; 729 761 delete mdma_int_wt;
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