Ignore:
Timestamp:
Mar 19, 2014, 11:29:23 AM (11 years ago)
Author:
meunier
Message:
  • Modifications in the tsar_generic_xbar topcell (remaining bugs)
  • Minor bug correction in the vci_mem_cache regarding counters
File:
1 edited

Legend:

Unmodified
Added
Removed
  • trunk/modules/vci_mem_cache/caba/source/include/vci_mem_cache.h

    r605 r663  
    405405      // instrumentation counters
    406406      uint32_t     m_cpt_cycles;         // Counter of cycles
     407      uint32_t     m_cpt_reset_count;    // Cycle at which the counters were last reset
    407408
    408409      // Counters accessible in software (not yet but eventually)
     
    449450      uint32_t     m_cpt_write_miss;     // Number of MISS WRITE
    450451      uint32_t     m_cpt_write_dirty;    // Cumulated length for WRITE transactions
    451       uint32_t     m_cpt_write_broadcast;// Number of BROADCAST INVAL because write
     452      uint32_t     m_cpt_write_broadcast;// Number of BROADCAST INVAL because of writes
    452453
    453454      uint32_t     m_cpt_trt_rb;         // Read blocked by a hit in trt
     
    515516      ~VciMemCache();
    516517
     518      void reset_counters();
    517519      void print_stats(bool activity_counters, bool stats);
    518520      void print_trace( size_t detailed = 0 );
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