Changeset 668 for trunk/modules/vci_cc_vcache_wrapper/caba
- Timestamp:
- Apr 2, 2014, 4:11:10 PM (11 years ago)
- Location:
- trunk/modules/vci_cc_vcache_wrapper/caba/source
- Files:
-
- 2 edited
Legend:
- Unmodified
- Added
- Removed
-
trunk/modules/vci_cc_vcache_wrapper/caba/source/include/vci_cc_vcache_wrapper.h
r616 r668 335 335 bool m_debug_previous_i_hit; 336 336 bool m_debug_previous_d_hit; 337 bool m_debug_activated; 337 bool m_debug_icache_fsm; 338 bool m_debug_dcache_fsm; 339 bool m_debug_cmd_fsm; 338 340 339 341 /////////////////////////////// -
trunk/modules/vci_cc_vcache_wrapper/caba/source/src/vci_cc_vcache_wrapper.cpp
r627 r668 809 809 m_debug_previous_i_hit = false; 810 810 m_debug_previous_d_hit = false; 811 m_debug_activated = false; 811 m_debug_icache_fsm = false; 812 m_debug_dcache_fsm = false; 813 m_debug_cmd_fsm = false; 812 814 813 815 // activity counters … … 950 952 m_cpt_total_cycles++; 951 953 952 m_debug_activated = (m_cpt_total_cycles > m_debug_start_cycle) and m_debug_ok; 954 m_debug_icache_fsm = m_debug_icache_fsm || 955 ((m_cpt_total_cycles > m_debug_start_cycle) and m_debug_ok); 956 m_debug_dcache_fsm = m_debug_dcache_fsm || 957 ((m_cpt_total_cycles > m_debug_start_cycle) and m_debug_ok); 958 m_debug_cmd_fsm = m_debug_cmd_fsm || 959 ((m_cpt_total_cycles > m_debug_start_cycle) and m_debug_ok); 953 960 954 961 ///////////////////////////////////////////////////////////////////// … … 1209 1216 r_icache_fsm = ICACHE_MISS_SELECT; 1210 1217 #if DEBUG_ICACHE 1211 if ( m_debug_ activated)1218 if ( m_debug_icache_fsm ) 1212 1219 std::cout << " <PROC " << name() << " ICACHE_IDLE> READ MISS in icache" 1213 1220 << " : PADDR = " << std::hex << paddr << std::endl; … … 1231 1238 r_icache_fsm = ICACHE_IDLE; 1232 1239 #if DEBUG_ICACHE 1233 if ( m_debug_ activated)1240 if ( m_debug_icache_fsm ) 1234 1241 std::cout << " <PROC " << name() << " ICACHE_IDLE> READ HIT in icache" 1235 1242 << " : PADDR = " << std::hex << paddr << std::endl; … … 1243 1250 1244 1251 #if DEBUG_ICACHE 1245 if ( m_debug_ activated)1252 if ( m_debug_icache_fsm ) 1246 1253 { 1247 1254 std::cout << " <PROC " << name() … … 1589 1596 1590 1597 #if DEBUG_ICACHE 1591 if ( m_debug_ activated)1598 if ( m_debug_icache_fsm ) 1592 1599 { 1593 1600 std::cout << " <PROC " << name() … … 1614 1621 CACHE_SLOT_STATE_ZOMBI); 1615 1622 #if DEBUG_ICACHE 1616 if ( m_debug_ activated)1623 if ( m_debug_icache_fsm ) 1617 1624 { 1618 1625 std::cout << " <PROC " << name() … … 1689 1696 r_vci_rsp_fifo_icache.read() ); 1690 1697 #if DEBUG_ICACHE 1691 if ( m_debug_ activated)1698 if ( m_debug_icache_fsm ) 1692 1699 { 1693 1700 std::cout << " <PROC " << name() … … 1767 1774 CACHE_SLOT_STATE_ZOMBI ); 1768 1775 #if DEBUG_ICACHE 1769 if ( m_debug_ activated)1776 if ( m_debug_icache_fsm ) 1770 1777 { 1771 1778 std::cout << " <PROC " << name() … … 1791 1798 CACHE_SLOT_STATE_VALID ); 1792 1799 #if DEBUG_ICACHE 1793 if ( m_debug_ activated)1800 if ( m_debug_icache_fsm ) 1794 1801 { 1795 1802 std::cout << " <PROC " << name() … … 1886 1893 1887 1894 #if DEBUG_ICACHE 1888 if ( m_debug_ activated)1895 if ( m_debug_icache_fsm ) 1889 1896 { 1890 1897 std::cout << " <PROC " << name() … … 1927 1934 } 1928 1935 #if DEBUG_ICACHE 1929 if ( m_debug_ activated)1936 if ( m_debug_icache_fsm ) 1930 1937 { 1931 1938 std::cout << " <PROC " << name() … … 2013 2020 2014 2021 #if DEBUG_ICACHE 2015 if ( m_debug_ activated)2022 if ( m_debug_icache_fsm ) 2016 2023 { 2017 2024 std::cout << " <PROC " << name() … … 2053 2060 2054 2061 #if DEBUG_ICACHE 2055 if ( m_debug_ activated)2062 if ( m_debug_icache_fsm ) 2056 2063 { 2057 2064 std::cout << " <PROC " << name() … … 2314 2321 2315 2322 #if DEBUG_DCACHE 2316 if ( m_debug_ activated)2323 if ( m_debug_dcache_fsm ) 2317 2324 std::cout << " <PROC " << name() << " DCACHE_IDLE>" 2318 2325 << " Cache update in P1 stage" << std::dec … … 2601 2608 break; 2602 2609 2610 case iss_t::XTN_DEBUG_MASK: // debug mask 2611 m_debug_dcache_fsm = ((m_dreq.wdata & 0x1) != 0); 2612 m_debug_icache_fsm = ((m_dreq.wdata & 0x2) != 0); 2613 m_debug_cmd_fsm = ((m_dreq.wdata & 0x4) != 0); 2614 m_drsp.valid = true; 2615 r_dcache_fsm = DCACHE_IDLE; 2616 break; 2617 2603 2618 default: 2604 2619 r_mmu_detr = MMU_WRITE_UNDEFINED_XTN; … … 2658 2673 m_drsp.rdata = 0; 2659 2674 #if DEBUG_DCACHE 2660 if ( m_debug_ activated)2675 if ( m_debug_dcache_fsm ) 2661 2676 std::cout << " <PROC " << name() << " DCACHE_IDLE>" 2662 2677 << " HIT in dtlb, but privilege violation" << std::endl; … … 2674 2689 m_drsp.rdata = 0; 2675 2690 #if DEBUG_DCACHE 2676 if ( m_debug_ activated)2691 if ( m_debug_dcache_fsm ) 2677 2692 std::cout << " <PROC " << name() << " DCACHE_IDLE>" 2678 2693 << " HIT in dtlb, but writable violation" << std::endl; … … 2715 2730 r_dcache_fsm = DCACHE_MISS_SELECT; 2716 2731 #if DEBUG_DCACHE 2717 if ( m_debug_ activated)2732 if ( m_debug_dcache_fsm ) 2718 2733 std::cout << " <PROC " << name() << " DCACHE_IDLE>" 2719 2734 << " READ MISS in dcache" … … 2726 2741 r_dcache_fsm = DCACHE_IDLE; 2727 2742 #if DEBUG_DCACHE 2728 if ( m_debug_ activated)2743 if ( m_debug_dcache_fsm ) 2729 2744 std::cout << " <PROC " << name() << " DCACHE_IDLE>" 2730 2745 << " Pending cleanup, stalled until cleanup acknowledge" … … 2742 2757 m_drsp.rdata = cache_rdata; 2743 2758 #if DEBUG_DCACHE 2744 if ( m_debug_ activated)2759 if ( m_debug_dcache_fsm ) 2745 2760 std::cout << " <PROC " << name() << " DCACHE_IDLE>" 2746 2761 << " READ HIT in dcache" … … 2757 2772 r_dcache_fsm = DCACHE_UNC_WAIT; 2758 2773 #if DEBUG_DCACHE 2759 if ( m_debug_ activated)2774 if ( m_debug_dcache_fsm ) 2760 2775 std::cout << " <PROC " << name() << " DCACHE_IDLE>" 2761 2776 << " READ UNCACHEABLE in dcache" … … 2955 2970 2956 2971 #if DEBUG_DCACHE 2957 if ( m_debug_ activated)2972 if ( m_debug_dcache_fsm ) 2958 2973 { 2959 2974 if ( r_dcache_tlb_ins.read() ) … … 3025 3040 3026 3041 #if DEBUG_DCACHE 3027 if ( m_debug_ activated)3042 if ( m_debug_dcache_fsm ) 3028 3043 { 3029 3044 std::cout << " <PROC " << name() … … 3062 3077 3063 3078 #if DEBUG_DCACHE 3064 if ( m_debug_ activated)3079 if ( m_debug_dcache_fsm ) 3065 3080 { 3066 3081 std::cout << " <PROC " << name() … … 3084 3099 3085 3100 #if DEBUG_DCACHE 3086 if ( m_debug_ activated)3101 if ( m_debug_dcache_fsm ) 3087 3102 { 3088 3103 std::cout << " <PROC " << name() … … 3111 3126 3112 3127 #if DEBUG_DCACHE 3113 if ( m_debug_ activated)3128 if ( m_debug_dcache_fsm ) 3114 3129 { 3115 3130 std::cout << " <PROC " << name() … … 3152 3167 3153 3168 #if DEBUG_DCACHE 3154 if ( m_debug_ activated)3169 if ( m_debug_dcache_fsm ) 3155 3170 { 3156 3171 if ( r_dcache_tlb_ins.read() ) … … 3224 3239 3225 3240 #if DEBUG_DCACHE 3226 if ( m_debug_ activated)3241 if ( m_debug_dcache_fsm ) 3227 3242 { 3228 3243 std::cout << " <PROC " << name() … … 3248 3263 3249 3264 #if DEBUG_DCACHE 3250 if ( m_debug_ activated)3265 if ( m_debug_dcache_fsm ) 3251 3266 { 3252 3267 std::cout << " <PROC " << name() … … 3265 3280 3266 3281 #if DEBUG_DCACHE 3267 if ( m_debug_ activated)3282 if ( m_debug_dcache_fsm ) 3268 3283 { 3269 3284 std::cout << " <PROC " << name() … … 3333 3348 3334 3349 #if DEBUG_DCACHE 3335 if ( m_debug_ activated)3350 if ( m_debug_dcache_fsm ) 3336 3351 { 3337 3352 std::cout << " <PROC " << name() … … 3353 3368 3354 3369 #if DEBUG_DCACHE 3355 if ( m_debug_ activated)3370 if ( m_debug_dcache_fsm ) 3356 3371 { 3357 3372 std::cout << " <PROC " << name() … … 3369 3384 3370 3385 #if DEBUG_DCACHE 3371 if ( m_debug_ activated)3386 if ( m_debug_dcache_fsm ) 3372 3387 { 3373 3388 std::cout << " <PROC " << name() … … 3386 3401 3387 3402 #if DEBUG_DCACHE 3388 if ( m_debug_ activated)3403 if ( m_debug_dcache_fsm ) 3389 3404 { 3390 3405 std::cout << " <PROC " << name() … … 3424 3439 3425 3440 #if DEBUG_DCACHE 3426 if ( m_debug_ activated)3441 if ( m_debug_dcache_fsm ) 3427 3442 { 3428 3443 if ( r_dcache_tlb_ins.read() ) … … 3500 3515 3501 3516 #if DEBUG_DCACHE 3502 if ( m_debug_ activated)3517 if ( m_debug_dcache_fsm ) 3503 3518 { 3504 3519 std::cout << " <PROC " << name() … … 3524 3539 3525 3540 #if DEBUG_DCACHE 3526 if ( m_debug_ activated)3541 if ( m_debug_dcache_fsm ) 3527 3542 { 3528 3543 std::cout << " <PROC " << name() … … 3542 3557 3543 3558 #if DEBUG_DCACHE 3544 if ( m_debug_ activated)3559 if ( m_debug_dcache_fsm ) 3545 3560 { 3546 3561 std::cout << " <PROC " << name() … … 3555 3570 { 3556 3571 #if DEBUG_DCACHE 3557 if ( m_debug_ activated)3572 if ( m_debug_dcache_fsm ) 3558 3573 { 3559 3574 std::cout << " <PROC " << name() … … 3608 3623 { 3609 3624 #if DEBUG_DCACHE 3610 if ( m_debug_ activated)3625 if ( m_debug_dcache_fsm ) 3611 3626 { 3612 3627 std::cout << " <PROC " << name() … … 3623 3638 { 3624 3639 #if DEBUG_DCACHE 3625 if ( m_debug_ activated)3640 if ( m_debug_dcache_fsm ) 3626 3641 { 3627 3642 std::cout << " <PROC " << name() … … 3894 3909 3895 3910 #if DEBUG_DCACHE 3896 if ( m_debug_ activated)3911 if ( m_debug_dcache_fsm ) 3897 3912 { 3898 3913 std::cout << " <PROC " << name() … … 3937 3952 3938 3953 #if DEBUG_DCACHE 3939 if ( m_debug_ activated)3954 if ( m_debug_dcache_fsm ) 3940 3955 { 3941 3956 std::cout << " <PROC " << name() … … 3997 4012 3998 4013 #if DEBUG_DCACHE 3999 if ( m_debug_ activated)4014 if ( m_debug_dcache_fsm ) 4000 4015 { 4001 4016 std::cout << " <PROC " << name() … … 4093 4108 4094 4109 #if DEBUG_DCACHE 4095 if ( m_debug_ activated)4110 if ( m_debug_dcache_fsm ) 4096 4111 { 4097 4112 std::cout << " <PROC " << name() … … 4123 4138 CACHE_SLOT_STATE_ZOMBI ); 4124 4139 #if DEBUG_DCACHE 4125 if ( m_debug_ activated)4140 if ( m_debug_dcache_fsm ) 4126 4141 { 4127 4142 std::cout << " <PROC " << name() … … 4268 4283 r_vci_rsp_fifo_dcache.read() ); 4269 4284 #if DEBUG_DCACHE 4270 if ( m_debug_ activated)4285 if ( m_debug_dcache_fsm ) 4271 4286 { 4272 4287 std::cout << " <PROC " << name() … … 4346 4361 CACHE_SLOT_STATE_ZOMBI ); 4347 4362 #if DEBUG_DCACHE 4348 if ( m_debug_ activated)4363 if ( m_debug_dcache_fsm ) 4349 4364 std::cout << " <PROC " << name() 4350 4365 << " DCACHE_MISS_DIR_UPDT> Switch slot to ZOMBI state" … … 4369 4384 4370 4385 #if DEBUG_DCACHE 4371 if ( m_debug_ activated)4386 if ( m_debug_dcache_fsm ) 4372 4387 std::cout << " <PROC " << name() 4373 4388 << " DCACHE_MISS_DIR_UPDT> Switch slot to VALID state" … … 4574 4589 4575 4590 #if DEBUG_DCACHE 4576 if ( m_debug_ activated)4591 if ( m_debug_dcache_fsm ) 4577 4592 { 4578 4593 std::cout << " <PROC " << name() … … 4622 4637 4623 4638 #if DEBUG_DCACHE 4624 if ( m_debug_ activated)4639 if ( m_debug_dcache_fsm ) 4625 4640 { 4626 4641 std::cout << " <PROC " << name() … … 4670 4685 4671 4686 #if DEBUG_DCACHE 4672 if ( m_debug_ activated)4687 if ( m_debug_dcache_fsm ) 4673 4688 { 4674 4689 std::cout << " <PROC " << name() … … 4713 4728 4714 4729 #if DEBUG_DCACHE 4715 if ( m_debug_ activated)4730 if ( m_debug_dcache_fsm ) 4716 4731 { 4717 4732 std::cout << " <PROC " << name() … … 4774 4789 4775 4790 #if DEBUG_DCACHE 4776 if ( m_debug_ activated)4791 if ( m_debug_dcache_fsm ) 4777 4792 { 4778 4793 std::cout << " <PROC " << name() … … 4811 4826 4812 4827 #if DEBUG_DCACHE 4813 if ( m_debug_ activated)4828 if ( m_debug_dcache_fsm ) 4814 4829 { 4815 4830 std::cout << " <PROC " << name() … … 4837 4852 4838 4853 #if DEBUG_DCACHE 4839 if ( m_debug_ activated)4854 if ( m_debug_dcache_fsm ) 4840 4855 { 4841 4856 std::cout << " <PROC " << name() … … 4873 4888 4874 4889 #if DEBUG_DCACHE 4875 if ( m_debug_ activated)4890 if ( m_debug_dcache_fsm ) 4876 4891 { 4877 4892 std::cout << " <PROC " << name() … … 4902 4917 4903 4918 #if DEBUG_DCACHE 4904 if ( m_debug_ activated)4919 if ( m_debug_dcache_fsm ) 4905 4920 { 4906 4921 std::cout << " <PROC " << name() … … 4963 4978 4964 4979 #if DEBUG_DCACHE 4965 if ( m_debug_ activatedand ok )4980 if ( m_debug_dcache_fsm and ok ) 4966 4981 { 4967 4982 std::cout << " <PROC " << name() … … 4979 4994 4980 4995 #if DEBUG_DCACHE 4981 if ( m_debug_ activatedand ok )4996 if ( m_debug_dcache_fsm and ok ) 4982 4997 std::cout << " <PROC " << name() << " DCACHE_INVAL_TLB_SCAN>" 4983 4998 << " Invalidate DTLB entry" << std::hex … … 5184 5199 5185 5200 #if DEBUG_CMD 5186 if ( m_debug_ activated)5201 if ( m_debug_cmd_fsm ) 5187 5202 { 5188 5203 std::cout << " <PROC " << name() << " CMD_IDLE>"
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