Index: branches/MESI/modules/vci_cc_vcache_wrapper/caba/source/src/vci_cc_vcache_wrapper.cpp
===================================================================
--- branches/MESI/modules/vci_cc_vcache_wrapper/caba/source/src/vci_cc_vcache_wrapper.cpp	(revision 671)
+++ branches/MESI/modules/vci_cc_vcache_wrapper/caba/source/src/vci_cc_vcache_wrapper.cpp	(revision 672)
@@ -4398,4 +4398,5 @@
                                   &found,
                                   &cleanup );
+
             state = r_dcache.get_cache_state(way,set);
 
@@ -5218,4 +5219,18 @@
         }
 
+        int    state = 0;
+        size_t way   = 0;
+        size_t set   = 0;
+        size_t word  = 0;
+        r_dcache.read_dir( paddr,
+                           &state,
+                           &way,
+                           &set,
+                           &word ); // unused
+
+        r_dcache_cc_state = state;
+        r_dcache_cc_way = way;
+        r_dcache_cc_set = set;
+        r_dcache_cc_inval_addr = (paddr &~0x3F);
         
         // Match between MISS address and CC address
@@ -5229,10 +5244,25 @@
         {
 
-            if(r_cc_receive_dcache_type.read() == CC_TYPE_BRDCAST and r_dcache_read_for_modify.read() and (r_dcache_miss_type.read() == PROC_MISS))
+            if(r_cc_receive_dcache_type.read() == CC_TYPE_BRDCAST and r_dcache_read_for_modify.read() and 
+               r_cc_receive_dcache_srcid.read() == m_srcid and (r_dcache_miss_type.read() == PROC_MISS))
             {
                 r_cc_receive_dcache_req = false;
-                r_dcache_fsm       = r_dcache_fsm_cc_save.read();
-            }
-            else 
+                r_dcache_fsm            = r_dcache_fsm_cc_save.read();
+            }
+            else if(r_cc_receive_dcache_type.read() == CC_TYPE_BRDCAST and 
+                    r_dcache_read_for_modify.read() and 
+                    r_cc_receive_dcache_srcid.read() != m_srcid and 
+                    (r_dcache_miss_type.read() == PROC_MISS) and 
+                    (state == CACHE_SLOT_STATE_SHARED))
+            {
+                r_dcache_fsm        = DCACHE_CC_INVAL;
+            }
+            else if(r_cc_receive_dcache_type.read() == CC_TYPE_INVAL and r_dcache_read_for_modify.read() and 
+                    (r_dcache_miss_type.read() == PROC_MISS) and
+                    (state == CACHE_SLOT_STATE_SHARED))
+            {
+                r_dcache_fsm        = DCACHE_CC_INVAL;
+            }
+            else
             {
                 r_dcache_miss_inval = false;
@@ -5280,5 +5310,5 @@
         //    }
 
-#if DEBU//G_DCACHE
+#if DEBUG_DCACHE
 if ( m_debug_activated )
 {
@@ -5296,17 +5326,10 @@
         // CC request handler
        
-        int    state = 0;
-        size_t way   = 0;
-        size_t set   = 0;
-        size_t word  = 0;
+
 
 #ifdef INSTRUMENTATION
 m_cpt_dcache_dir_read++;
 #endif
-        r_dcache.read_dir( paddr,
-                           &state,
-                           &way,
-                           &set,
-                           &word ); // unused
+
 
 #if DEBUG_DCACHE
@@ -5320,8 +5343,5 @@
 }
 #endif
-        r_dcache_cc_state = state;
-        r_dcache_cc_way = way;
-        r_dcache_cc_set = set;
-        r_dcache_cc_inval_addr = (paddr &~0x3F);
+
 
         if (state == CACHE_SLOT_STATE_EXCLUSIVE or state == CACHE_SLOT_STATE_MODIFIED)
@@ -5600,8 +5620,7 @@
     }
     } // end switch r_dcache_fsm
-
-//if(r_dcache_miss_updt.read())
-//std::cout << "  <PROC " << name() 
-//          << " miss updt " << r_dcache_miss_updt.read() << std::endl;
+if(r_dcache_miss_updt.read())
+std::cout << "  <PROC " << name() 
+          << " miss updt " << r_dcache_miss_updt.read() << std::endl;
 
 //std::cout << "  <PROC " << name()