Changeset 673 for branches/MESI/modules/vci_mem_cache
- Timestamp:
- Apr 9, 2014, 12:18:00 AM (11 years ago)
- File:
-
- 1 edited
Legend:
- Unmodified
- Added
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branches/MESI/modules/vci_mem_cache/caba/source/src/vci_mem_cache.cpp
r671 r673 3099 3099 r_read_ll_done = true; 3100 3100 } 3101 3102 bool s_getm_hit = m_cmd_read_pktid_fifo.read() & 0x8; 3103 3101 3104 r_read_is_cnt = entry.is_cnt; 3102 3105 r_read_dirty = entry.dirty; … … 3120 3123 { 3121 3124 // Invalid the line in the others processors and put the line in trt with data. 3122 if( entry.count == 0 or ((entry.count == 1) and (entry.state == ENTRY_SHARED) and (entry.owner.srcid == m_cmd_read_srcid_fifo.read()))) 3125 if( (entry.count == 0) or 3126 ((entry.count == 1) and not entry.is_cnt and (entry.state == ENTRY_SHARED) and (entry.owner.srcid == m_cmd_read_srcid_fifo.read())) or 3127 (entry.count == 1 and entry.is_cnt and entry.state == ENTRY_SHARED and s_getm_hit)) 3123 3128 { 3124 3129 r_read_fsm = READ_DIR_HIT; … … 3622 3627 entry.lock = r_read_lock.read(); 3623 3628 entry.count = r_read_count.read() + 1; 3624 3625 r_read_shared = true; 3626 3629 3630 r_read_shared = true; //ack to cache L1 with shared state 3631 3627 3632 if(not go_cnt) // Not entering counter mode 3628 3633 { … … 5078 5083 if( not r_write_to_ixr_cmd_req.read() ) 5079 5084 { 5085 if((r_write_state.read() == ENTRY_EXCLUSIVE) and (r_write_count.read() == 1)) 5086 { 5087 std::cout << "can't send a trt req when the line state is exlusive"<< std::endl; 5088 exit(0); 5089 } 5090 5080 5091 r_write_to_ixr_cmd_req = true; 5081 5092 r_write_to_ixr_cmd_index = r_write_trt_index.read(); … … 6060 6071 if ( not r_xram_rsp_to_ixr_cmd_req.read() ) 6061 6072 { 6073 if((r_xram_rsp_victim_state.read() == ENTRY_EXCLUSIVE) and (r_xram_rsp_victim_count.read() == 1)) 6074 { 6075 std::cout << "can't send a trt req when the line state is exlusive" << std::endl; 6076 exit(0); 6077 } 6062 6078 r_xram_rsp_to_ixr_cmd_req = true; 6063 6079 r_xram_rsp_to_ixr_cmd_index = r_xram_rsp_trt_index.read(); … … 7218 7234 r_cleanup_to_ixr_cmd_req = true; 7219 7235 7220 if( (r_write_to_cleanup_req == true) and (r_write_to_cleanup_nline == r_cleanup_nline.read()) )7236 if( (r_write_to_cleanup_req == true) and (r_write_to_cleanup_nline.read() == r_cleanup_nline.read()) ) 7221 7237 { 7222 7238 r_write_to_cleanup_req = false;
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