Changeset 674 for branches/MESI/modules
- Timestamp:
- Apr 9, 2014, 9:47:15 PM (11 years ago)
- Location:
- branches/MESI/modules
- Files:
-
- 2 edited
Legend:
- Unmodified
- Added
- Removed
-
branches/MESI/modules/vci_cc_vcache_wrapper/caba/source/src/vci_cc_vcache_wrapper.cpp
r672 r674 1295 1295 r_icache_fsm = ICACHE_MISS_SELECT; 1296 1296 #if DEBUG_ICACHE 1297 if ( m_debug_activated )1297 if ( m_debug_activated or m_ireq.addr == 0x11020 ) 1298 1298 std::cout << " <PROC " << name() << " ICACHE_IDLE> READ MISS in icache" 1299 1299 << " : PADDR = " << std::hex << paddr << std::endl; … … 2100 2100 2101 2101 // coherence request completed 2102 r_icache_cc_send_req = true; 2103 r_icache_cc_send_nline = r_cc_receive_icache_nline.read(); 2104 r_icache_cc_send_way = r_icache_cc_way.read(); 2105 r_icache_cc_send_type = CC_TYPE_CLEANUP; 2106 2107 r_icache_fsm = r_icache_fsm_save.read(); 2102 r_icache_cc_send_req = true; 2103 r_icache_cc_send_nline = r_cc_receive_icache_nline.read(); 2104 r_icache_cc_send_way = r_icache_cc_way.read(); 2105 r_icache_cc_send_type = CC_TYPE_CLEANUP; 2106 2107 r_icache_fsm = r_icache_fsm_save.read(); 2108 r_cc_receive_icache_req = false; 2108 2109 2109 2110 #if DEBUG_ICACHE … … 2821 2822 m_drsp.rdata = cache_rdata; 2822 2823 #if DEBUG_DCACHE 2823 if ( m_debug_activated )2824 if ( m_debug_activated or m_drsp.rdata == 0x11020) 2824 2825 std::cout << " <PROC " << name() << " DCACHE_IDLE>" 2825 2826 << " READ HIT in dcache" … … 2967 2968 } 2968 2969 #if DEBUG_DCACHE 2969 if ( m_debug_activated )2970 if ( m_debug_activated or m_dreq.wdata == 0x11020) 2970 2971 std::cout << " <PROC " << name() << " DCACHE_IDLE>" 2971 2972 << " WRITE REQ " … … 5620 5621 } 5621 5622 } // end switch r_dcache_fsm 5622 if(r_dcache_miss_updt.read()) 5623 std::cout << " <PROC " << name() 5624 << " miss updt " << r_dcache_miss_updt.read() << std::endl; 5623 5624 //if(r_dcache_miss_updt.read()) 5625 //std::cout << " <PROC " << name() 5626 // << " miss updt " << r_dcache_miss_updt.read() << std::endl; 5625 5627 5626 5628 //std::cout << " <PROC " << name() … … 6265 6267 r_cc_receive_dcache_srcid = DspinDhccpParam::dspin_get(receive_data, 6266 6268 DspinDhccpParam::BROADCAST_SRCID); 6267 }6268 r_cc_receive_fsm = CC_RECEIVE_BRDCAST_NLINE;6269 r_cc_receive_fsm = CC_RECEIVE_BRDCAST_NLINE; 6270 } 6269 6271 break; 6270 6272 } … … 6278 6280 // not to actually post a request to an available cache => need a 6279 6281 // flip_flop to check that ? 6280 if (not (r_cc_receive_icache_req.read()) and 6281 not (r_cc_receive_dcache_req.read()) and 6282 (p_dspin_m2p.write.read())) 6282 if (r_cc_receive_icache_req.read() or r_cc_receive_dcache_req.read()) 6283 { 6284 std::cout << "illege flags for handling brdcast request" << std::endl; 6285 exit(0); 6286 } 6287 if(p_dspin_m2p.write.read()) 6283 6288 { 6284 6289 // request dcache to handle the BROADCAST … … 6296 6301 break; 6297 6302 } 6303 6298 6304 // keep waiting for the caches to accept the request 6299 6305 break; … … 6846 6852 case CC_RECEIVE_BRDCAST_HEADER: 6847 6853 { 6848 p_dspin_m2p.read = true;6849 break;6850 }6851 //////////////////////////////6852 case CC_RECEIVE_BRDCAST_NLINE:6853 {6854 // TODO maybe we need to wait for both only to leave the state, but6855 // not to actually post a request to an available cache => need a6856 // flip_flop to check that ?6857 6854 if (not (r_cc_receive_icache_req.read()) and not (r_cc_receive_dcache_req.read())) 6858 6855 p_dspin_m2p.read = true; … … 6860 6857 p_dspin_m2p.read = false; 6861 6858 break; 6859 } 6860 ////////////////////////////// 6861 case CC_RECEIVE_BRDCAST_NLINE: 6862 { 6863 // TODO maybe we need to wait for both only to leave the state, but 6864 // not to actually post a request to an available cache => need a 6865 // flip_flop to check that ? 6866 p_dspin_m2p.read = true; 6867 break; 6868 6862 6869 } 6863 6870 ///////////////////////////// -
branches/MESI/modules/vci_mem_cache/caba/source/src/vci_mem_cache.cpp
r673 r674 3175 3175 << " / way = " << std::dec << way 3176 3176 << " / count = " <<std::dec << entry.count 3177 << " / copy = " <<std::dec << entry.owner.srcid 3177 3178 << " / is_cnt = " << entry.is_cnt << std::endl; 3178 3179 if((m_cmd_read_pktid_fifo.read() & 0x7) == TYPE_LL) std::cout << " / LL access" << std::endl; … … 3287 3288 << " <MEMC " << name() << " READ_IVT_INVAL_LOCK>" 3288 3289 << " Inval req for a read for ownership request" 3290 << " read copy = " << r_read_copy.read() 3289 3291 << " count " << ivt_send_count << " " << r_read_count.read() 3290 3292 << std::endl; … … 4905 4907 not r_write_to_cc_send_brdcast_req.read() and 4906 4908 (r_write_inval_trt_send.read() or not r_write_to_cleanup_req.read()); 4909 4907 4910 if(r_alloc_ivt_fsm.read() == ALLOC_IVT_WRITE) 4908 4911 { … … 4915 4918 addr_t nline = m_nline[(addr_t)(r_write_address.read())]; 4916 4919 size_t nb_copies = r_write_count.read(); 4917 4918 wok = m_ivt.set(false, // it's an inval transaction 4919 is_brdcast, // it's a broadcast 4920 true, // response required 4921 false, // no acknowledge required 4922 srcid, 4923 trdid, 4924 pktid, 4925 nline, 4926 nb_copies, 4927 index); 4920 bool ivt_full = m_ivt.is_full(); 4921 4922 4923 //r_write_ivt_index = index; 4924 4925 if(not ivt_full and cc_send_valid) //avoid to deadlock, we make sure that we can send cc_send request. 4926 { 4927 wok = m_ivt.set(false, // it's an inval transaction 4928 is_brdcast, // it's a broadcast 4929 true, // response required 4930 false, // no acknowledge required 4931 srcid, 4932 trdid, 4933 pktid, 4934 nline, 4935 nb_copies, 4936 index); 4937 /*// std::cout << " trt wait nline =" << std::hex << nline 4938 << " write data " << std::hex << std::endl;*/ 4928 4939 #if DEBUG_MEMC_WRITE 4929 4940 if( m_debug and wok ) 4930 4941 std::cout << " <MEMC " << name() << " WRITE_INVAL_IVT_LOCK> Register broadcast inval in IVT" 4942 << "ivt index = " << index 4931 4943 << " / nb_copies = " << r_write_count.read() << std::endl; 4932 4944 #endif 4933 //r_write_ivt_index = index;4934 4935 if(wok and cc_send_valid) //avoid to deadlock, we make sure that we can send cc_send request.4936 {4937 /*// std::cout << " trt wait nline =" << std::hex << nline4938 << " write data " << std::hex << std::endl;*/4939 4940 4945 for(size_t word=0 ; word<m_words ; word++) 4941 4946 { … … 6760 6765 << " CLEANUP_LOCKED_IVT_CLEAR> clear UPT entry" 6761 6766 << " contain data = " << r_cleanup_contains_data.read() 6767 << " srcid = " << r_cleanup_locked_srcid.read() 6762 6768 << " updt dir count =" << entry.count 6763 6769 << std::endl; … … 10001 10007 // The ALLOC_DIR FSM allocates the access to the directory and 10002 10008 // the data cache with a round robin priority between 6 user FSMs : 10003 // The cyclic ordering is CONFIG > READ > WRITE > CAS > CLEANUP > XRAM_RSP10009 // The cyclic ordering is CONFIG > READ > WRITE > CAS > MULTI_ACK > CLEANUP > XRAM_RSP 10004 10010 // The ressource is always allocated. 10011 // one important point is that the multi_ack alloc is always token before the cleanup alloc 10005 10012 ///////////////////////////////////////////////////////////////////////////////////// 10006 10013 … … 10037 10044 r_alloc_dir_fsm = ALLOC_DIR_CAS; 10038 10045 10046 else if(r_multi_ack_fsm.read() == MULTI_ACK_DIR_REQ) 10047 r_alloc_dir_fsm = ALLOC_DIR_MULTI_ACK; 10048 10039 10049 else if(r_cleanup_fsm.read() == CLEANUP_DIR_REQ) 10040 10050 r_alloc_dir_fsm = ALLOC_DIR_CLEANUP; … … 10042 10052 else if(r_xram_rsp_fsm.read() == XRAM_RSP_DIR_LOCK) 10043 10053 r_alloc_dir_fsm = ALLOC_DIR_XRAM_RSP; 10044 10045 else if(r_multi_ack_fsm.read() == MULTI_ACK_DIR_REQ)10046 r_alloc_dir_fsm = ALLOC_DIR_MULTI_ACK;10047 10054 10048 10055 else … … 10071 10078 r_alloc_dir_fsm = ALLOC_DIR_CAS; 10072 10079 10080 else if(r_multi_ack_fsm.read() == MULTI_ACK_DIR_REQ) 10081 r_alloc_dir_fsm = ALLOC_DIR_MULTI_ACK; 10082 10073 10083 else if(r_cleanup_fsm.read() == CLEANUP_DIR_REQ) 10074 10084 r_alloc_dir_fsm = ALLOC_DIR_CLEANUP; … … 10076 10086 else if(r_xram_rsp_fsm.read() == XRAM_RSP_DIR_LOCK) 10077 10087 r_alloc_dir_fsm = ALLOC_DIR_XRAM_RSP; 10078 10079 else if(r_multi_ack_fsm.read() == MULTI_ACK_DIR_REQ)10080 r_alloc_dir_fsm = ALLOC_DIR_MULTI_ACK;10081 10088 10082 10089 else if(r_config_fsm.read() == CONFIG_DIR_REQ) … … 10110 10117 r_alloc_dir_fsm = ALLOC_DIR_CAS; 10111 10118 10119 else if(r_multi_ack_fsm.read() == MULTI_ACK_DIR_REQ) 10120 r_alloc_dir_fsm = ALLOC_DIR_MULTI_ACK; 10121 10112 10122 else if(r_cleanup_fsm.read() == CLEANUP_DIR_REQ) 10113 10123 r_alloc_dir_fsm = ALLOC_DIR_CLEANUP; … … 10115 10125 else if(r_xram_rsp_fsm.read() == XRAM_RSP_DIR_LOCK) 10116 10126 r_alloc_dir_fsm = ALLOC_DIR_XRAM_RSP; 10117 10118 else if(r_multi_ack_fsm.read() == MULTI_ACK_DIR_REQ)10119 r_alloc_dir_fsm = ALLOC_DIR_MULTI_ACK;10120 10127 10121 10128 else if(r_config_fsm.read() == CONFIG_DIR_REQ) … … 10150 10157 ((r_cas_fsm.read() == CAS_MISS_TRT_LOCK) and 10151 10158 (r_alloc_trt_fsm.read() == ALLOC_TRT_CAS))) 10152 { 10153 if(r_cleanup_fsm.read() == CLEANUP_DIR_REQ) 10159 { 10160 if(r_multi_ack_fsm.read() == MULTI_ACK_DIR_REQ) 10161 r_alloc_dir_fsm = ALLOC_DIR_MULTI_ACK; 10162 10163 else if(r_cleanup_fsm.read() == CLEANUP_DIR_REQ) 10154 10164 r_alloc_dir_fsm = ALLOC_DIR_CLEANUP; 10155 10165 10156 10166 else if(r_xram_rsp_fsm.read() == XRAM_RSP_DIR_LOCK) 10157 10167 r_alloc_dir_fsm = ALLOC_DIR_XRAM_RSP; 10158 10159 else if(r_multi_ack_fsm.read() == MULTI_ACK_DIR_REQ)10160 r_alloc_dir_fsm = ALLOC_DIR_MULTI_ACK;10161 10168 10162 10169 else if(r_config_fsm.read() == CONFIG_DIR_REQ) … … 10175 10182 m_cpt_cas_fsm_dir_used++; 10176 10183 break; 10177 10178 ///////////////////////10179 case ALLOC_DIR_CLEANUP: // allocated to CLEANUP FSM10180 if((r_cleanup_fsm.read() != CLEANUP_DIR_REQ) and10181 (r_cleanup_fsm.read() != CLEANUP_DIR_LOCK) and10182 (r_cleanup_fsm.read() != CLEANUP_LOCKED_IVT_LOCK) and10183 (r_cleanup_fsm.read() != CLEANUP_LOCKED_IVT_DECREMENT) and10184 (r_cleanup_fsm.read() != CLEANUP_HEAP_REQ) and10185 (r_cleanup_fsm.read() != CLEANUP_HEAP_LOCK))10186 {10187 if(r_xram_rsp_fsm.read() == XRAM_RSP_DIR_LOCK)10188 r_alloc_dir_fsm = ALLOC_DIR_XRAM_RSP;10189 10190 else if(r_multi_ack_fsm.read() == MULTI_ACK_DIR_REQ)10191 r_alloc_dir_fsm = ALLOC_DIR_MULTI_ACK;10192 10193 else if(r_config_fsm.read() == CONFIG_DIR_REQ)10194 r_alloc_dir_fsm = ALLOC_DIR_CONFIG;10195 10196 else if(r_read_fsm.read() == READ_DIR_REQ)10197 r_alloc_dir_fsm = ALLOC_DIR_READ;10198 10199 else if(r_write_fsm.read() == WRITE_DIR_REQ)10200 r_alloc_dir_fsm = ALLOC_DIR_WRITE;10201 10202 else if(r_cas_fsm.read() == CAS_DIR_REQ)10203 r_alloc_dir_fsm = ALLOC_DIR_CAS;10204 10205 else10206 m_cpt_dir_unused++;10207 }10208 else10209 m_cpt_cleanup_fsm_dir_used++;10210 break;10211 10212 ////////////////////////10213 case ALLOC_DIR_XRAM_RSP: // allocated to XRAM_RSP FSM10214 if( (r_xram_rsp_fsm.read() != XRAM_RSP_DIR_LOCK) and10215 (r_xram_rsp_fsm.read() != XRAM_RSP_TRT_COPY) and10216 (r_xram_rsp_fsm.read() != XRAM_RSP_IVT_LOCK))10217 {10218 if(r_multi_ack_fsm.read() == MULTI_ACK_DIR_REQ)10219 r_alloc_dir_fsm = ALLOC_DIR_MULTI_ACK;10220 10221 else if(r_config_fsm.read() == CONFIG_DIR_REQ)10222 r_alloc_dir_fsm = ALLOC_DIR_CONFIG;10223 10224 else if(r_read_fsm.read() == READ_DIR_REQ)10225 r_alloc_dir_fsm = ALLOC_DIR_READ;10226 10227 else if(r_write_fsm.read() == WRITE_DIR_REQ)10228 r_alloc_dir_fsm = ALLOC_DIR_WRITE;10229 10230 else if(r_cas_fsm.read() == CAS_DIR_REQ)10231 r_alloc_dir_fsm = ALLOC_DIR_CAS;10232 10233 else if(r_cleanup_fsm.read() == CLEANUP_DIR_REQ)10234 r_alloc_dir_fsm = ALLOC_DIR_CLEANUP;10235 10236 else10237 m_cpt_dir_unused++;10238 }10239 else10240 m_cpt_xram_rsp_fsm_dir_used++;10241 break;10242 10243 10184 //////////////////////// 10244 10185 case ALLOC_DIR_MULTI_ACK: // allocated to MULTI_ACK FSM … … 10253 10194 // (r_alloc_heap_fsm.read() == ALLOC_HEAP_MULTI_ACK))) 10254 10195 { 10255 if(r_config_fsm.read() == CONFIG_DIR_REQ) 10196 if(r_cleanup_fsm.read() == CLEANUP_DIR_REQ) 10197 r_alloc_dir_fsm = ALLOC_DIR_CLEANUP; 10198 10199 else if(r_xram_rsp_fsm.read() == XRAM_RSP_DIR_LOCK) 10200 r_alloc_dir_fsm = ALLOC_DIR_XRAM_RSP; 10201 10202 else if(r_config_fsm.read() == CONFIG_DIR_REQ) 10256 10203 r_alloc_dir_fsm = ALLOC_DIR_CONFIG; 10257 10204 … … 10265 10212 r_alloc_dir_fsm = ALLOC_DIR_CAS; 10266 10213 10267 else if(r_cleanup_fsm.read() == CLEANUP_DIR_REQ)10268 r_alloc_dir_fsm = ALLOC_DIR_CLEANUP;10269 10270 else if(r_xram_rsp_fsm.read() == XRAM_RSP_DIR_LOCK)10271 r_alloc_dir_fsm = ALLOC_DIR_XRAM_RSP;10272 10214 else 10273 10215 m_cpt_dir_unused++; … … 10276 10218 m_cpt_xram_rsp_fsm_dir_used++; 10277 10219 break; 10278 10279 10220 /////////////////////// 10221 case ALLOC_DIR_CLEANUP: // allocated to CLEANUP FSM 10222 if((r_cleanup_fsm.read() != CLEANUP_DIR_REQ) and 10223 (r_cleanup_fsm.read() != CLEANUP_DIR_LOCK) and 10224 (r_cleanup_fsm.read() != CLEANUP_LOCKED_IVT_LOCK) and 10225 (r_cleanup_fsm.read() != CLEANUP_LOCKED_IVT_DECREMENT) and 10226 (r_cleanup_fsm.read() != CLEANUP_HEAP_REQ) and 10227 (r_cleanup_fsm.read() != CLEANUP_HEAP_LOCK)) 10228 { 10229 if(r_xram_rsp_fsm.read() == XRAM_RSP_DIR_LOCK) 10230 r_alloc_dir_fsm = ALLOC_DIR_XRAM_RSP; 10231 10232 else if(r_config_fsm.read() == CONFIG_DIR_REQ) 10233 r_alloc_dir_fsm = ALLOC_DIR_CONFIG; 10234 10235 else if(r_read_fsm.read() == READ_DIR_REQ) 10236 r_alloc_dir_fsm = ALLOC_DIR_READ; 10237 10238 else if(r_write_fsm.read() == WRITE_DIR_REQ) 10239 r_alloc_dir_fsm = ALLOC_DIR_WRITE; 10240 10241 else if(r_cas_fsm.read() == CAS_DIR_REQ) 10242 r_alloc_dir_fsm = ALLOC_DIR_CAS; 10243 10244 else if(r_multi_ack_fsm.read() == MULTI_ACK_DIR_REQ) 10245 r_alloc_dir_fsm = ALLOC_DIR_MULTI_ACK; 10246 10247 else 10248 m_cpt_dir_unused++; 10249 } 10250 else 10251 m_cpt_cleanup_fsm_dir_used++; 10252 break; 10253 10254 //////////////////////// 10255 case ALLOC_DIR_XRAM_RSP: // allocated to XRAM_RSP FSM 10256 if( (r_xram_rsp_fsm.read() != XRAM_RSP_DIR_LOCK) and 10257 (r_xram_rsp_fsm.read() != XRAM_RSP_TRT_COPY) and 10258 (r_xram_rsp_fsm.read() != XRAM_RSP_IVT_LOCK)) 10259 { 10260 if(r_config_fsm.read() == CONFIG_DIR_REQ) 10261 r_alloc_dir_fsm = ALLOC_DIR_CONFIG; 10262 10263 else if(r_read_fsm.read() == READ_DIR_REQ) 10264 r_alloc_dir_fsm = ALLOC_DIR_READ; 10265 10266 else if(r_write_fsm.read() == WRITE_DIR_REQ) 10267 r_alloc_dir_fsm = ALLOC_DIR_WRITE; 10268 10269 else if(r_cas_fsm.read() == CAS_DIR_REQ) 10270 r_alloc_dir_fsm = ALLOC_DIR_CAS; 10271 10272 else if(r_multi_ack_fsm.read() == MULTI_ACK_DIR_REQ) 10273 r_alloc_dir_fsm = ALLOC_DIR_MULTI_ACK; 10274 10275 else if(r_cleanup_fsm.read() == CLEANUP_DIR_REQ) 10276 r_alloc_dir_fsm = ALLOC_DIR_CLEANUP; 10277 10278 else 10279 m_cpt_dir_unused++; 10280 } 10281 else 10282 m_cpt_xram_rsp_fsm_dir_used++; 10283 break; 10280 10284 10281 10285 } // end switch alloc_dir_fsm
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