Changeset 675 for branches/MESI/modules/vci_mem_cache/caba/source
- Timestamp:
- Apr 11, 2014, 3:09:22 PM (11 years ago)
- Location:
- branches/MESI/modules/vci_mem_cache/caba/source
- Files:
-
- 2 edited
-
include/vci_mem_cache.h (modified) (2 diffs)
-
src/vci_mem_cache.cpp (modified) (20 diffs)
Legend:
- Unmodified
- Added
- Removed
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branches/MESI/modules/vci_mem_cache/caba/source/include/vci_mem_cache.h
r670 r675 850 850 sc_signal<bool> r_read_to_cc_send_brdcast_req; // bd inval 851 851 sc_signal<bool> r_read_to_cc_send_type; //cc inval or cc updt 852 sc_signal<bool> r_read_to_cc_send_is_shared; //line is or not shared 852 853 853 854 //RWT: Buffer between READ fsm and CLEANUP fsm (wait for the data coming from L1 cache) … … 1039 1040 sc_signal<size_t> r_cleanup_to_tgt_rsp_pktid; // transaction pktid 1040 1041 sc_signal<addr_t> r_cleanup_to_tgt_rsp_ll_key; 1042 sc_signal<addr_t> r_cleanup_to_tgt_rsp_nline; 1041 1043 1042 1044 sc_signal<bool> r_cleanup_to_tgt_rsp_type; -
branches/MESI/modules/vci_mem_cache/caba/source/src/vci_mem_cache.cpp
r674 r675 3195 3195 bool last_multi_req = multi_req and (r_read_count.read() == 1); 3196 3196 bool not_last_multi_req = multi_req and (r_read_count.read() != 1); 3197 bool match_send = (r_read_copy.read() == m_cmd_read_srcid_fifo.read()) and 3198 (r_read_copy_inst.read() == 0); 3199 3200 if(last_multi_req and match_send) 3201 { 3202 std::cout << "last_multi_req and match srcid are true" << std::endl; 3203 exit(0); 3204 } 3197 //bool match_send = (r_read_copy.read() == m_cmd_read_srcid_fifo.read()) and 3198 // (r_read_copy_inst.read() == 0); 3199 3205 3200 size_t ivt_send_count = 0; 3206 3201 … … 3240 3235 r_read_to_cc_send_nline = nline; 3241 3236 r_read_to_cc_send_srcid = m_cmd_read_srcid_fifo.read(); 3237 r_read_to_cc_send_is_shared = r_read_state.read() == ENTRY_SHARED; 3238 3242 3239 if(r_read_need_block.read()) 3243 3240 { … … 3248 3245 r_read_to_cleanup_req = true; 3249 3246 } 3250 r_read_to_cc_send_type = true;3251 3252 if(not match_send)3253 {3254 3255 3256 3257 }3247 r_read_to_cc_send_type = true; //CC_INVAL 3248 3249 // if(not match_send) 3250 // { 3251 read_to_cc_send_fifo_srcid = r_read_copy.read(); 3252 read_to_cc_send_fifo_inst = r_read_copy_inst.read(); 3253 read_to_cc_send_fifo_put = multi_req; 3254 // } 3258 3255 r_read_next_ptr = r_read_ptr.read(); 3259 3256 3260 if(((m_cmd_read_pktid_fifo.read() & 0x8) == 0x8) and (r_read_state.read() == ENTRY_SHARED)) 3261 ivt_send_count = r_read_count.read() - 1; 3262 else 3263 ivt_send_count = r_read_count.read(); 3257 // if(((m_cmd_read_pktid_fifo.read() & 0x8) == 0x8) and (r_read_state.read() == ENTRY_SHARED)) 3258 // ivt_send_count = r_read_count.read() - 1; 3259 // else 3260 // ivt_send_count = r_read_count.read(); 3261 3264 3262 m_ivt.set(false, // it's an inval transaction 3265 3263 not multi_req, // multi_inval or brdcast … … 3270 3268 m_cmd_read_pktid_fifo.read() & 0x7, 3271 3269 nline, 3272 ivt_send_count,3270 r_read_count.read(), 3273 3271 index); 3274 3272 … … 3318 3316 HeapEntry entry = m_heap.read(r_read_next_ptr.read()); 3319 3317 3320 bool match_send = ( entry.owner.srcid == m_cmd_read_srcid_fifo.read()) and3321 ( entry.owner.inst == 0);3322 if(not match_send)3323 {3324 3325 3326 3327 }3318 // bool match_send = ( entry.owner.srcid == m_cmd_read_srcid_fifo.read()) and 3319 // ( entry.owner.inst == 0); 3320 // if(not match_send) 3321 // { 3322 read_to_cc_send_fifo_srcid = entry.owner.srcid; 3323 read_to_cc_send_fifo_inst = entry.owner.inst; 3324 read_to_cc_send_fifo_put = true; 3325 // } 3328 3326 // if(read_to_cc_send_inst_fifo.wok()) always not full 3329 3327 r_read_next_ptr = entry.next; … … 3435 3433 r_read_to_cc_send_brdcast_req = false; 3436 3434 r_read_to_cc_send_nline = nline; 3437 r_read_to_cc_send_type = false; 3435 r_read_to_cc_send_type = false; //CC_UPDT 3438 3436 3439 3437 read_to_cc_send_fifo_srcid = r_read_copy.read(); … … 6781 6779 r_cleanup_to_tgt_rsp_srcid = r_cleanup_locked_srcid.read(); 6782 6780 r_cleanup_to_tgt_rsp_trdid = r_cleanup_locked_trdid.read(); 6781 r_cleanup_to_tgt_rsp_nline = r_cleanup_nline.read(); 6783 6782 6784 6783 r_cleanup_to_tgt_rsp_pktid = 0x8 + r_cleanup_locked_pktid.read(); // there is not a brdcast for cas operation. in cache L1, the line can be in M state … … 8279 8278 case CC_SEND_CONFIG_IDLE: // XRAM_RSP FSM has highest priority 8280 8279 { 8280 bool cc_send_updt_delay = not r_read_to_cc_send_type.read() and r_tgt_rsp_fsm.read() == TGT_RSP_CLEANUP and 8281 r_read_to_cc_send_nline.read() == r_cleanup_to_tgt_rsp_nline.read() and 8282 m_read_to_cc_send_srcid_fifo.read() == r_cleanup_to_tgt_rsp_srcid.read(); 8281 8283 // XRAM_RSP 8282 8284 if(m_xram_rsp_to_cc_send_inst_fifo.rok() or … … 8305 8307 8306 8308 // READ 8307 if( m_read_to_cc_send_inst_fifo.rok() or8308 r_read_to_cc_send_multi_req.read()) 8309 if((m_read_to_cc_send_inst_fifo.rok() or 8310 r_read_to_cc_send_multi_req.read()) and not cc_send_updt_delay) 8309 8311 { 8310 8312 r_cc_send_fsm = CC_SEND_READ_MULTI_HEADER; … … 8351 8353 case CC_SEND_WRITE_IDLE: // CONFIG FSM has highest priority 8352 8354 { 8355 bool cc_send_updt_delay = not r_read_to_cc_send_type.read() and r_tgt_rsp_fsm.read() == TGT_RSP_CLEANUP and 8356 r_read_to_cc_send_nline.read() == r_cleanup_to_tgt_rsp_nline.read() and 8357 m_read_to_cc_send_srcid_fifo.read() == r_cleanup_to_tgt_rsp_srcid.read(); 8353 8358 // CONFIG 8354 8359 if(r_config_to_cc_send_multi_req.read()) … … 8387 8392 } 8388 8393 // READ 8389 if( m_read_to_cc_send_inst_fifo.rok() or8390 r_read_to_cc_send_multi_req.read()) 8394 if((m_read_to_cc_send_inst_fifo.rok() or 8395 r_read_to_cc_send_multi_req.read()) and not cc_send_updt_delay) 8391 8396 { 8392 8397 r_cc_send_fsm = CC_SEND_READ_MULTI_HEADER; … … 8420 8425 case CC_SEND_XRAM_RSP_IDLE: // CAS FSM has highest priority 8421 8426 { 8427 bool cc_send_updt_delay = not r_read_to_cc_send_type.read() and r_tgt_rsp_fsm.read() == TGT_RSP_CLEANUP and 8428 r_read_to_cc_send_nline.read() == r_cleanup_to_tgt_rsp_nline.read() and 8429 m_read_to_cc_send_srcid_fifo.read() == r_cleanup_to_tgt_rsp_srcid.read(); 8422 8430 // CAS 8423 8431 if(m_cas_to_cc_send_inst_fifo.rok() or … … 8433 8441 } 8434 8442 // READ 8435 if( m_read_to_cc_send_inst_fifo.rok() or8436 r_read_to_cc_send_multi_req.read()) 8443 if((m_read_to_cc_send_inst_fifo.rok() or 8444 r_read_to_cc_send_multi_req.read()) and not cc_send_updt_delay) 8437 8445 { 8438 8446 r_cc_send_fsm = CC_SEND_READ_MULTI_HEADER; … … 8484 8492 case CC_SEND_CAS_IDLE: // CLEANUP FSM has highest priority 8485 8493 { 8494 bool cc_send_updt_delay = not r_read_to_cc_send_type.read() and r_tgt_rsp_fsm.read() == TGT_RSP_CLEANUP and 8495 r_read_to_cc_send_nline.read() == r_cleanup_to_tgt_rsp_nline.read() and 8496 m_read_to_cc_send_srcid_fifo.read() == r_cleanup_to_tgt_rsp_srcid.read(); 8486 8497 // READ 8487 if( m_read_to_cc_send_inst_fifo.rok() or8488 r_read_to_cc_send_multi_req.read()) 8498 if((m_read_to_cc_send_inst_fifo.rok() or 8499 r_read_to_cc_send_multi_req.read()) and not cc_send_updt_delay) 8489 8500 { 8490 8501 r_cc_send_fsm = CC_SEND_READ_MULTI_HEADER; … … 8548 8559 case CC_SEND_READ_IDLE: // WRITE FSM has highest priority 8549 8560 { 8561 bool cc_send_updt_delay = not r_read_to_cc_send_type.read() and r_tgt_rsp_fsm.read() == TGT_RSP_CLEANUP and 8562 r_read_to_cc_send_nline.read() == r_cleanup_to_tgt_rsp_nline.read() and 8563 m_read_to_cc_send_srcid_fifo.read() == r_cleanup_to_tgt_rsp_srcid.read(); 8550 8564 //WRITE 8551 8565 if(m_write_to_cc_send_inst_fifo.rok() or … … 8596 8610 } 8597 8611 // READ 8598 if( m_read_to_cc_send_inst_fifo.rok() or8599 r_read_to_cc_send_multi_req.read()) 8612 if((m_read_to_cc_send_inst_fifo.rok() or 8613 r_read_to_cc_send_multi_req.read()) and not cc_send_updt_delay) 8600 8614 { 8601 8615 r_cc_send_fsm = CC_SEND_READ_MULTI_HEADER; … … 8613 8627 case CC_SEND_CONFIG_INVAL_HEADER: // send first flit multi-inval (from CONFIG FSM) 8614 8628 { 8629 8615 8630 if(m_config_to_cc_send_inst_fifo.rok()) 8616 8631 { … … 11499 11514 DspinDhccpParam::dspin_set( flit, 11500 11515 1, 11501 DspinDhccpParam:: MULTI_INVAL_IS_CONFIG);11516 DspinDhccpParam::BRDCAST_IS_CONFIG); 11502 11517 11503 11518 DspinDhccpParam::dspin_set( flit, … … 11546 11561 r_read_to_cc_send_srcid.read(), // send the srcid itself which demands the request getM 11547 11562 DspinDhccpParam::BROADCAST_SRCID); 11563 11564 DspinDhccpParam::dspin_set( flit, 11565 r_read_to_cc_send_is_shared.read(), // send the actuel line state in memcache 11566 DspinDhccpParam::BRDCAST_IS_SHARED); 11548 11567 11549 11568 DspinDhccpParam::dspin_set( flit, … … 11618 11637 DspinDhccpParam::dspin_set( 11619 11638 flit, 11620 r_read_to_cc_send_ srcid.read(),11621 DspinDhccpParam::MULTI_INVAL_ SRCID);11639 r_read_to_cc_send_is_shared.read(), 11640 DspinDhccpParam::MULTI_INVAL_IS_SHARED); 11622 11641 11623 11642 if(r_read_to_cc_send_type.read())
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