Changeset 681 for trunk/platforms


Ignore:
Timestamp:
Apr 21, 2014, 5:51:42 AM (11 years ago)
Author:
alain
Message:

Increasinf the value of MAX_FROZEN_CYclES parameter to 500000.

File:
1 edited

Legend:

Unmodified
Added
Removed

  • trunk/platforms/tsar_generic_leti/top.cpp

    r664 r681  
    66// This program is released under the GNU public license
    77/////////////////////////////////////////////////////////////////////////
    8 // This file define a generic TSAR architecture.
     8// This file define a generic TSAR architecture, fully compatible
     9// with the VLSI Hardware prototype developped by CEA-LETI and LIP6
     10// in the framework of the SHARP project.
     11//
    912// The processor is a MIPS32 processor wrapped in a GDB server
    1013// (this is defined in the tsar_xbar_cluster).
    1114//
    12 // The seg_reset_base and seg_kcode_base addresses are not constrained
    13 // to be 0xBFC00000 and 0x80000000.
    14 //
    15 // It does not use an external ROM, as the boot code must be (pre)loaded
    16 // in cluster (0,0) memory.
     15// It does not use an external ROM, as the boot code is (pre)loaded
     16// in cluster (0,0) memory at address 0x0.
    1717//
    1818// The physical address space is 40 bits.
    1919// The 8 address MSB bits define the cluster index.
    2020//
    21 // The main hardware parameters are the mesh size (X_SIZE / Y_SIZE),
    22 // and the number of ptocessors per cluster (NB_PROCS_MAX).
    23 // The number of clusters cannot be larger than 256.
     21// The main hardware parameters are the mesh size (X_SIZE & Y_SIZE),
     22// and the number of processors per cluster (NB_PROCS_MAX).
     23// The number of clusters cannot be larger than 128.
    2424// The number of processors per cluster cannot be larger than 4.
    2525//
    … …  
    3232// - 1 vci_simple_ram (to model the L3 cache).
    3333//
    34 // Each processor receive 4 consecutive IRQ lines from the local XICU.
     34// Each processor receives 4 consecutive IRQ lines from the local XICU.
    3535//
    3636// In all clusters, the MEMC IRQ line (signaling a late write error)
    3737// is connected to XICU HWI[8]
    38 // The cluster (0,0) contains two "internal" peripherals:
     38// The cluster (0,0) contains two "backup" peripherals:
    3939// - one block device controller, whose IRQ is connected to XICU HWI[9].
    4040// - one single channel TTY controller, whose IRQ is connected to XICU HWI[10].
    … …  
    5353//
    5454// This IOBUS is connected to the north  port of the DIR_CMD
    55 // and DIR_RSP routers, in cluster(X_SIZE-1, Y_SIZE-2).
     55// and DIR_RSP routers, in cluster(X_SIZE-1, Y_SIZE-1).
    5656// For all external peripherals, the hardware interrupts (HWI) are
    5757// translated to write interrupts (WTI) by the iopic component:
    … …  
    6767// - X_WIDTH          : number of bits for x coordinate (must be 4)
    6868// - Y_WIDTH          : number of bits for y coordinate (must be 4)
    69 // - X_SIZE           : number of clusters in a row
    70 // - Y_SIZE           : number of clusters in a column
     69// - X_SIZE           : number of clusters in a row (1,2,4,8,16)
     70// - Y_SIZE           : number of clusters in a column (1,2,4,8)
    7171// - NB_PROCS_MAX     : number of processors per cluster (1, 2 or 4)
    7272// - NB_CMA_CHANNELS  : number of CMA channels in I/0 cluster (4 max)
    … …  
    240240///////////////////////////////////////////////////////////////////////////////////////
    241241
    242 #define MAX_FROZEN_CYCLES     10000
     242#define MAX_FROZEN_CYCLES     500000
    243243
    244244///////////////////////////////////////////////////////////////////////////////////////
    … …  
    264264//////////////////////////////////////////////////////////////////////////////////////
    265265// - 3 segments are replicated in all clusters
    266 // - 2 segments are replicated in cluster[0,0] & [X_SIZE-1,Y_SIZE-1]
    267 // - 4 segments are only in cluster [X_SIZE-1,Y_SIZE-1]
     266// - 2 segments are only in cluster[0,0]
     267// - 4 segments are only in cluster [X_SIZE-1,Y_SIZE]
    268268// The following values are for segments in cluster 0,
    269269// and these 32 bits values must be concatenate with the cluster
    … …  
    271271//////////////////////////////////////////////////////////////////////////////////////
    272272
    273    // in cluster [0,0] & [X_SIZE-1,Y_SIZE-1]
     273   // in cluster [0,0] & [X_SIZE-1,Y_SIZE]
    274274
    275275   #define MTTY_BASE    0xF4000000
    … …  
    279279   #define BDEV_SIZE    0x00001000   // 4 Kbytes
    280280
    281    // in cluster [X_SIZE-1,Y_SIZE-1]
     281   // in cluster [X_SIZE-1,Y_SIZE]
    282282
    283283   #define FBUF_BASE    0xF3000000
    … …  
    299299
    300300   #define MCFG_BASE    0xE0000000
    301    #define MCFG_SIZE    0x00001000   // 4 Kbytes per cluster
     301   #define MCFG_SIZE    0x00001000   // 4 Kbytes
    302302
    303303   #define XICU_BASE    0xF0000000
    304    #define XICU_SIZE    0x00001000   // 4 Kbytes per cluster
     304   #define XICU_SIZE    0x00001000   // 4 Kbytes
    305305
    306306bool stop_called = false;
    … …  
    346346            size_t y = trace_memc_id & ((1<<Y_WIDTH)-1);
    347347
    348             assert( (x < X_SIZE) and (y < (Y_SIZE-1)) and
     348            assert( (x < X_SIZE) and (y < (Y_SIZE)) and
    349349                  "MEMCID parameter refers a not valid memory cache");
    350350         }
    … …  
    358358            size_t l          = trace_proc_id % NB_PROCS_MAX ;
    359359
    360             assert( (x < X_SIZE) and (y < (Y_SIZE-1)) and l < NB_PROCS_MAX and
     360            assert( (x < X_SIZE) and (y < (Y_SIZE)) and l < NB_PROCS_MAX and
    361361                  "PROCID parameter refers a not valid processor");
    362362         }
    … …  
    388388
    389389    // checking hardware parameters
    390     assert( (X_SIZE <= 16) and
    391             "The X_SIZE parameter cannot be larger than 16" );
    392 
    393     assert( (Y_SIZE <= 16) and
    394             "The Y_SIZE parameter cannot be larger than 16" );
     390    assert( ((X_SIZE==1) or (X_SIZE==2) or (X_SIZE==4) or (X_SIZE==8) or (X_SIZE==16)) and
     391            "Illegal X_SIZE parameter" );
     392
     393    assert( ((Y_SIZE==1) or (Y_SIZE==2) or (Y_SIZE==4) or (Y_SIZE==8)) and
     394            "Illegal Y_SIZE parameter" );
    395395
    396396    assert( (NB_PROCS_MAX <= 4) and
    397             "The NB_PROCS_MAX parameter cannot be larger than 4" );
     397            "Illegal NB_PROCS_MAX parameter" );
    398398
    399399    assert( (NB_CMA_CHANNELS <= MAX_CMA_CHANNELS) and
    … …  
    473473   for (size_t x = 0; x < X_SIZE; x++)
    474474   {
    475       for (size_t y = 0; y < (Y_SIZE-1) ; y++)
     475      for (size_t y = 0; y < (Y_SIZE) ; y++)
    476476      {
    477477         sc_uint<vci_address_width> offset;
    … …  
    502502               IntTab(cluster(0,0),BDEV_TGTID), false));
    503503
    504    // segments for peripherals in cluster_io (X_SIZE-1,Y_SIZE-1)
     504   // segments for peripherals in cluster_io (X_SIZE-1,Y_SIZE)
    505505   sc_uint<vci_address_width> offset;
    506    offset = ((sc_uint<vci_address_width>)cluster(X_SIZE-1,Y_SIZE-1)) << 32;
     506   offset = ((sc_uint<vci_address_width>)cluster(X_SIZE-1,Y_SIZE)) << 32;
    507507
    508508   maptabd.add(Segment("seg_mtty", MTTY_BASE + offset, MTTY_SIZE,
    509                IntTab(cluster(X_SIZE-1, Y_SIZE-1),MTTY_TGTID), false));
     509               IntTab(cluster(X_SIZE-1, Y_SIZE),MTTY_TGTID), false));
    510510
    511511   maptabd.add(Segment("seg_fbuf", FBUF_BASE + offset, FBUF_SIZE,
    512                IntTab(cluster(X_SIZE-1, Y_SIZE-1),FBUF_TGTID), false));
     512               IntTab(cluster(X_SIZE-1, Y_SIZE),FBUF_TGTID), false));
    513513
    514514   maptabd.add(Segment("seg_bdev", BDEV_BASE + offset, BDEV_SIZE,
    515                IntTab(cluster(X_SIZE-1, Y_SIZE-1),BDEV_TGTID), false));
     515               IntTab(cluster(X_SIZE-1, Y_SIZE),BDEV_TGTID), false));
    516516
    517517   maptabd.add(Segment("seg_mnic", MNIC_BASE + offset, MNIC_SIZE,
    518                IntTab(cluster(X_SIZE-1, Y_SIZE-1),MNIC_TGTID), false));
     518               IntTab(cluster(X_SIZE-1, Y_SIZE),MNIC_TGTID), false));
    519519
    520520   maptabd.add(Segment("seg_cdma", CDMA_BASE + offset, CDMA_SIZE,
    521                IntTab(cluster(X_SIZE-1, Y_SIZE-1),CDMA_TGTID), false));
     521               IntTab(cluster(X_SIZE-1, Y_SIZE),CDMA_TGTID), false));
    522522
    523523   maptabd.add(Segment("seg_iopi", IOPI_BASE + offset, IOPI_SIZE,
    524                IntTab(cluster(X_SIZE-1, Y_SIZE-1),IOPI_TGTID), false));
     524               IntTab(cluster(X_SIZE-1, Y_SIZE),IOPI_TGTID), false));
    525525
    526526   std::cout << maptabd << std::endl;
    … …  
    537537    for (size_t x = 0; x < X_SIZE; x++)
    538538    {
    539         for (size_t y = 0; y < (Y_SIZE-1) ; y++)
     539        for (size_t y = 0; y < (Y_SIZE) ; y++)
    540540        {
    541541            sc_uint<vci_address_width> offset;
    … …  
    570570   // Horizontal inter-clusters DSPIN signals
    571571   DspinSignals<dspin_cmd_width>** signal_dspin_h_cmd_inc =
    572       alloc_elems<DspinSignals<dspin_cmd_width> >("signal_dspin_h_cmd_inc", X_SIZE-1, Y_SIZE-1);
     572      alloc_elems<DspinSignals<dspin_cmd_width> >("signal_dspin_h_cmd_inc", X_SIZE-1, Y_SIZE);
    573573   DspinSignals<dspin_cmd_width>** signal_dspin_h_cmd_dec =
    574       alloc_elems<DspinSignals<dspin_cmd_width> >("signal_dspin_h_cmd_dec", X_SIZE-1, Y_SIZE-1);
     574      alloc_elems<DspinSignals<dspin_cmd_width> >("signal_dspin_h_cmd_dec", X_SIZE-1, Y_SIZE);
    575575
    576576   DspinSignals<dspin_rsp_width>** signal_dspin_h_rsp_inc =
    577       alloc_elems<DspinSignals<dspin_rsp_width> >("signal_dspin_h_rsp_inc", X_SIZE-1, Y_SIZE-1);
     577      alloc_elems<DspinSignals<dspin_rsp_width> >("signal_dspin_h_rsp_inc", X_SIZE-1, Y_SIZE);
    578578   DspinSignals<dspin_rsp_width>** signal_dspin_h_rsp_dec =
    579       alloc_elems<DspinSignals<dspin_rsp_width> >("signal_dspin_h_rsp_dec", X_SIZE-1, Y_SIZE-1);
     579      alloc_elems<DspinSignals<dspin_rsp_width> >("signal_dspin_h_rsp_dec", X_SIZE-1, Y_SIZE);
    580580
    581581   DspinSignals<dspin_cmd_width>** signal_dspin_h_m2p_inc =
    582       alloc_elems<DspinSignals<dspin_cmd_width> >("signal_dspin_h_m2p_inc", X_SIZE-1, Y_SIZE-1);
     582      alloc_elems<DspinSignals<dspin_cmd_width> >("signal_dspin_h_m2p_inc", X_SIZE-1, Y_SIZE);
    583583   DspinSignals<dspin_cmd_width>** signal_dspin_h_m2p_dec =
    584       alloc_elems<DspinSignals<dspin_cmd_width> >("signal_dspin_h_m2p_dec", X_SIZE-1, Y_SIZE-1);
     584      alloc_elems<DspinSignals<dspin_cmd_width> >("signal_dspin_h_m2p_dec", X_SIZE-1, Y_SIZE);
    585585
    586586   DspinSignals<dspin_rsp_width>** signal_dspin_h_p2m_inc =
    587       alloc_elems<DspinSignals<dspin_rsp_width> >("signal_dspin_h_p2m_inc", X_SIZE-1, Y_SIZE-1);
     587      alloc_elems<DspinSignals<dspin_rsp_width> >("signal_dspin_h_p2m_inc", X_SIZE-1, Y_SIZE);
    588588   DspinSignals<dspin_rsp_width>** signal_dspin_h_p2m_dec =
    589       alloc_elems<DspinSignals<dspin_rsp_width> >("signal_dspin_h_p2m_dec", X_SIZE-1, Y_SIZE-1);
     589      alloc_elems<DspinSignals<dspin_rsp_width> >("signal_dspin_h_p2m_dec", X_SIZE-1, Y_SIZE);
    590590
    591591   DspinSignals<dspin_cmd_width>** signal_dspin_h_cla_inc =
    592       alloc_elems<DspinSignals<dspin_cmd_width> >("signal_dspin_h_cla_inc", X_SIZE-1, Y_SIZE-1);
     592      alloc_elems<DspinSignals<dspin_cmd_width> >("signal_dspin_h_cla_inc", X_SIZE-1, Y_SIZE);
    593593   DspinSignals<dspin_cmd_width>** signal_dspin_h_cla_dec =
    594       alloc_elems<DspinSignals<dspin_cmd_width> >("signal_dspin_h_cla_dec", X_SIZE-1, Y_SIZE-1);
     594      alloc_elems<DspinSignals<dspin_cmd_width> >("signal_dspin_h_cla_dec", X_SIZE-1, Y_SIZE);
    595595
    596596   // Vertical inter-clusters DSPIN signals
    597597   DspinSignals<dspin_cmd_width>** signal_dspin_v_cmd_inc =
    598       alloc_elems<DspinSignals<dspin_cmd_width> >("signal_dspin_v_cmd_inc", X_SIZE, Y_SIZE-2);
     598      alloc_elems<DspinSignals<dspin_cmd_width> >("signal_dspin_v_cmd_inc", X_SIZE, Y_SIZE-1);
    599599   DspinSignals<dspin_cmd_width>** signal_dspin_v_cmd_dec =
    600       alloc_elems<DspinSignals<dspin_cmd_width> >("signal_dspin_v_cmd_dec", X_SIZE, Y_SIZE-2);
     600      alloc_elems<DspinSignals<dspin_cmd_width> >("signal_dspin_v_cmd_dec", X_SIZE, Y_SIZE-1);
    601601
    602602   DspinSignals<dspin_rsp_width>** signal_dspin_v_rsp_inc =
    603       alloc_elems<DspinSignals<dspin_rsp_width> >("signal_dspin_v_rsp_inc", X_SIZE, Y_SIZE-2);
     603      alloc_elems<DspinSignals<dspin_rsp_width> >("signal_dspin_v_rsp_inc", X_SIZE, Y_SIZE-1);
    604604   DspinSignals<dspin_rsp_width>** signal_dspin_v_rsp_dec =
    605       alloc_elems<DspinSignals<dspin_rsp_width> >("signal_dspin_v_rsp_dec", X_SIZE, Y_SIZE-2);
     605      alloc_elems<DspinSignals<dspin_rsp_width> >("signal_dspin_v_rsp_dec", X_SIZE, Y_SIZE-1);
    606606
    607607   DspinSignals<dspin_cmd_width>** signal_dspin_v_m2p_inc =
    608       alloc_elems<DspinSignals<dspin_cmd_width> >("signal_dspin_v_m2p_inc", X_SIZE, Y_SIZE-2);
     608      alloc_elems<DspinSignals<dspin_cmd_width> >("signal_dspin_v_m2p_inc", X_SIZE, Y_SIZE-1);
    609609   DspinSignals<dspin_cmd_width>** signal_dspin_v_m2p_dec =
    610       alloc_elems<DspinSignals<dspin_cmd_width> >("signal_dspin_v_m2p_dec", X_SIZE, Y_SIZE-2);
     610      alloc_elems<DspinSignals<dspin_cmd_width> >("signal_dspin_v_m2p_dec", X_SIZE, Y_SIZE-1);
    611611
    612612   DspinSignals<dspin_rsp_width>** signal_dspin_v_p2m_inc =
    613       alloc_elems<DspinSignals<dspin_rsp_width> >("signal_dspin_v_p2m_inc", X_SIZE, Y_SIZE-2);
     613      alloc_elems<DspinSignals<dspin_rsp_width> >("signal_dspin_v_p2m_inc", X_SIZE, Y_SIZE-1);
    614614   DspinSignals<dspin_rsp_width>** signal_dspin_v_p2m_dec =
    615       alloc_elems<DspinSignals<dspin_rsp_width> >("signal_dspin_v_p2m_dec", X_SIZE, Y_SIZE-2);
     615      alloc_elems<DspinSignals<dspin_rsp_width> >("signal_dspin_v_p2m_dec", X_SIZE, Y_SIZE-1);
    616616
    617617   DspinSignals<dspin_cmd_width>** signal_dspin_v_cla_inc =
    618       alloc_elems<DspinSignals<dspin_cmd_width> >("signal_dspin_v_cla_inc", X_SIZE, Y_SIZE-2);
     618      alloc_elems<DspinSignals<dspin_cmd_width> >("signal_dspin_v_cla_inc", X_SIZE, Y_SIZE-1);
    619619   DspinSignals<dspin_cmd_width>** signal_dspin_v_cla_dec =
    620       alloc_elems<DspinSignals<dspin_cmd_width> >("signal_dspin_v_cla_dec", X_SIZE, Y_SIZE-2);
     620      alloc_elems<DspinSignals<dspin_cmd_width> >("signal_dspin_v_cla_dec", X_SIZE, Y_SIZE-1);
    621621
    622622   // Mesh boundaries DSPIN signals (Most of those signals are not used...)
    623623   DspinSignals<dspin_cmd_width>*** signal_dspin_bound_cmd_in =
    624       alloc_elems<DspinSignals<dspin_cmd_width> >("signal_dspin_bound_cmd_in" , X_SIZE, Y_SIZE-1, 4);
     624      alloc_elems<DspinSignals<dspin_cmd_width> >("signal_dspin_bound_cmd_in" , X_SIZE, Y_SIZE, 4);
    625625   DspinSignals<dspin_cmd_width>*** signal_dspin_bound_cmd_out =
    626       alloc_elems<DspinSignals<dspin_cmd_width> >("signal_dspin_bound_cmd_out", X_SIZE, Y_SIZE-1, 4);
     626      alloc_elems<DspinSignals<dspin_cmd_width> >("signal_dspin_bound_cmd_out", X_SIZE, Y_SIZE, 4);
    627627
    628628   DspinSignals<dspin_rsp_width>*** signal_dspin_bound_rsp_in =
    629       alloc_elems<DspinSignals<dspin_rsp_width> >("signal_dspin_bound_rsp_in" , X_SIZE, Y_SIZE-1, 4);
     629      alloc_elems<DspinSignals<dspin_rsp_width> >("signal_dspin_bound_rsp_in" , X_SIZE, Y_SIZE, 4);
    630630   DspinSignals<dspin_rsp_width>*** signal_dspin_bound_rsp_out =
    631       alloc_elems<DspinSignals<dspin_rsp_width> >("signal_dspin_bound_rsp_out", X_SIZE, Y_SIZE-1, 4);
     631      alloc_elems<DspinSignals<dspin_rsp_width> >("signal_dspin_bound_rsp_out", X_SIZE, Y_SIZE, 4);
    632632
    633633   DspinSignals<dspin_cmd_width>*** signal_dspin_bound_m2p_in =
    634       alloc_elems<DspinSignals<dspin_cmd_width> >("signal_dspin_bound_m2p_in" , X_SIZE, Y_SIZE-1, 4);
     634      alloc_elems<DspinSignals<dspin_cmd_width> >("signal_dspin_bound_m2p_in" , X_SIZE, Y_SIZE, 4);
    635635   DspinSignals<dspin_cmd_width>*** signal_dspin_bound_m2p_out =
    636       alloc_elems<DspinSignals<dspin_cmd_width> >("signal_dspin_bound_m2p_out", X_SIZE, Y_SIZE-1, 4);
     636      alloc_elems<DspinSignals<dspin_cmd_width> >("signal_dspin_bound_m2p_out", X_SIZE, Y_SIZE, 4);
    637637
    638638   DspinSignals<dspin_rsp_width>*** signal_dspin_bound_p2m_in =
    639       alloc_elems<DspinSignals<dspin_rsp_width> >("signal_dspin_bound_p2m_in" , X_SIZE, Y_SIZE-1, 4);
     639      alloc_elems<DspinSignals<dspin_rsp_width> >("signal_dspin_bound_p2m_in" , X_SIZE, Y_SIZE, 4);
    640640   DspinSignals<dspin_rsp_width>*** signal_dspin_bound_p2m_out =
    641       alloc_elems<DspinSignals<dspin_rsp_width> >("signal_dspin_bound_p2m_out", X_SIZE, Y_SIZE-1, 4);
     641      alloc_elems<DspinSignals<dspin_rsp_width> >("signal_dspin_bound_p2m_out", X_SIZE, Y_SIZE, 4);
    642642
    643643   DspinSignals<dspin_cmd_width>*** signal_dspin_bound_cla_in =
    644       alloc_elems<DspinSignals<dspin_cmd_width> >("signal_dspin_bound_cla_in" , X_SIZE, Y_SIZE-1, 4);
     644      alloc_elems<DspinSignals<dspin_cmd_width> >("signal_dspin_bound_cla_in" , X_SIZE, Y_SIZE, 4);
    645645   DspinSignals<dspin_cmd_width>*** signal_dspin_bound_cla_out =
    646       alloc_elems<DspinSignals<dspin_cmd_width> >("signal_dspin_bound_cla_out", X_SIZE, Y_SIZE-1, 4);
     646      alloc_elems<DspinSignals<dspin_cmd_width> >("signal_dspin_bound_cla_out", X_SIZE, Y_SIZE, 4);
    647647
    648648   // VCI signals for iobus and peripherals
    … …  
    684684
    685685   //////////////////////////////////////////////////////////////
    686    // mesh construction: only (X_SIZE) * (Y_SIZE-1) clusters
     686   // mesh construction: only (X_SIZE) * (Y_SIZE) clusters
    687687   //////////////////////////////////////////////////////////////
    688688
    … …  
    690690                   dspin_rsp_width,
    691691                   vci_param_int,
    692                    vci_param_ext>*          clusters[X_SIZE][Y_SIZE-1];
     692                   vci_param_ext>*          clusters[X_SIZE][Y_SIZE];
    693693
    694694#if USE_OPENMP
    … …  
    697697#pragma omp for
    698698#endif
    699         for (size_t i = 0; i  < (X_SIZE * (Y_SIZE-1)); i++)
     699        for (size_t i = 0; i  < (X_SIZE * (Y_SIZE)); i++)
    700700        {
    701             size_t x = i / (Y_SIZE-1);
    702             size_t y = i % (Y_SIZE-1);
     701            size_t x = i / (Y_SIZE);
     702            size_t y = i % (Y_SIZE);
    703703
    704704#if USE_OPENMP
    … …  
    774774    std::cout << std::endl;
    775775 
    776     size_t cluster_io = cluster(X_SIZE-1, Y_SIZE-1);
     776    size_t cluster_io = cluster(X_SIZE-1, Y_SIZE);
    777777
    778778    //////////// vci_local_crossbar 
    … …  
    808808    VciMultiNic<vci_param_int>*
    809809    mnic = new VciMultiNic<vci_param_int>(
    810                 "mnic",
     810             "mnic",
    811811                IntTab(cluster_io, MNIC_TGTID),
    812812                maptabd,
    … …  
    851851                IntTab(cluster_io, IOPI_TGTID),
    852852                32,
    853                 20000000 );
     853                5000 );
    854854
    855855    ////////////// vci_dspin wrappers
    … …  
    976976    wi_iobus->p_resetn                 (signal_resetn);
    977977    wi_iobus->p_vci                    (signal_vci_cmd_to_noc);
    978     wi_iobus->p_dspin_cmd              (signal_dspin_bound_cmd_in[X_SIZE-1][Y_SIZE-2][NORTH]);
    979     wi_iobus->p_dspin_rsp              (signal_dspin_bound_rsp_out[X_SIZE-1][Y_SIZE-2][NORTH]);
     978    wi_iobus->p_dspin_cmd              (signal_dspin_bound_cmd_in[X_SIZE-1][Y_SIZE-1][NORTH]);
     979    wi_iobus->p_dspin_rsp              (signal_dspin_bound_rsp_out[X_SIZE-1][Y_SIZE-1][NORTH]);
    980980
    981981    // vci/dspin wrappers
    … …  
    983983    wt_iobus->p_resetn                 (signal_resetn);
    984984    wt_iobus->p_vci                    (signal_vci_cmd_from_noc);
    985     wt_iobus->p_dspin_cmd              (signal_dspin_bound_cmd_out[X_SIZE-1][Y_SIZE-2][NORTH]);
    986     wt_iobus->p_dspin_rsp              (signal_dspin_bound_rsp_in[X_SIZE-1][Y_SIZE-2][NORTH]);
     985    wt_iobus->p_dspin_cmd              (signal_dspin_bound_cmd_out[X_SIZE-1][Y_SIZE-1][NORTH]);
     986    wt_iobus->p_dspin_rsp              (signal_dspin_bound_rsp_in[X_SIZE-1][Y_SIZE-1][NORTH]);
    987987
    988988    // Clock & RESET for clusters
    989989    for (size_t x = 0; x < (X_SIZE); x++)
    990990    {
    991         for (size_t y = 0; y < (Y_SIZE-1); y++)
     991        for (size_t y = 0; y < (Y_SIZE); y++)
    992992        {
    993993            clusters[x][y]->p_clk                    (signal_clk);
    … …  
    10011001        for (size_t x = 0; x < (X_SIZE-1); x++)
    10021002        {
    1003             for (size_t y = 0; y < (Y_SIZE-1); y++)
     1003            for (size_t y = 0; y < (Y_SIZE); y++)
    10041004            {
    10051005                clusters[x][y]->p_cmd_out[EAST]      (signal_dspin_h_cmd_inc[x][y]);
    … …  
    10331033
    10341034    // Inter Clusters vertical connections
    1035     if (Y_SIZE > 2)
    1036     {
    1037         for (size_t y = 0; y < (Y_SIZE-2); y++)
     1035    if (Y_SIZE > 1)
     1036    {
     1037        for (size_t y = 0; y < (Y_SIZE-1); y++)
    10381038        {
    10391039            for (size_t x = 0; x < X_SIZE; x++)
    … …  
    10691069
    10701070    // East & West boundary cluster connections
    1071     for (size_t y = 0; y < (Y_SIZE-1); y++)
     1071    for (size_t y = 0; y < (Y_SIZE); y++)
    10721072    {
    10731073        clusters[0][y]->p_cmd_in[WEST]           (signal_dspin_bound_cmd_in[0][y][WEST]);
    … …  
    11041104        clusters[x][0]->p_cmd_in[SOUTH]          (signal_dspin_bound_cmd_in[x][0][SOUTH]);
    11051105        clusters[x][0]->p_cmd_out[SOUTH]         (signal_dspin_bound_cmd_out[x][0][SOUTH]);
    1106         clusters[x][Y_SIZE-2]->p_cmd_in[NORTH]   (signal_dspin_bound_cmd_in[x][Y_SIZE-2][NORTH]);
    1107         clusters[x][Y_SIZE-2]->p_cmd_out[NORTH]  (signal_dspin_bound_cmd_out[x][Y_SIZE-2][NORTH]);
     1106        clusters[x][Y_SIZE-1]->p_cmd_in[NORTH]   (signal_dspin_bound_cmd_in[x][Y_SIZE-1][NORTH]);
     1107        clusters[x][Y_SIZE-1]->p_cmd_out[NORTH]  (signal_dspin_bound_cmd_out[x][Y_SIZE-1][NORTH]);
    11081108
    11091109        clusters[x][0]->p_rsp_in[SOUTH]          (signal_dspin_bound_rsp_in[x][0][SOUTH]);
    11101110        clusters[x][0]->p_rsp_out[SOUTH]         (signal_dspin_bound_rsp_out[x][0][SOUTH]);
    1111         clusters[x][Y_SIZE-2]->p_rsp_in[NORTH]   (signal_dspin_bound_rsp_in[x][Y_SIZE-2][NORTH]);
    1112         clusters[x][Y_SIZE-2]->p_rsp_out[NORTH]  (signal_dspin_bound_rsp_out[x][Y_SIZE-2][NORTH]);
     1111        clusters[x][Y_SIZE-1]->p_rsp_in[NORTH]   (signal_dspin_bound_rsp_in[x][Y_SIZE-1][NORTH]);
     1112        clusters[x][Y_SIZE-1]->p_rsp_out[NORTH]  (signal_dspin_bound_rsp_out[x][Y_SIZE-1][NORTH]);
    11131113
    11141114        clusters[x][0]->p_m2p_in[SOUTH]          (signal_dspin_bound_m2p_in[x][0][SOUTH]);
    11151115        clusters[x][0]->p_m2p_out[SOUTH]         (signal_dspin_bound_m2p_out[x][0][SOUTH]);
    1116         clusters[x][Y_SIZE-2]->p_m2p_in[NORTH]   (signal_dspin_bound_m2p_in[x][Y_SIZE-2][NORTH]);
    1117         clusters[x][Y_SIZE-2]->p_m2p_out[NORTH]  (signal_dspin_bound_m2p_out[x][Y_SIZE-2][NORTH]);
     1116        clusters[x][Y_SIZE-1]->p_m2p_in[NORTH]   (signal_dspin_bound_m2p_in[x][Y_SIZE-1][NORTH]);
     1117        clusters[x][Y_SIZE-1]->p_m2p_out[NORTH]  (signal_dspin_bound_m2p_out[x][Y_SIZE-1][NORTH]);
    11181118
    11191119        clusters[x][0]->p_p2m_in[SOUTH]          (signal_dspin_bound_p2m_in[x][0][SOUTH]);
    11201120        clusters[x][0]->p_p2m_out[SOUTH]         (signal_dspin_bound_p2m_out[x][0][SOUTH]);
    1121         clusters[x][Y_SIZE-2]->p_p2m_in[NORTH]   (signal_dspin_bound_p2m_in[x][Y_SIZE-2][NORTH]);
    1122         clusters[x][Y_SIZE-2]->p_p2m_out[NORTH]  (signal_dspin_bound_p2m_out[x][Y_SIZE-2][NORTH]);
     1121        clusters[x][Y_SIZE-1]->p_p2m_in[NORTH]   (signal_dspin_bound_p2m_in[x][Y_SIZE-1][NORTH]);
     1122        clusters[x][Y_SIZE-1]->p_p2m_out[NORTH]  (signal_dspin_bound_p2m_out[x][Y_SIZE-1][NORTH]);
    11231123
    11241124        clusters[x][0]->p_cla_in[SOUTH]          (signal_dspin_bound_cla_in[x][0][SOUTH]);
    11251125        clusters[x][0]->p_cla_out[SOUTH]         (signal_dspin_bound_cla_out[x][0][SOUTH]);
    1126         clusters[x][Y_SIZE-2]->p_cla_in[NORTH]   (signal_dspin_bound_cla_in[x][Y_SIZE-2][NORTH]);
    1127         clusters[x][Y_SIZE-2]->p_cla_out[NORTH]  (signal_dspin_bound_cla_out[x][Y_SIZE-2][NORTH]);
     1126        clusters[x][Y_SIZE-1]->p_cla_in[NORTH]   (signal_dspin_bound_cla_in[x][Y_SIZE-1][NORTH]);
     1127        clusters[x][Y_SIZE-1]->p_cla_out[NORTH]  (signal_dspin_bound_cla_out[x][Y_SIZE-1][NORTH]);
    11281128    }
    11291129
    … …  
    11441144    for (size_t x = 0; x < X_SIZE ; x++)
    11451145    {
    1146         for (size_t y = 0; y < Y_SIZE-1 ; y++)
     1146        for (size_t y = 0; y < Y_SIZE ; y++)
    11471147        {
    11481148            for (size_t face = 0; face < 4; face++)
    11491149            {
    1150                 if ( (x != X_SIZE-1) or (y != Y_SIZE-2) or (face != NORTH) )
     1150                if ( (x != X_SIZE-1) or (y != Y_SIZE-1) or (face != NORTH) )
    11511151                {
    11521152                    signal_dspin_bound_cmd_in [x][y][face].write = false;
    … …  
    12501250                std::ostringstream proc_signame;
    12511251                proc_signame << "[SIG]PROC_" << x << "_" << y << "_" << l ;
    1252                 clusters[x][y]->proc[l]->print_trace();
     1252                clusters[x][y]->proc[l]->print_trace(1);
    12531253                clusters[x][y]->signal_vci_ini_proc[l].print_trace(proc_signame.str());
    12541254
    … …  
    13361336
    13371337            // trace processor interrupts events
    1338             for ( size_t x = 0 ; x < 2 ; x++ )
    1339             for ( size_t y = 0 ; y < 2 ; y++ )
    1340             for ( size_t i = 0 ; i < 4 ; i++ )
     1338            for ( size_t x = 0 ; x < X_SIZE ; x++ )
     1339            for ( size_t y = 0 ; y < Y_SIZE ; y++ )
     1340            for ( size_t i = 0 ; i < NB_PROCS_MAX ; i++ )
    13411341            {
    13421342                if ( clusters[x][y]->signal_proc_irq[i] != prev_irq_proc[x][y][i] )
    … …  
    13581358    }
    13591359    // Free memory
    1360     for (size_t i = 0 ; i  < (X_SIZE * (Y_SIZE-1)) ; i++)
    1361     {
    1362         size_t x = i / (Y_SIZE-1);
    1363         size_t y = i % (Y_SIZE-1);
     1360    for (size_t i = 0 ; i  < (X_SIZE * Y_SIZE) ; i++)
     1361    {
     1362        size_t x = i / (Y_SIZE);
     1363        size_t y = i % (Y_SIZE);
    13641364        delete clusters[x][y];
    13651365    }
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