Index: /trunk/platforms/tsar_generic_leti/top.cpp =================================================================== --- /trunk/platforms/tsar_generic_leti/top.cpp (revision 680) +++ /trunk/platforms/tsar_generic_leti/top.cpp (revision 681) @@ -6,20 +6,20 @@ // This program is released under the GNU public license ///////////////////////////////////////////////////////////////////////// -// This file define a generic TSAR architecture. +// This file define a generic TSAR architecture, fully compatible +// with the VLSI Hardware prototype developped by CEA-LETI and LIP6 +// in the framework of the SHARP project. +// // The processor is a MIPS32 processor wrapped in a GDB server // (this is defined in the tsar_xbar_cluster). // -// The seg_reset_base and seg_kcode_base addresses are not constrained -// to be 0xBFC00000 and 0x80000000. -// -// It does not use an external ROM, as the boot code must be (pre)loaded -// in cluster (0,0) memory. +// It does not use an external ROM, as the boot code is (pre)loaded +// in cluster (0,0) memory at address 0x0. // // The physical address space is 40 bits. // The 8 address MSB bits define the cluster index. // -// The main hardware parameters are the mesh size (X_SIZE / Y_SIZE), -// and the number of ptocessors per cluster (NB_PROCS_MAX). -// The number of clusters cannot be larger than 256. +// The main hardware parameters are the mesh size (X_SIZE & Y_SIZE), +// and the number of processors per cluster (NB_PROCS_MAX). +// The number of clusters cannot be larger than 128. // The number of processors per cluster cannot be larger than 4. // @@ -32,9 +32,9 @@ // - 1 vci_simple_ram (to model the L3 cache). // -// Each processor receive 4 consecutive IRQ lines from the local XICU. +// Each processor receives 4 consecutive IRQ lines from the local XICU. // // In all clusters, the MEMC IRQ line (signaling a late write error) // is connected to XICU HWI[8] -// The cluster (0,0) contains two "internal" peripherals: +// The cluster (0,0) contains two "backup" peripherals: // - one block device controller, whose IRQ is connected to XICU HWI[9]. // - one single channel TTY controller, whose IRQ is connected to XICU HWI[10]. @@ -53,5 +53,5 @@ // // This IOBUS is connected to the north port of the DIR_CMD -// and DIR_RSP routers, in cluster(X_SIZE-1, Y_SIZE-2). +// and DIR_RSP routers, in cluster(X_SIZE-1, Y_SIZE-1). // For all external peripherals, the hardware interrupts (HWI) are // translated to write interrupts (WTI) by the iopic component: @@ -67,6 +67,6 @@ // - X_WIDTH : number of bits for x coordinate (must be 4) // - Y_WIDTH : number of bits for y coordinate (must be 4) -// - X_SIZE : number of clusters in a row -// - Y_SIZE : number of clusters in a column +// - X_SIZE : number of clusters in a row (1,2,4,8,16) +// - Y_SIZE : number of clusters in a column (1,2,4,8) // - NB_PROCS_MAX : number of processors per cluster (1, 2 or 4) // - NB_CMA_CHANNELS : number of CMA channels in I/0 cluster (4 max) @@ -240,5 +240,5 @@ /////////////////////////////////////////////////////////////////////////////////////// -#define MAX_FROZEN_CYCLES 10000 +#define MAX_FROZEN_CYCLES 500000 /////////////////////////////////////////////////////////////////////////////////////// @@ -264,6 +264,6 @@ ////////////////////////////////////////////////////////////////////////////////////// // - 3 segments are replicated in all clusters -// - 2 segments are replicated in cluster[0,0] & [X_SIZE-1,Y_SIZE-1] -// - 4 segments are only in cluster [X_SIZE-1,Y_SIZE-1] +// - 2 segments are only in cluster[0,0] +// - 4 segments are only in cluster [X_SIZE-1,Y_SIZE] // The following values are for segments in cluster 0, // and these 32 bits values must be concatenate with the cluster @@ -271,5 +271,5 @@ ////////////////////////////////////////////////////////////////////////////////////// - // in cluster [0,0] & [X_SIZE-1,Y_SIZE-1] + // in cluster [0,0] & [X_SIZE-1,Y_SIZE] #define MTTY_BASE 0xF4000000 @@ -279,5 +279,5 @@ #define BDEV_SIZE 0x00001000 // 4 Kbytes - // in cluster [X_SIZE-1,Y_SIZE-1] + // in cluster [X_SIZE-1,Y_SIZE] #define FBUF_BASE 0xF3000000 @@ -299,8 +299,8 @@ #define MCFG_BASE 0xE0000000 - #define MCFG_SIZE 0x00001000 // 4 Kbytes per cluster + #define MCFG_SIZE 0x00001000 // 4 Kbytes #define XICU_BASE 0xF0000000 - #define XICU_SIZE 0x00001000 // 4 Kbytes per cluster + #define XICU_SIZE 0x00001000 // 4 Kbytes bool stop_called = false; @@ -346,5 +346,5 @@ size_t y = trace_memc_id & ((1< offset; @@ -502,25 +502,25 @@ IntTab(cluster(0,0),BDEV_TGTID), false)); - // segments for peripherals in cluster_io (X_SIZE-1,Y_SIZE-1) + // segments for peripherals in cluster_io (X_SIZE-1,Y_SIZE) sc_uint offset; - offset = ((sc_uint)cluster(X_SIZE-1,Y_SIZE-1)) << 32; + offset = ((sc_uint)cluster(X_SIZE-1,Y_SIZE)) << 32; maptabd.add(Segment("seg_mtty", MTTY_BASE + offset, MTTY_SIZE, - IntTab(cluster(X_SIZE-1, Y_SIZE-1),MTTY_TGTID), false)); + IntTab(cluster(X_SIZE-1, Y_SIZE),MTTY_TGTID), false)); maptabd.add(Segment("seg_fbuf", FBUF_BASE + offset, FBUF_SIZE, - IntTab(cluster(X_SIZE-1, Y_SIZE-1),FBUF_TGTID), false)); + IntTab(cluster(X_SIZE-1, Y_SIZE),FBUF_TGTID), false)); maptabd.add(Segment("seg_bdev", BDEV_BASE + offset, BDEV_SIZE, - IntTab(cluster(X_SIZE-1, Y_SIZE-1),BDEV_TGTID), false)); + IntTab(cluster(X_SIZE-1, Y_SIZE),BDEV_TGTID), false)); maptabd.add(Segment("seg_mnic", MNIC_BASE + offset, MNIC_SIZE, - IntTab(cluster(X_SIZE-1, Y_SIZE-1),MNIC_TGTID), false)); + IntTab(cluster(X_SIZE-1, Y_SIZE),MNIC_TGTID), false)); maptabd.add(Segment("seg_cdma", CDMA_BASE + offset, CDMA_SIZE, - IntTab(cluster(X_SIZE-1, Y_SIZE-1),CDMA_TGTID), false)); + IntTab(cluster(X_SIZE-1, Y_SIZE),CDMA_TGTID), false)); maptabd.add(Segment("seg_iopi", IOPI_BASE + offset, IOPI_SIZE, - IntTab(cluster(X_SIZE-1, Y_SIZE-1),IOPI_TGTID), false)); + IntTab(cluster(X_SIZE-1, Y_SIZE),IOPI_TGTID), false)); std::cout << maptabd << std::endl; @@ -537,5 +537,5 @@ for (size_t x = 0; x < X_SIZE; x++) { - for (size_t y = 0; y < (Y_SIZE-1) ; y++) + for (size_t y = 0; y < (Y_SIZE) ; y++) { sc_uint offset; @@ -570,79 +570,79 @@ // Horizontal inter-clusters DSPIN signals DspinSignals** signal_dspin_h_cmd_inc = - alloc_elems >("signal_dspin_h_cmd_inc", X_SIZE-1, Y_SIZE-1); + alloc_elems >("signal_dspin_h_cmd_inc", X_SIZE-1, Y_SIZE); DspinSignals** signal_dspin_h_cmd_dec = - alloc_elems >("signal_dspin_h_cmd_dec", X_SIZE-1, Y_SIZE-1); + alloc_elems >("signal_dspin_h_cmd_dec", X_SIZE-1, Y_SIZE); DspinSignals** signal_dspin_h_rsp_inc = - alloc_elems >("signal_dspin_h_rsp_inc", X_SIZE-1, Y_SIZE-1); + alloc_elems >("signal_dspin_h_rsp_inc", X_SIZE-1, Y_SIZE); DspinSignals** signal_dspin_h_rsp_dec = - alloc_elems >("signal_dspin_h_rsp_dec", X_SIZE-1, Y_SIZE-1); + alloc_elems >("signal_dspin_h_rsp_dec", X_SIZE-1, Y_SIZE); DspinSignals** signal_dspin_h_m2p_inc = - alloc_elems >("signal_dspin_h_m2p_inc", X_SIZE-1, Y_SIZE-1); + alloc_elems >("signal_dspin_h_m2p_inc", X_SIZE-1, Y_SIZE); DspinSignals** signal_dspin_h_m2p_dec = - alloc_elems >("signal_dspin_h_m2p_dec", X_SIZE-1, Y_SIZE-1); + alloc_elems >("signal_dspin_h_m2p_dec", X_SIZE-1, Y_SIZE); DspinSignals** signal_dspin_h_p2m_inc = - alloc_elems >("signal_dspin_h_p2m_inc", X_SIZE-1, Y_SIZE-1); + alloc_elems >("signal_dspin_h_p2m_inc", X_SIZE-1, Y_SIZE); DspinSignals** signal_dspin_h_p2m_dec = - alloc_elems >("signal_dspin_h_p2m_dec", X_SIZE-1, Y_SIZE-1); + alloc_elems >("signal_dspin_h_p2m_dec", X_SIZE-1, Y_SIZE); DspinSignals** signal_dspin_h_cla_inc = - alloc_elems >("signal_dspin_h_cla_inc", X_SIZE-1, Y_SIZE-1); + alloc_elems >("signal_dspin_h_cla_inc", X_SIZE-1, Y_SIZE); DspinSignals** signal_dspin_h_cla_dec = - alloc_elems >("signal_dspin_h_cla_dec", X_SIZE-1, Y_SIZE-1); + alloc_elems >("signal_dspin_h_cla_dec", X_SIZE-1, Y_SIZE); // Vertical inter-clusters DSPIN signals DspinSignals** signal_dspin_v_cmd_inc = - alloc_elems >("signal_dspin_v_cmd_inc", X_SIZE, Y_SIZE-2); + alloc_elems >("signal_dspin_v_cmd_inc", X_SIZE, Y_SIZE-1); DspinSignals** signal_dspin_v_cmd_dec = - alloc_elems >("signal_dspin_v_cmd_dec", X_SIZE, Y_SIZE-2); + alloc_elems >("signal_dspin_v_cmd_dec", X_SIZE, Y_SIZE-1); DspinSignals** signal_dspin_v_rsp_inc = - alloc_elems >("signal_dspin_v_rsp_inc", X_SIZE, Y_SIZE-2); + alloc_elems >("signal_dspin_v_rsp_inc", X_SIZE, Y_SIZE-1); DspinSignals** signal_dspin_v_rsp_dec = - alloc_elems >("signal_dspin_v_rsp_dec", X_SIZE, Y_SIZE-2); + alloc_elems >("signal_dspin_v_rsp_dec", X_SIZE, Y_SIZE-1); DspinSignals** signal_dspin_v_m2p_inc = - alloc_elems >("signal_dspin_v_m2p_inc", X_SIZE, Y_SIZE-2); + alloc_elems >("signal_dspin_v_m2p_inc", X_SIZE, Y_SIZE-1); DspinSignals** signal_dspin_v_m2p_dec = - alloc_elems >("signal_dspin_v_m2p_dec", X_SIZE, Y_SIZE-2); + alloc_elems >("signal_dspin_v_m2p_dec", X_SIZE, Y_SIZE-1); DspinSignals** signal_dspin_v_p2m_inc = - alloc_elems >("signal_dspin_v_p2m_inc", X_SIZE, Y_SIZE-2); + alloc_elems >("signal_dspin_v_p2m_inc", X_SIZE, Y_SIZE-1); DspinSignals** signal_dspin_v_p2m_dec = - alloc_elems >("signal_dspin_v_p2m_dec", X_SIZE, Y_SIZE-2); + alloc_elems >("signal_dspin_v_p2m_dec", X_SIZE, Y_SIZE-1); DspinSignals** signal_dspin_v_cla_inc = - alloc_elems >("signal_dspin_v_cla_inc", X_SIZE, Y_SIZE-2); + alloc_elems >("signal_dspin_v_cla_inc", X_SIZE, Y_SIZE-1); DspinSignals** signal_dspin_v_cla_dec = - alloc_elems >("signal_dspin_v_cla_dec", X_SIZE, Y_SIZE-2); + alloc_elems >("signal_dspin_v_cla_dec", X_SIZE, Y_SIZE-1); // Mesh boundaries DSPIN signals (Most of those signals are not used...) DspinSignals*** signal_dspin_bound_cmd_in = - alloc_elems >("signal_dspin_bound_cmd_in" , X_SIZE, Y_SIZE-1, 4); + alloc_elems >("signal_dspin_bound_cmd_in" , X_SIZE, Y_SIZE, 4); DspinSignals*** signal_dspin_bound_cmd_out = - alloc_elems >("signal_dspin_bound_cmd_out", X_SIZE, Y_SIZE-1, 4); + alloc_elems >("signal_dspin_bound_cmd_out", X_SIZE, Y_SIZE, 4); DspinSignals*** signal_dspin_bound_rsp_in = - alloc_elems >("signal_dspin_bound_rsp_in" , X_SIZE, Y_SIZE-1, 4); + alloc_elems >("signal_dspin_bound_rsp_in" , X_SIZE, Y_SIZE, 4); DspinSignals*** signal_dspin_bound_rsp_out = - alloc_elems >("signal_dspin_bound_rsp_out", X_SIZE, Y_SIZE-1, 4); + alloc_elems >("signal_dspin_bound_rsp_out", X_SIZE, Y_SIZE, 4); DspinSignals*** signal_dspin_bound_m2p_in = - alloc_elems >("signal_dspin_bound_m2p_in" , X_SIZE, Y_SIZE-1, 4); + alloc_elems >("signal_dspin_bound_m2p_in" , X_SIZE, Y_SIZE, 4); DspinSignals*** signal_dspin_bound_m2p_out = - alloc_elems >("signal_dspin_bound_m2p_out", X_SIZE, Y_SIZE-1, 4); + alloc_elems >("signal_dspin_bound_m2p_out", X_SIZE, Y_SIZE, 4); DspinSignals*** signal_dspin_bound_p2m_in = - alloc_elems >("signal_dspin_bound_p2m_in" , X_SIZE, Y_SIZE-1, 4); + alloc_elems >("signal_dspin_bound_p2m_in" , X_SIZE, Y_SIZE, 4); DspinSignals*** signal_dspin_bound_p2m_out = - alloc_elems >("signal_dspin_bound_p2m_out", X_SIZE, Y_SIZE-1, 4); + alloc_elems >("signal_dspin_bound_p2m_out", X_SIZE, Y_SIZE, 4); DspinSignals*** signal_dspin_bound_cla_in = - alloc_elems >("signal_dspin_bound_cla_in" , X_SIZE, Y_SIZE-1, 4); + alloc_elems >("signal_dspin_bound_cla_in" , X_SIZE, Y_SIZE, 4); DspinSignals*** signal_dspin_bound_cla_out = - alloc_elems >("signal_dspin_bound_cla_out", X_SIZE, Y_SIZE-1, 4); + alloc_elems >("signal_dspin_bound_cla_out", X_SIZE, Y_SIZE, 4); // VCI signals for iobus and peripherals @@ -684,5 +684,5 @@ ////////////////////////////////////////////////////////////// - // mesh construction: only (X_SIZE) * (Y_SIZE-1) clusters + // mesh construction: only (X_SIZE) * (Y_SIZE) clusters ////////////////////////////////////////////////////////////// @@ -690,5 +690,5 @@ dspin_rsp_width, vci_param_int, - vci_param_ext>* clusters[X_SIZE][Y_SIZE-1]; + vci_param_ext>* clusters[X_SIZE][Y_SIZE]; #if USE_OPENMP @@ -697,8 +697,8 @@ #pragma omp for #endif - for (size_t i = 0; i < (X_SIZE * (Y_SIZE-1)); i++) + for (size_t i = 0; i < (X_SIZE * (Y_SIZE)); i++) { - size_t x = i / (Y_SIZE-1); - size_t y = i % (Y_SIZE-1); + size_t x = i / (Y_SIZE); + size_t y = i % (Y_SIZE); #if USE_OPENMP @@ -774,5 +774,5 @@ std::cout << std::endl; - size_t cluster_io = cluster(X_SIZE-1, Y_SIZE-1); + size_t cluster_io = cluster(X_SIZE-1, Y_SIZE); //////////// vci_local_crossbar @@ -808,5 +808,5 @@ VciMultiNic* mnic = new VciMultiNic( - "mnic", + "mnic", IntTab(cluster_io, MNIC_TGTID), maptabd, @@ -851,5 +851,5 @@ IntTab(cluster_io, IOPI_TGTID), 32, - 20000000 ); + 5000 ); ////////////// vci_dspin wrappers @@ -976,6 +976,6 @@ wi_iobus->p_resetn (signal_resetn); wi_iobus->p_vci (signal_vci_cmd_to_noc); - wi_iobus->p_dspin_cmd (signal_dspin_bound_cmd_in[X_SIZE-1][Y_SIZE-2][NORTH]); - wi_iobus->p_dspin_rsp (signal_dspin_bound_rsp_out[X_SIZE-1][Y_SIZE-2][NORTH]); + wi_iobus->p_dspin_cmd (signal_dspin_bound_cmd_in[X_SIZE-1][Y_SIZE-1][NORTH]); + wi_iobus->p_dspin_rsp (signal_dspin_bound_rsp_out[X_SIZE-1][Y_SIZE-1][NORTH]); // vci/dspin wrappers @@ -983,11 +983,11 @@ wt_iobus->p_resetn (signal_resetn); wt_iobus->p_vci (signal_vci_cmd_from_noc); - wt_iobus->p_dspin_cmd (signal_dspin_bound_cmd_out[X_SIZE-1][Y_SIZE-2][NORTH]); - wt_iobus->p_dspin_rsp (signal_dspin_bound_rsp_in[X_SIZE-1][Y_SIZE-2][NORTH]); + wt_iobus->p_dspin_cmd (signal_dspin_bound_cmd_out[X_SIZE-1][Y_SIZE-1][NORTH]); + wt_iobus->p_dspin_rsp (signal_dspin_bound_rsp_in[X_SIZE-1][Y_SIZE-1][NORTH]); // Clock & RESET for clusters for (size_t x = 0; x < (X_SIZE); x++) { - for (size_t y = 0; y < (Y_SIZE-1); y++) + for (size_t y = 0; y < (Y_SIZE); y++) { clusters[x][y]->p_clk (signal_clk); @@ -1001,5 +1001,5 @@ for (size_t x = 0; x < (X_SIZE-1); x++) { - for (size_t y = 0; y < (Y_SIZE-1); y++) + for (size_t y = 0; y < (Y_SIZE); y++) { clusters[x][y]->p_cmd_out[EAST] (signal_dspin_h_cmd_inc[x][y]); @@ -1033,7 +1033,7 @@ // Inter Clusters vertical connections - if (Y_SIZE > 2) - { - for (size_t y = 0; y < (Y_SIZE-2); y++) + if (Y_SIZE > 1) + { + for (size_t y = 0; y < (Y_SIZE-1); y++) { for (size_t x = 0; x < X_SIZE; x++) @@ -1069,5 +1069,5 @@ // East & West boundary cluster connections - for (size_t y = 0; y < (Y_SIZE-1); y++) + for (size_t y = 0; y < (Y_SIZE); y++) { clusters[0][y]->p_cmd_in[WEST] (signal_dspin_bound_cmd_in[0][y][WEST]); @@ -1104,26 +1104,26 @@ clusters[x][0]->p_cmd_in[SOUTH] (signal_dspin_bound_cmd_in[x][0][SOUTH]); clusters[x][0]->p_cmd_out[SOUTH] (signal_dspin_bound_cmd_out[x][0][SOUTH]); - clusters[x][Y_SIZE-2]->p_cmd_in[NORTH] (signal_dspin_bound_cmd_in[x][Y_SIZE-2][NORTH]); - clusters[x][Y_SIZE-2]->p_cmd_out[NORTH] (signal_dspin_bound_cmd_out[x][Y_SIZE-2][NORTH]); + clusters[x][Y_SIZE-1]->p_cmd_in[NORTH] (signal_dspin_bound_cmd_in[x][Y_SIZE-1][NORTH]); + clusters[x][Y_SIZE-1]->p_cmd_out[NORTH] (signal_dspin_bound_cmd_out[x][Y_SIZE-1][NORTH]); clusters[x][0]->p_rsp_in[SOUTH] (signal_dspin_bound_rsp_in[x][0][SOUTH]); clusters[x][0]->p_rsp_out[SOUTH] (signal_dspin_bound_rsp_out[x][0][SOUTH]); - clusters[x][Y_SIZE-2]->p_rsp_in[NORTH] (signal_dspin_bound_rsp_in[x][Y_SIZE-2][NORTH]); - clusters[x][Y_SIZE-2]->p_rsp_out[NORTH] (signal_dspin_bound_rsp_out[x][Y_SIZE-2][NORTH]); + clusters[x][Y_SIZE-1]->p_rsp_in[NORTH] (signal_dspin_bound_rsp_in[x][Y_SIZE-1][NORTH]); + clusters[x][Y_SIZE-1]->p_rsp_out[NORTH] (signal_dspin_bound_rsp_out[x][Y_SIZE-1][NORTH]); clusters[x][0]->p_m2p_in[SOUTH] (signal_dspin_bound_m2p_in[x][0][SOUTH]); clusters[x][0]->p_m2p_out[SOUTH] (signal_dspin_bound_m2p_out[x][0][SOUTH]); - clusters[x][Y_SIZE-2]->p_m2p_in[NORTH] (signal_dspin_bound_m2p_in[x][Y_SIZE-2][NORTH]); - clusters[x][Y_SIZE-2]->p_m2p_out[NORTH] (signal_dspin_bound_m2p_out[x][Y_SIZE-2][NORTH]); + clusters[x][Y_SIZE-1]->p_m2p_in[NORTH] (signal_dspin_bound_m2p_in[x][Y_SIZE-1][NORTH]); + clusters[x][Y_SIZE-1]->p_m2p_out[NORTH] (signal_dspin_bound_m2p_out[x][Y_SIZE-1][NORTH]); clusters[x][0]->p_p2m_in[SOUTH] (signal_dspin_bound_p2m_in[x][0][SOUTH]); clusters[x][0]->p_p2m_out[SOUTH] (signal_dspin_bound_p2m_out[x][0][SOUTH]); - clusters[x][Y_SIZE-2]->p_p2m_in[NORTH] (signal_dspin_bound_p2m_in[x][Y_SIZE-2][NORTH]); - clusters[x][Y_SIZE-2]->p_p2m_out[NORTH] (signal_dspin_bound_p2m_out[x][Y_SIZE-2][NORTH]); + clusters[x][Y_SIZE-1]->p_p2m_in[NORTH] (signal_dspin_bound_p2m_in[x][Y_SIZE-1][NORTH]); + clusters[x][Y_SIZE-1]->p_p2m_out[NORTH] (signal_dspin_bound_p2m_out[x][Y_SIZE-1][NORTH]); clusters[x][0]->p_cla_in[SOUTH] (signal_dspin_bound_cla_in[x][0][SOUTH]); clusters[x][0]->p_cla_out[SOUTH] (signal_dspin_bound_cla_out[x][0][SOUTH]); - clusters[x][Y_SIZE-2]->p_cla_in[NORTH] (signal_dspin_bound_cla_in[x][Y_SIZE-2][NORTH]); - clusters[x][Y_SIZE-2]->p_cla_out[NORTH] (signal_dspin_bound_cla_out[x][Y_SIZE-2][NORTH]); + clusters[x][Y_SIZE-1]->p_cla_in[NORTH] (signal_dspin_bound_cla_in[x][Y_SIZE-1][NORTH]); + clusters[x][Y_SIZE-1]->p_cla_out[NORTH] (signal_dspin_bound_cla_out[x][Y_SIZE-1][NORTH]); } @@ -1144,9 +1144,9 @@ for (size_t x = 0; x < X_SIZE ; x++) { - for (size_t y = 0; y < Y_SIZE-1 ; y++) + for (size_t y = 0; y < Y_SIZE ; y++) { for (size_t face = 0; face < 4; face++) { - if ( (x != X_SIZE-1) or (y != Y_SIZE-2) or (face != NORTH) ) + if ( (x != X_SIZE-1) or (y != Y_SIZE-1) or (face != NORTH) ) { signal_dspin_bound_cmd_in [x][y][face].write = false; @@ -1250,5 +1250,5 @@ std::ostringstream proc_signame; proc_signame << "[SIG]PROC_" << x << "_" << y << "_" << l ; - clusters[x][y]->proc[l]->print_trace(); + clusters[x][y]->proc[l]->print_trace(1); clusters[x][y]->signal_vci_ini_proc[l].print_trace(proc_signame.str()); @@ -1336,7 +1336,7 @@ // trace processor interrupts events - for ( size_t x = 0 ; x < 2 ; x++ ) - for ( size_t y = 0 ; y < 2 ; y++ ) - for ( size_t i = 0 ; i < 4 ; i++ ) + for ( size_t x = 0 ; x < X_SIZE ; x++ ) + for ( size_t y = 0 ; y < Y_SIZE ; y++ ) + for ( size_t i = 0 ; i < NB_PROCS_MAX ; i++ ) { if ( clusters[x][y]->signal_proc_irq[i] != prev_irq_proc[x][y][i] ) @@ -1358,8 +1358,8 @@ } // Free memory - for (size_t i = 0 ; i < (X_SIZE * (Y_SIZE-1)) ; i++) - { - size_t x = i / (Y_SIZE-1); - size_t y = i % (Y_SIZE-1); + for (size_t i = 0 ; i < (X_SIZE * Y_SIZE) ; i++) + { + size_t x = i / (Y_SIZE); + size_t y = i % (Y_SIZE); delete clusters[x][y]; }