Index: trunk/platforms/tsar_generic_iob/tsar_iob_cluster/caba/metadata/tsar_iob_cluster.sd
===================================================================
--- trunk/platforms/tsar_generic_iob/tsar_iob_cluster/caba/metadata/tsar_iob_cluster.sd	(revision 607)
+++ trunk/platforms/tsar_generic_iob/tsar_iob_cluster/caba/metadata/tsar_iob_cluster.sd	(revision 693)
@@ -3,33 +3,33 @@
 
 Module('caba:tsar_iob_cluster',
-	classname = 'soclib::caba::TsarIobCluster',
+    classname = 'soclib::caba::TsarIobCluster',
 
-	tmpl_parameters = [
-		parameter.Module('vci_param_int', default = 'caba:vci_param', 
+    tmpl_parameters = [
+        parameter.Module('vci_param_int', default = 'caba:vci_param', 
                           cell_size = parameter.Reference('vci_data_width_int')),
-		parameter.Module('vci_param_ext', default = 'caba:vci_param', 
+        parameter.Module('vci_param_ext', default = 'caba:vci_param', 
                           cell_size = parameter.Reference('vci_data_width_ext')),
-		parameter.Int('dspin_int_cmd_width'),
-		parameter.Int('dspin_int_rsp_width'),
-		parameter.Int('dspin_ram_cmd_width'),
-		parameter.Int('dspin_ram_rsp_width'),
-	],
+        parameter.Int('dspin_int_cmd_width'),
+        parameter.Int('dspin_int_rsp_width'),
+        parameter.Int('dspin_ram_cmd_width'),
+        parameter.Int('dspin_ram_rsp_width'),
+    ],
 
-	header_files = [ 
+    header_files = [ 
         '../source/include/tsar_iob_cluster.h', 
     ],
 
-	implementation_files = [ 
+    implementation_files = [ 
         '../source/src/tsar_iob_cluster.cpp', 
     ],
 
-	uses = [
-		Uses('caba:base_module'),
-		Uses('common:mapping_table'),
-		Uses('common:iss2'),
-		Uses('common:elf_file_loader'),
+    uses = [
+        Uses('caba:base_module'),
+        Uses('common:mapping_table'),
+        Uses('common:iss2'),
+        Uses('common:elf_file_loader'),
 
         # internal network components
-		Uses('caba:vci_cc_vcache_wrapper', 
+        Uses('caba:vci_cc_vcache_wrapper', 
               cell_size          = parameter.Reference('vci_data_width_int'),
               dspin_in_width     = parameter.Reference('dspin_int_cmd_width'),
@@ -38,5 +38,5 @@
               gdb_iss_t          = 'common:mips32el'),
 
-		Uses('caba:vci_mem_cache',
+        Uses('caba:vci_mem_cache',
               memc_cell_size_int = parameter.Reference('vci_data_width_int'),
               memc_cell_size_ext = parameter.Reference('vci_data_width_ext'),
@@ -47,5 +47,8 @@
               cell_size          = parameter.Reference('vci_data_width_int')),
 
-		Uses('caba:vci_multi_dma',
+        Uses('caba:vci_multi_dma',
+              cell_size          = parameter.Reference('vci_data_width_int')),
+
+        Uses('caba:vci_local_crossbar', 
               cell_size          = parameter.Reference('vci_data_width_int')),
 
@@ -89,5 +92,5 @@
               flit_width         = parameter.Reference('dspin_ram_rsp_width')),
 
-		Uses('caba:vci_simple_ram',
+        Uses('caba:vci_simple_ram',
               cell_size          = parameter.Reference('vci_data_width_ext')),
 
@@ -96,28 +99,28 @@
               iob_cell_size_int  = parameter.Reference('vci_data_width_int'),
               iob_cell_size_ext  = parameter.Reference('vci_data_width_ext')),
-		],
+        ],
 
-	ports = [
-		Port('caba:bit_in', 'p_resetn', auto = 'resetn'),
-		Port('caba:clock_in', 'p_clk', auto = 'clock'),
+    ports = [
+        Port('caba:bit_in', 'p_resetn', auto = 'resetn'),
+        Port('caba:clock_in', 'p_clk', auto = 'clock'),
 
-		Port('caba:dspin_output', 'p_int_cmd_out', [4, 3], 
+        Port('caba:dspin_output', 'p_int_cmd_out', [4, 3], 
               dspin_data_size = parameter.Reference('dspin_int_cmd_width')),
-		Port('caba:dspin_input', 'p_int_cmd_in', [4, 3], 
+        Port('caba:dspin_input', 'p_int_cmd_in', [4, 3], 
               dspin_data_size = parameter.Reference('dspin_int_cmd_width')),
-		Port('caba:dspin_output', 'p_int_rsp_out', [4, 2], 
+        Port('caba:dspin_output', 'p_int_rsp_out', [4, 2], 
               dspin_data_size = parameter.Reference('dspin_int_rsp_width')), 
-		Port('caba:dspin_input', 'p_int_rsp_in', [4, 2], 
+        Port('caba:dspin_input', 'p_int_rsp_in', [4, 2], 
               dspin_data_size = parameter.Reference('dspin_int_rsp_width')),
 
-		Port('caba:dspin_output', 'p_ram_cmd_out', [4], 
+        Port('caba:dspin_output', 'p_ram_cmd_out', [4], 
               dspin_data_size = parameter.Reference('dspin_ram_cmd_width')),
-		Port('caba:dspin_input', 'p_ram_cmd_in', [4], 
+        Port('caba:dspin_input', 'p_ram_cmd_in', [4], 
               dspin_data_size = parameter.Reference('dspin_ram_cmd_width')),
-		Port('caba:dspin_output', 'p_ram_rsp_out', [4], 
+        Port('caba:dspin_output', 'p_ram_rsp_out', [4], 
               dspin_data_size = parameter.Reference('dspin_ram_rsp_width')), 
-		Port('caba:dspin_input', 'p_ram_rsp_in', [4], 
+        Port('caba:dspin_input', 'p_ram_rsp_in', [4], 
               dspin_data_size = parameter.Reference('dspin_ram_rsp_width')),
-		],
+        ],
 )
 
Index: trunk/platforms/tsar_generic_iob/tsar_iob_cluster/caba/source/include/tsar_iob_cluster.h
===================================================================
--- trunk/platforms/tsar_generic_iob/tsar_iob_cluster/caba/source/include/tsar_iob_cluster.h	(revision 607)
+++ trunk/platforms/tsar_generic_iob/tsar_iob_cluster/caba/source/include/tsar_iob_cluster.h	(revision 693)
@@ -22,4 +22,5 @@
 #include "vci_simple_ram.h"
 #include "vci_xicu.h"
+#include "vci_local_crossbar.h"
 #include "dspin_local_crossbar.h"
 #include "vci_dspin_initiator_wrapper.h"
@@ -32,5 +33,5 @@
 #include "vci_io_bridge.h"
 
-namespace soclib { namespace caba	{
+namespace soclib { namespace caba   {
 
 ///////////////////////////////////////////////////////////////////////////
@@ -48,7 +49,7 @@
   public:
 
-	// Ports
-    sc_in<bool>                             		   p_clk;
-    sc_in<bool>                             		   p_resetn;
+    // Ports
+    sc_in<bool>                                        p_clk;
+    sc_in<bool>                                        p_resetn;
 
     // Thes two ports are used to connect IOB to IOX nework in top cell
@@ -64,77 +65,63 @@
 
     // These arrays of ports are used to connect the INT & RAM networks in top cell
-	soclib::caba::DspinOutput<dspin_int_cmd_width>**   p_dspin_int_cmd_out;
-	soclib::caba::DspinInput<dspin_int_cmd_width>**    p_dspin_int_cmd_in;
+    soclib::caba::DspinOutput<dspin_int_cmd_width>**   p_dspin_int_cmd_out;
+    soclib::caba::DspinInput<dspin_int_cmd_width>**    p_dspin_int_cmd_in;
     soclib::caba::DspinOutput<dspin_int_rsp_width>**   p_dspin_int_rsp_out;
     soclib::caba::DspinInput<dspin_int_rsp_width>**    p_dspin_int_rsp_in;
 
-	soclib::caba::DspinOutput<dspin_ram_cmd_width>*    p_dspin_ram_cmd_out;
-	soclib::caba::DspinInput<dspin_ram_cmd_width>*     p_dspin_ram_cmd_in;
+    soclib::caba::DspinOutput<dspin_ram_cmd_width>*    p_dspin_ram_cmd_out;
+    soclib::caba::DspinInput<dspin_ram_cmd_width>*     p_dspin_ram_cmd_in;
     soclib::caba::DspinOutput<dspin_ram_rsp_width>*    p_dspin_ram_rsp_out;
     soclib::caba::DspinInput<dspin_ram_rsp_width>*     p_dspin_ram_rsp_in;
 
     // interrupt signals
-	sc_signal<bool>     	              signal_false;
-	sc_signal<bool> 		              signal_proc_it[8];
-	sc_signal<bool> 		              signal_irq_mdma[8];
-	sc_signal<bool> 		              signal_irq_memc;
-	
-	// INT network DSPIN signals between DSPIN routers and DSPIN local_crossbars
-	DspinSignals<dspin_int_cmd_width>     signal_int_dspin_cmd_l2g_d; 
-	DspinSignals<dspin_int_cmd_width>     signal_int_dspin_cmd_g2l_d; 
-	DspinSignals<dspin_int_cmd_width>     signal_int_dspin_m2p_l2g_c;
-	DspinSignals<dspin_int_cmd_width>     signal_int_dspin_m2p_g2l_c; 
-	DspinSignals<dspin_int_cmd_width>     signal_int_dspin_clack_l2g_c;
-	DspinSignals<dspin_int_cmd_width>     signal_int_dspin_clack_g2l_c;
-	DspinSignals<dspin_int_rsp_width>     signal_int_dspin_rsp_l2g_d; 
-	DspinSignals<dspin_int_rsp_width>     signal_int_dspin_rsp_g2l_d; 
-	DspinSignals<dspin_int_rsp_width>     signal_int_dspin_p2m_l2g_c;
-	DspinSignals<dspin_int_rsp_width>     signal_int_dspin_p2m_g2l_c;
-
-	// INT network VCI signals between VCI components and VCI/DSPIN wrappers
-	VciSignals<vci_param_int> 	          signal_int_vci_ini_proc[8]; 
-	VciSignals<vci_param_int>  	          signal_int_vci_ini_mdma; 
-	VciSignals<vci_param_int>  	          signal_int_vci_ini_iobx; 
-
-	VciSignals<vci_param_int>	          signal_int_vci_tgt_memc;
-	VciSignals<vci_param_int> 	          signal_int_vci_tgt_xicu;
-	VciSignals<vci_param_int>             signal_int_vci_tgt_mdma;
-	VciSignals<vci_param_int>             signal_int_vci_tgt_iobx;
-
-	// INT network DSPIN signals between DSPIN local crossbars and VCI/DSPIN wrappers
-	DspinSignals<dspin_int_cmd_width>     signal_int_dspin_cmd_proc_i[8];
-	DspinSignals<dspin_int_rsp_width>     signal_int_dspin_rsp_proc_i[8];
-	DspinSignals<dspin_int_cmd_width>     signal_int_dspin_cmd_mdma_i;
-	DspinSignals<dspin_int_rsp_width>     signal_int_dspin_rsp_mdma_i;
-	DspinSignals<dspin_int_cmd_width>     signal_int_dspin_cmd_iobx_i;
-	DspinSignals<dspin_int_rsp_width>     signal_int_dspin_rsp_iobx_i;
-
-	DspinSignals<dspin_int_cmd_width>     signal_int_dspin_cmd_memc_t;
-	DspinSignals<dspin_int_rsp_width>     signal_int_dspin_rsp_memc_t;
-	DspinSignals<dspin_int_cmd_width>     signal_int_dspin_cmd_xicu_t;
-	DspinSignals<dspin_int_rsp_width>     signal_int_dspin_rsp_xicu_t;
-	DspinSignals<dspin_int_cmd_width>     signal_int_dspin_cmd_mdma_t;
-	DspinSignals<dspin_int_rsp_width>     signal_int_dspin_rsp_mdma_t;
-	DspinSignals<dspin_int_cmd_width>     signal_int_dspin_cmd_iobx_t;
-	DspinSignals<dspin_int_rsp_width>     signal_int_dspin_rsp_iobx_t;
-
-	// Coherence DSPIN signals between DSPIN local crossbars and CC components 
-	DspinSignals<dspin_int_cmd_width>     signal_int_dspin_m2p_memc;
-	DspinSignals<dspin_int_cmd_width>     signal_int_dspin_clack_memc;
-	DspinSignals<dspin_int_rsp_width>     signal_int_dspin_p2m_memc;
-	DspinSignals<dspin_int_cmd_width>     signal_int_dspin_m2p_proc[8];
-	DspinSignals<dspin_int_cmd_width>     signal_int_dspin_clack_proc[8];
-	DspinSignals<dspin_int_rsp_width>     signal_int_dspin_p2m_proc[8];
-
-	// RAM network VCI signals between VCI components and VCI/DSPIN wrappers
-	VciSignals<vci_param_ext>             signal_ram_vci_ini_memc;
-	VciSignals<vci_param_ext>             signal_ram_vci_ini_iobx;
-	VciSignals<vci_param_ext>             signal_ram_vci_tgt_xram;
+    sc_signal<bool>                       signal_false;
+    sc_signal<bool>                       signal_proc_it[8];
+    sc_signal<bool>                       signal_irq_mdma[8];
+    sc_signal<bool>                       signal_irq_memc;
+    
+    // INT network DSPIN signals between DSPIN routers and DSPIN local_crossbars
+    DspinSignals<dspin_int_cmd_width>     signal_int_dspin_cmd_l2g_d; 
+    DspinSignals<dspin_int_cmd_width>     signal_int_dspin_cmd_g2l_d; 
+    DspinSignals<dspin_int_cmd_width>     signal_int_dspin_m2p_l2g_c;
+    DspinSignals<dspin_int_cmd_width>     signal_int_dspin_m2p_g2l_c; 
+    DspinSignals<dspin_int_cmd_width>     signal_int_dspin_clack_l2g_c;
+    DspinSignals<dspin_int_cmd_width>     signal_int_dspin_clack_g2l_c;
+    DspinSignals<dspin_int_rsp_width>     signal_int_dspin_rsp_l2g_d; 
+    DspinSignals<dspin_int_rsp_width>     signal_int_dspin_rsp_g2l_d; 
+    DspinSignals<dspin_int_rsp_width>     signal_int_dspin_p2m_l2g_c;
+    DspinSignals<dspin_int_rsp_width>     signal_int_dspin_p2m_g2l_c;
+
+    // INT network VCI signals between VCI components and VCI local crossbar
+    VciSignals<vci_param_int>             signal_int_vci_ini_proc[8]; 
+    VciSignals<vci_param_int>             signal_int_vci_ini_mdma; 
+    VciSignals<vci_param_int>             signal_int_vci_ini_iobx; 
+
+    VciSignals<vci_param_int>             signal_int_vci_tgt_memc;
+    VciSignals<vci_param_int>             signal_int_vci_tgt_xicu;
+    VciSignals<vci_param_int>             signal_int_vci_tgt_mdma;
+    VciSignals<vci_param_int>             signal_int_vci_tgt_iobx;
+
+    VciSignals<vci_param_int>             signal_int_vci_l2g;
+    VciSignals<vci_param_int>             signal_int_vci_g2l;
+
+    // Coherence DSPIN signals between DSPIN local crossbars and CC components 
+    DspinSignals<dspin_int_cmd_width>     signal_int_dspin_m2p_memc;
+    DspinSignals<dspin_int_cmd_width>     signal_int_dspin_clack_memc;
+    DspinSignals<dspin_int_rsp_width>     signal_int_dspin_p2m_memc;
+    DspinSignals<dspin_int_cmd_width>     signal_int_dspin_m2p_proc[8];
+    DspinSignals<dspin_int_cmd_width>     signal_int_dspin_clack_proc[8];
+    DspinSignals<dspin_int_rsp_width>     signal_int_dspin_p2m_proc[8];
+
+    // RAM network VCI signals between VCI components and VCI/DSPIN wrappers
+    VciSignals<vci_param_ext>             signal_ram_vci_ini_memc;
+    VciSignals<vci_param_ext>             signal_ram_vci_ini_iobx;
+    VciSignals<vci_param_ext>             signal_ram_vci_tgt_xram;
 
     // RAM network DSPIN signals between VCI/DSPIN wrappers and routers 
-	DspinSignals<dspin_ram_cmd_width>     signal_ram_dspin_cmd_xram_t;
-	DspinSignals<dspin_ram_rsp_width>     signal_ram_dspin_rsp_xram_t;
-	DspinSignals<dspin_ram_cmd_width>     signal_ram_dspin_cmd_memc_i;
-	DspinSignals<dspin_ram_rsp_width>     signal_ram_dspin_rsp_memc_i;
+    DspinSignals<dspin_ram_cmd_width>     signal_ram_dspin_cmd_xram_t;
+    DspinSignals<dspin_ram_rsp_width>     signal_ram_dspin_rsp_xram_t;
+    DspinSignals<dspin_ram_cmd_width>     signal_ram_dspin_cmd_memc_i;
+    DspinSignals<dspin_ram_rsp_width>     signal_ram_dspin_rsp_memc_i;
   
     //////////////////////////////////////
@@ -146,8 +133,4 @@
                        GdbServer<Mips32ElIss> >*      proc[8];
 
-    VciDspinInitiatorWrapper<vci_param_int,
-                             dspin_int_cmd_width,
-                             dspin_int_rsp_width>*    proc_wi[8];
-
     VciMemCache<vci_param_int,
                 vci_param_ext, 
@@ -155,35 +138,27 @@
                 dspin_int_cmd_width>*                 memc;
 
-    VciDspinTargetWrapper<vci_param_int,
-                          dspin_int_cmd_width,
-                          dspin_int_rsp_width>*       memc_int_wt;
-
     VciDspinInitiatorWrapper<vci_param_ext,
                              dspin_ram_cmd_width,
                              dspin_ram_rsp_width>*    memc_ram_wi;
 
-    VciXicu<vci_param_int>*                   	      xicu;
+    VciXicu<vci_param_int>*                           xicu;
+
+    VciMultiDma<vci_param_int>*                       mdma;
+
+    VciLocalCrossbar<vci_param_int>*                  int_xbar_d;
+    
+    VciDspinInitiatorWrapper<vci_param_int,
+                             dspin_int_cmd_width,
+                             dspin_int_rsp_width>*    int_wi_gate_d;
 
     VciDspinTargetWrapper<vci_param_int,
                           dspin_int_cmd_width,
-                          dspin_int_rsp_width>*       xicu_int_wt;
-
-    VciMultiDma<vci_param_int>*                       mdma;
-
-    VciDspinInitiatorWrapper<vci_param_int,
-                             dspin_int_cmd_width,
-                             dspin_int_rsp_width>*    mdma_int_wi;
-
-    VciDspinTargetWrapper<vci_param_int,
-                          dspin_int_cmd_width,
-                          dspin_int_rsp_width>*       mdma_int_wt;
-
-    DspinLocalCrossbar<dspin_int_cmd_width>*          int_xbar_cmd_d;
-    DspinLocalCrossbar<dspin_int_rsp_width>*          int_xbar_rsp_d;
+                          dspin_int_rsp_width>*       int_wt_gate_d;
+
     DspinLocalCrossbar<dspin_int_cmd_width>*          int_xbar_m2p_c;
     DspinLocalCrossbar<dspin_int_rsp_width>*          int_xbar_p2m_c;
     DspinLocalCrossbar<dspin_int_cmd_width>*          int_xbar_clack_c;
 
-    VirtualDspinRouter<dspin_int_cmd_width>*	      int_router_cmd;
+    VirtualDspinRouter<dspin_int_cmd_width>*          int_router_cmd;
     VirtualDspinRouter<dspin_int_rsp_width>*          int_router_rsp;
 
@@ -193,27 +168,19 @@
                           dspin_ram_cmd_width,
                           dspin_ram_rsp_width>*       xram_ram_wt;
-	
-    DspinRouterTsar<dspin_ram_cmd_width>*	          ram_router_cmd;
+    
+    DspinRouterTsar<dspin_ram_cmd_width>*             ram_router_cmd;
     DspinRouterTsar<dspin_ram_rsp_width>*             ram_router_rsp;
 
-	// IO Network Components (not instanciated in all clusters)
+    // IO Network Components (not instanciated in all clusters)
 
     VciIoBridge<vci_param_int,
                 vci_param_ext>*                       iob;
-
-    VciDspinInitiatorWrapper<vci_param_int,
-                             dspin_int_cmd_width,
-                             dspin_int_rsp_width>*    iob_int_wi;
-
-    VciDspinTargetWrapper<vci_param_int,
-                          dspin_int_cmd_width,
-                          dspin_int_rsp_width>*       iob_int_wt;
 
     VciDspinInitiatorWrapper<vci_param_ext,
                              dspin_ram_cmd_width,
                              dspin_ram_rsp_width>*    iob_ram_wi;
-	
+    
     // cluster constructor
-	TsarIobCluster( sc_module_name                     insname,
+    TsarIobCluster( sc_module_name                     insname,
                     size_t                             nb_procs,   
                     size_t                             nb_dmas,  
@@ -227,12 +194,12 @@
                     const soclib::common::MappingTable &mt_iox,
 
-                    size_t	                           x_width,       // x field  bits
-                    size_t	                           y_width,       // y field  bits
-                    size_t	                           l_width,       // l field  bits
-
-                    size_t	                           int_memc_tgtid,
-                    size_t	                           int_xicu_tgtid,
-                    size_t	                           int_mdma_tgtid,
-                    size_t	                           int_iobx_tgtid,
+                    size_t                             x_width,       // x field  bits
+                    size_t                             y_width,       // y field  bits
+                    size_t                             l_width,       // l field  bits
+
+                    size_t                             int_memc_tgtid,
+                    size_t                             int_xicu_tgtid,
+                    size_t                             int_mdma_tgtid,
+                    size_t                             int_iobx_tgtid,
 
                     size_t                             int_proc_srcid,
@@ -250,5 +217,5 @@
                     size_t                             l1_i_sets, 
                     size_t                             l1_d_ways,
-                    size_t                             l1_d_sets,	
+                    size_t                             l1_d_sets,   
                     size_t                             xram_latency, 
 
Index: trunk/platforms/tsar_generic_iob/tsar_iob_cluster/caba/source/src/tsar_iob_cluster.cpp
===================================================================
--- trunk/platforms/tsar_generic_iob/tsar_iob_cluster/caba/source/src/tsar_iob_cluster.cpp	(revision 607)
+++ trunk/platforms/tsar_generic_iob/tsar_iob_cluster/caba/source/src/tsar_iob_cluster.cpp	(revision 693)
@@ -149,12 +149,4 @@
                       debug_start_cycle,
                       proc_debug_ok);
-
-        std::ostringstream s_wi_proc;
-        s_wi_proc << "proc_wi_" << x_id << "_" << y_id << "_" << p;
-        proc_wi[p] = new VciDspinInitiatorWrapper<vci_param_int,
-                                                      dspin_int_cmd_width,
-                                                      dspin_int_rsp_width>(
-                     s_wi_proc.str().c_str(),
-                     x_width + y_width + l_width);
     }
 
@@ -182,12 +174,4 @@
                      memc_debug_ok );
 
-    std::ostringstream s_wt_memc;
-    s_wt_memc << "memc_wt_" << x_id << "_" << y_id;
-    memc_int_wt = new VciDspinTargetWrapper<vci_param_int,
-                                            dspin_int_cmd_width,
-                                            dspin_int_rsp_width>(
-                     s_wt_memc.str().c_str(),
-                     x_width + y_width + l_width);
-
     std::ostringstream s_wi_memc;
     s_wi_memc << "memc_wi_" << x_id << "_" << y_id;
@@ -210,12 +194,4 @@
                      nb_procs);                         // number of output IRQs
 
-    std::ostringstream s_wt_xicu;
-    s_wt_xicu << "xicu_wt_" << x_id << "_" << y_id;
-    xicu_int_wt = new VciDspinTargetWrapper<vci_param_int,
-                                        dspin_int_cmd_width,
-                                        dspin_int_rsp_width>(
-                     s_wt_xicu.str().c_str(),
-                     x_width + y_width + l_width);
-
     ////////////  MDMA
     std::ostringstream s_mdma;
@@ -229,20 +205,4 @@
                      nb_dmas);                            // number of IRQs
 
-    std::ostringstream s_wt_mdma;
-    s_wt_mdma << "mdma_wt_" << x_id << "_" << y_id;
-    mdma_int_wt = new VciDspinTargetWrapper<vci_param_int,
-                                            dspin_int_cmd_width,
-                                            dspin_int_rsp_width>(
-                     s_wt_mdma.str().c_str(),
-                     x_width + y_width + l_width);
-
-    std::ostringstream s_wi_mdma;
-    s_wi_mdma << "mdma_wi_" << x_id << "_" << y_id;
-    mdma_int_wi = new VciDspinInitiatorWrapper<vci_param_int,
-                                               dspin_int_cmd_width,
-                                               dspin_int_rsp_width>(
-                     s_wi_mdma.str().c_str(),
-                     x_width + y_width + l_width);
-
     ///////////  Direct LOCAL_XBAR(S)
     size_t nb_direct_initiators      = nb_procs + 1;
@@ -254,31 +214,32 @@
     }
 
-    std::ostringstream s_int_xbar_cmd_d;
-    s_int_xbar_cmd_d << "int_xbar_cmd_d_" << x_id << "_" << y_id;
-    int_xbar_cmd_d = new DspinLocalCrossbar<dspin_int_cmd_width>(
-                     s_int_xbar_cmd_d.str().c_str(),
+    std::ostringstream s_int_xbar_d;
+    s_int_xbar_d << "int_xbar_cmd_d_" << x_id << "_" << y_id;
+    int_xbar_d = new VciLocalCrossbar<vci_param_int>(
+                     s_int_xbar_d.str().c_str(),
                      mt_int,                       // mapping table
-                     x_id, y_id,                   // cluster coordinates
-                     x_width, y_width, l_width,
-                     nb_direct_initiators,         // number of local of sources
-                     nb_direct_targets,            // number of local dests 
-                     2, 2,                         // fifo depths  
-                     true,                         // CMD crossbar
-                     true,                         // use routing table 
-                     false );                      // no broacast
-
-    std::ostringstream s_int_xbar_rsp_d;
-    s_int_xbar_rsp_d << "int_xbar_rsp_d_" << x_id << "_" << y_id;
-    int_xbar_rsp_d = new DspinLocalCrossbar<dspin_int_rsp_width>(
-                     s_int_xbar_rsp_d.str().c_str(),
-                     mt_int,                       // mapping table
-                     x_id, y_id,                   // cluster coordinates
-                     x_width, y_width, l_width,
-                     nb_direct_targets,            // number of local sources      
-                     nb_direct_initiators,         // number of local dests
-                     2, 2,                         // fifo depths
-                     false,                        // RSP crossbar  
-                     false,                        // don't use routing table 
-                     false );                      // no broacast
+                     cluster_id,                   // cluster id
+                     nb_direct_initiators,         // number of local initiators
+                     nb_direct_targets,            // number of local targets 
+                     0 );                          // default target
+
+    std::ostringstream s_int_dspin_ini_wrapper_gate_d;
+    s_int_dspin_ini_wrapper_gate_d << "int_dspin_ini_wrapper_gate_d_"
+                                   << x_id << "_" << y_id;
+    int_wi_gate_d = new VciDspinInitiatorWrapper<vci_param_int,
+                                           dspin_int_cmd_width,
+                                           dspin_int_rsp_width>(
+                     s_int_dspin_ini_wrapper_gate_d.str().c_str(),
+                     x_width + y_width + l_width);
+
+    std::ostringstream s_int_dspin_tgt_wrapper_gate_d;
+    s_int_dspin_tgt_wrapper_gate_d << "int_dspin_tgt_wrapper_gate_d_"
+                                   << x_id << "_" << y_id;
+    int_wt_gate_d = new VciDspinTargetWrapper<vci_param_int,
+                                        dspin_int_cmd_width,
+                                        dspin_int_rsp_width>(
+                     s_int_dspin_tgt_wrapper_gate_d.str().c_str(),
+                     x_width + y_width + l_width);
+
 
     ////////////  Coherence LOCAL_XBAR(S)
@@ -430,20 +391,4 @@
                      iob_debug_ok );
         
-        std::ostringstream s_iob_int_wi;
-        s_iob_int_wi << "iob_int_wi_" << x_id << "_" << y_id;   
-        iob_int_wi = new VciDspinInitiatorWrapper<vci_param_int,
-                                                  dspin_int_cmd_width,
-                                                  dspin_int_rsp_width>(
-                     s_iob_int_wi.str().c_str(),
-                     x_width + y_width + l_width);
-
-        std::ostringstream s_iob_int_wt;
-        s_iob_int_wt << "iob_int_wt_" << x_id << "_" << y_id;   
-        iob_int_wt = new VciDspinTargetWrapper<vci_param_int,
-                                               dspin_int_cmd_width,
-                                               dspin_int_rsp_width>(
-                     s_iob_int_wt.str().c_str(),
-                     x_width + y_width + l_width);
-
         std::ostringstream s_iob_ram_wi;
         s_iob_ram_wi << "iob_ram_wi_" << x_id << "_" << y_id;   
@@ -500,45 +445,34 @@
 
     ///////////////////// CMD DSPIN  local crossbar direct
-    int_xbar_cmd_d->p_clk                        (this->p_clk);
-    int_xbar_cmd_d->p_resetn                     (this->p_resetn);
-    int_xbar_cmd_d->p_global_out                 (signal_int_dspin_cmd_l2g_d);
-    int_xbar_cmd_d->p_global_in                  (signal_int_dspin_cmd_g2l_d);
-
-    int_xbar_cmd_d->p_local_out[memc_int_tgtid]  (signal_int_dspin_cmd_memc_t);
-    int_xbar_cmd_d->p_local_out[xicu_int_tgtid]  (signal_int_dspin_cmd_xicu_t);
-    int_xbar_cmd_d->p_local_out[mdma_int_tgtid]  (signal_int_dspin_cmd_mdma_t);
-
-    int_xbar_cmd_d->p_local_in[mdma_int_srcid]   (signal_int_dspin_cmd_mdma_i);
-
+    int_xbar_d->p_clk                                 (this->p_clk);
+    int_xbar_d->p_resetn                              (this->p_resetn);
+    int_xbar_d->p_initiator_to_up                     (signal_int_vci_l2g);
+    int_xbar_d->p_target_to_up                        (signal_int_vci_g2l);
+
+    int_xbar_d->p_to_target[memc_int_tgtid]           (signal_int_vci_tgt_memc);
+    int_xbar_d->p_to_target[xicu_int_tgtid]           (signal_int_vci_tgt_xicu);
+    int_xbar_d->p_to_target[mdma_int_tgtid]           (signal_int_vci_tgt_mdma);
+    int_xbar_d->p_to_initiator[mdma_int_srcid]        (signal_int_vci_ini_mdma);
     for (size_t p = 0; p < nb_procs; p++)
-    int_xbar_cmd_d->p_local_in[proc_int_srcid+p] (signal_int_dspin_cmd_proc_i[p]);
+       int_xbar_d->p_to_initiator[proc_int_srcid + p] (signal_int_vci_ini_proc[p]);
 
     if ( (cluster_id == cluster_iob0) or (cluster_id == cluster_iob1) )
     {
-    int_xbar_cmd_d->p_local_out[iobx_int_tgtid]  (signal_int_dspin_cmd_iobx_t);
-    int_xbar_cmd_d->p_local_in[iobx_int_srcid]   (signal_int_dspin_cmd_iobx_i);
-    }
-
-    //////////////////////// RSP DSPIN  local crossbar direct
-    int_xbar_rsp_d->p_clk                        (this->p_clk);
-    int_xbar_rsp_d->p_resetn                     (this->p_resetn);
-    int_xbar_rsp_d->p_global_out                 (signal_int_dspin_rsp_l2g_d);
-    int_xbar_rsp_d->p_global_in                  (signal_int_dspin_rsp_g2l_d);
-
-    int_xbar_rsp_d->p_local_in[memc_int_tgtid]   (signal_int_dspin_rsp_memc_t);
-    int_xbar_rsp_d->p_local_in[xicu_int_tgtid]   (signal_int_dspin_rsp_xicu_t);
-    int_xbar_rsp_d->p_local_in[mdma_int_tgtid]   (signal_int_dspin_rsp_mdma_t);
-
-    int_xbar_rsp_d->p_local_out[mdma_int_srcid]  (signal_int_dspin_rsp_mdma_i);
-
-    for (size_t p = 0; p < nb_procs; p++)
-    int_xbar_rsp_d->p_local_out[proc_int_srcid+p] (signal_int_dspin_rsp_proc_i[p]);
-
-    if ( (cluster_id == cluster_iob0) or (cluster_id == cluster_iob1) )
-    {
-    int_xbar_rsp_d->p_local_in[iobx_int_tgtid]   (signal_int_dspin_rsp_iobx_t);
-    int_xbar_rsp_d->p_local_out[iobx_int_srcid]  (signal_int_dspin_rsp_iobx_i);
-    }
-
+       int_xbar_d->p_to_target[iobx_int_tgtid]        (signal_int_vci_tgt_iobx);
+       int_xbar_d->p_to_initiator[iobx_int_srcid]     (signal_int_vci_ini_iobx);
+    }
+
+    int_wi_gate_d->p_clk                           (this->p_clk);
+    int_wi_gate_d->p_resetn                        (this->p_resetn);
+    int_wi_gate_d->p_vci                           (signal_int_vci_l2g);
+    int_wi_gate_d->p_dspin_cmd                     (signal_int_dspin_cmd_l2g_d);
+    int_wi_gate_d->p_dspin_rsp                     (signal_int_dspin_rsp_g2l_d);
+
+    int_wt_gate_d->p_clk                           (this->p_clk);
+    int_wt_gate_d->p_resetn                        (this->p_resetn);
+    int_wt_gate_d->p_vci                           (signal_int_vci_g2l);
+    int_wt_gate_d->p_dspin_cmd                     (signal_int_dspin_cmd_g2l_d);
+    int_wt_gate_d->p_dspin_rsp                     (signal_int_dspin_rsp_l2g_d);
+    
     ////////////////////// M2P DSPIN local crossbar coherence
     int_xbar_m2p_c->p_clk                        (this->p_clk);
@@ -582,10 +516,4 @@
             proc[p]->p_irq[j]                    (signal_false);
         }
-
-        proc_wi[p]->p_clk                        (this->p_clk);
-        proc_wi[p]->p_resetn                     (this->p_resetn);
-        proc_wi[p]->p_dspin_cmd                  (signal_int_dspin_cmd_proc_i[p]);
-        proc_wi[p]->p_dspin_rsp                  (signal_int_dspin_rsp_proc_i[p]);
-        proc_wi[p]->p_vci                        (signal_int_vci_ini_proc[p]);
     }
 
@@ -605,11 +533,4 @@
             xicu->p_hwi[i]                       (signal_false);
     }                     
-
-    // wrapper XICU
-    xicu_int_wt->p_clk                           (this->p_clk);
-    xicu_int_wt->p_resetn                        (this->p_resetn);
-    xicu_int_wt->p_dspin_cmd                     (signal_int_dspin_cmd_xicu_t);
-    xicu_int_wt->p_dspin_rsp                     (signal_int_dspin_rsp_xicu_t);
-    xicu_int_wt->p_vci                           (signal_int_vci_tgt_xicu);
 
     ///////////////////////////////////// MEMC
@@ -623,11 +544,4 @@
     memc->p_irq                                  (signal_irq_memc);
 
-    // wrapper to INT network
-    memc_int_wt->p_clk                           (this->p_clk);
-    memc_int_wt->p_resetn                        (this->p_resetn);
-    memc_int_wt->p_dspin_cmd                     (signal_int_dspin_cmd_memc_t);
-    memc_int_wt->p_dspin_rsp                     (signal_int_dspin_rsp_memc_t);
-    memc_int_wt->p_vci                           (signal_int_vci_tgt_memc);
-
     // wrapper to RAM network
     memc_ram_wi->p_clk                           (this->p_clk);
@@ -656,18 +570,4 @@
     for (size_t i=0 ; i<nb_dmas ; i++)
         mdma->p_irq[i]                           (signal_irq_mdma[i]);
-
-    // target wrapper
-    mdma_int_wt->p_clk                           (this->p_clk);
-    mdma_int_wt->p_resetn                        (this->p_resetn);
-    mdma_int_wt->p_dspin_cmd                     (signal_int_dspin_cmd_mdma_t);
-    mdma_int_wt->p_dspin_rsp                     (signal_int_dspin_rsp_mdma_t);
-    mdma_int_wt->p_vci                           (signal_int_vci_tgt_mdma);
-
-    // initiator wrapper 
-    mdma_int_wi->p_clk                           (this->p_clk);
-    mdma_int_wi->p_resetn                        (this->p_resetn);
-    mdma_int_wi->p_dspin_cmd                     (signal_int_dspin_cmd_mdma_i);
-    mdma_int_wi->p_dspin_rsp                     (signal_int_dspin_rsp_mdma_i);
-    mdma_int_wi->p_vci                           (signal_int_vci_ini_mdma);
 
     //////////////////////////// RAM network CMD & RSP routers
@@ -710,18 +610,4 @@
         iob_ram_wi->p_dspin_rsp                  (*(this->p_dspin_iob_rsp_in));
         iob_ram_wi->p_vci                        (signal_ram_vci_ini_iobx);
-
-        // initiator wrapper to INT network
-        iob_int_wi->p_clk                        (this->p_clk);
-        iob_int_wi->p_resetn                     (this->p_resetn);
-        iob_int_wi->p_dspin_cmd                  (signal_int_dspin_cmd_iobx_i);
-        iob_int_wi->p_dspin_rsp                  (signal_int_dspin_rsp_iobx_i);
-        iob_int_wi->p_vci                        (signal_int_vci_ini_iobx);
-
-        // target wrapper to INT network
-        iob_int_wt->p_clk                        (this->p_clk);
-        iob_int_wt->p_resetn                     (this->p_resetn);
-        iob_int_wt->p_dspin_cmd                  (signal_int_dspin_cmd_iobx_t);
-        iob_int_wt->p_dspin_rsp                  (signal_int_dspin_rsp_iobx_t);
-        iob_int_wt->p_vci                        (signal_int_vci_tgt_iobx);
     }
 
