Index: branches/fault_tolerance/platform/tsar_generic_iob/tsar_iob_cluster/caba/source/include/tsar_iob_cluster.h
===================================================================
--- branches/fault_tolerance/platform/tsar_generic_iob/tsar_iob_cluster/caba/source/include/tsar_iob_cluster.h	(revision 658)
+++ branches/fault_tolerance/platform/tsar_generic_iob/tsar_iob_cluster/caba/source/include/tsar_iob_cluster.h	(revision 695)
@@ -32,4 +32,35 @@
 #include "vci_cc_vcache_wrapper.h"
 #include "vci_io_bridge.h"
+#include "vci_multi_tty.h"
+#include "hard_config.h"
+
+///////////////////////////////////////////////////////////////////////
+//     Number of channels for debug TTY (may be 0)
+///////////////////////////////////////////////////////////////////////
+#define NB_DEBUG_TTY_CHANNELS 1
+
+///////////////////////////////////////////////////////////////////////
+//     TGT_ID and INI_ID port indexing for INT local interconnect
+///////////////////////////////////////////////////////////////////////
+
+#define INT_MEMC_TGT_ID 0
+#define INT_XICU_TGT_ID 1
+#define INT_BROM_TGT_ID 2
+#define INT_MDMA_TGT_ID 3
+#define INT_MTTY_TGT_ID 4
+#define INT_IOBX_TGT_ID (4 + (NB_DEBUG_TTY_CHANNELS ? 1 : 0))
+
+#define INT_PROC_INI_ID 0 // from 0 to 7
+#define INT_MDMA_INI_ID NB_PROCS
+#define INT_IOBX_INI_ID (NB_PROCS + 1)
+
+///////////////////////////////////////////////////////////////////////
+//     TGT_ID and INI_ID port indexing for RAM local interconnect
+///////////////////////////////////////////////////////////////////////
+
+#define RAM_XRAM_TGT_ID 0
+
+#define RAM_MEMC_INI_ID 0
+#define RAM_IOBX_INI_ID 1
 
 namespace soclib { namespace caba {
@@ -81,4 +112,5 @@
       sc_signal<bool> signal_proc_it[8];
       sc_signal<bool> signal_irq_mdma[8];
+      sc_signal<bool> signal_irq_mtty[8];
       sc_signal<bool> signal_irq_memc;
 
@@ -104,4 +136,5 @@
       VciSignals<vci_param_int> signal_int_vci_tgt_xicu;
       VciSignals<vci_param_int> signal_int_vci_tgt_brom;
+      VciSignals<vci_param_int> signal_int_vci_tgt_mtty;
       VciSignals<vci_param_int> signal_int_vci_tgt_mdma;
       VciSignals<vci_param_int> signal_int_vci_tgt_iobx;
@@ -122,4 +155,6 @@
       DspinSignals<dspin_int_cmd_width> signal_int_dspin_cmd_brom_t;
       DspinSignals<dspin_int_rsp_width> signal_int_dspin_rsp_brom_t;
+      DspinSignals<dspin_int_cmd_width> signal_int_dspin_cmd_mtty_t;
+      DspinSignals<dspin_int_rsp_width> signal_int_dspin_rsp_mtty_t;
       DspinSignals<dspin_int_cmd_width> signal_int_dspin_cmd_mdma_t;
       DspinSignals<dspin_int_rsp_width> signal_int_dspin_rsp_mdma_t;
@@ -186,4 +221,7 @@
       VciIntDspinTargetWrapperType*    brom_int_wt;
 
+      VciMultiTty<vci_param_int>*      mtty;
+      VciIntDspinTargetWrapperType*    mtty_int_wt;
+
       DspinLocalCrossbar<dspin_int_cmd_width>* int_xbar_cmd_d;
       DspinLocalCrossbar<dspin_int_rsp_width>* int_xbar_rsp_d;
@@ -213,30 +251,10 @@
          sc_module_name insname;
 
-         size_t nb_procs;
-         size_t nb_dmas;
          size_t x_id;
          size_t y_id;
-         size_t x_size;
-         size_t y_size;
 
          const soclib::common::MappingTable &mt_int;
          const soclib::common::MappingTable &mt_ext;
          const soclib::common::MappingTable &mt_iox;
-
-         size_t x_width;
-         size_t y_width;
-         size_t l_width;
-
-         size_t int_memc_tgtid;
-         size_t int_xicu_tgtid;
-         size_t int_mdma_tgtid;
-         size_t int_iobx_tgtid;
-         size_t int_brom_tgtid;
-         size_t int_proc_srcid;
-         size_t int_mdma_srcid;
-         size_t int_iobx_srcid;
-         size_t ext_xram_tgtid;
-         size_t ext_memc_srcid;
-         size_t ext_iobx_srcid;
 
          size_t memc_ways;
@@ -257,4 +275,9 @@
       };
 
+      // utility functions
+      static uint32_t clusterId(size_t x_id, size_t y_id) {
+         return ((x_id << Y_WIDTH) | y_id); 
+      };
+
       // cluster constructor
       TsarIobCluster(struct ClusterParams& params);
