Changeset 728 for branches/fault_tolerance/platforms/tsar_generic_iob
- Timestamp:
- Jun 27, 2014, 4:48:54 PM (10 years ago)
- Location:
- branches/fault_tolerance/platforms/tsar_generic_iob
- Files:
-
- 10 added
- 1 deleted
- 2 edited
Legend:
- Unmodified
- Added
- Removed
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branches/fault_tolerance/platforms/tsar_generic_iob/arch.py
r724 r728 8 8 # author : Alain Greiner 9 9 ####################################################################################### 10 # This file contains a mapping generator for the "tsar_generic_iob" platform. 10 # This file contains a mapping generator for the "tsar_generic_iob" platform. 11 11 # This includes both the hardware architecture (clusters, processors, peripherals, 12 12 # physical space segmentation) and the mapping of all kernel objects (global vsegs). … … 42 42 43 43 nb_ttys = 1 44 nb_nics = 2 44 nb_nics = 2 45 45 fbf_width = 1024 46 46 x_io = 0 … … 52 52 use_ramdisk = False 53 53 peri_increment = 0x10000 54 54 55 55 ### parameters checking 56 56 57 57 assert( nb_procs <= 4 ) 58 58 59 assert( (x_size == 1) or (x_size == 2) or (x_size == 4) 59 assert( (x_size == 1) or (x_size == 2) or (x_size == 4) 60 60 or (y_size == 8) or (x_size == 16) ) 61 61 62 assert( (y_size == 1) or (y_size == 2) or (y_size == 4) 62 assert( (y_size == 1) or (y_size == 2) or (y_size == 4) 63 63 or (y_size == 8) or (y_size == 16) ) 64 64 … … 69 69 70 70 platform_name = 'tsar_iob_%d_%d_%d' % ( x_size, y_size, nb_procs ) 71 71 72 72 ### define physical segments 73 73 74 ram_base = 0x0000000000 75 ram_size = 0x4000000 # 64 Mbytes 76 77 xcu_base = 0x00B0000000 78 xcu_size = 0x1000 # 4 Kbytes 79 80 dma_base = 0x00B1000000 81 dma_size = 0x1000 * nb_procs # 4 Kbytes * nb_procs 82 83 mmc_base = 0x00B2000000 84 mmc_size = 0x1000 # 4 Kbytes 74 ram_base = 0x0000000000 75 ram_size = 0x4000000 # 64 Mbytes 76 77 xcu_base = 0x00B0000000 78 xcu_size = 0x1000 # 4 Kbytes 79 80 dma_base = 0x00B1000000 81 dma_size = 0x1000 * nb_procs # 4 Kbytes * nb_procs 82 83 mmc_base = 0x00B2000000 84 mmc_size = 0x1000 # 4 Kbytes 85 86 rom_base = 0x00BFC00000 87 rom_size = 0x8000 # 32 Kbytes 85 88 86 89 offset_io = ((x_io << y_width) + y_io) << (paddr_width - x_width - y_width) … … 105 108 106 109 iob_base = 0x00BE000000 + offset_io 107 iob_size = 0x1000 # 4kbytes 108 109 rom_base = 0x00BFC00000 + offset_io 110 rom_size = 0x4000 # 16 Kbytes 110 iob_size = 0x1000 # 4 kbytes 111 112 ### GIET_VM specifics virtual segments 111 113 112 114 ### define bootloader vsegs base addresses … … 116 118 117 119 boot_code_vbase = 0x00010000 # ident 118 boot_code_size = 0x00020000 # 128 Kbytes 119 120 boot_code_size = 0x00020000 # 128 Kbytes 121 120 122 boot_data_vbase = 0x00030000 # ident 121 123 boot_data_size = 0x00010000 # 64 Kbytes … … 129 131 ### define kernel vsegs base addresses 130 132 131 kernel_code_vbase = 0x80000000 133 kernel_code_vbase = 0x80000000 132 134 kernel_code_size = 0x00020000 # 128 Kbytes 133 135 … … 146 148 ### create mapping 147 149 148 mapping = Mapping( name = platform_name, 149 x_size = x_size, 150 y_size = y_size, 151 procs_max = nb_procs, 152 x_width = x_width, 153 y_width = y_width, 154 paddr_width = paddr_width, 155 coherence = True, 156 irq_per_proc = irq_per_proc, 157 use_ramdisk = use_ramdisk, 158 x_io = x_io, 150 mapping = Mapping( name = platform_name, 151 x_size = x_size, 152 y_size = y_size, 153 procs_max = nb_procs, 154 x_width = x_width, 155 y_width = y_width, 156 paddr_width = paddr_width, 157 coherence = True, 158 irq_per_proc = irq_per_proc, 159 use_ramdisk = use_ramdisk, 160 x_io = x_io, 159 161 y_io = y_io, 160 peri_increment = peri_increment ) 162 peri_increment = peri_increment ) 161 163 162 164 ### external peripherals (accessible in cluster[0,0] only for this mapping) … … 168 170 tty = mapping.addPeriph( 'TTY', base = tty_base, size = tty_size, ptype = 'TTY', channels = nb_ttys ) 169 171 170 nic = mapping.addPeriph( 'NIC', base = nic_base, size = nic_size, ptype = 'NIC', channels = nb_nics ) 172 nic = mapping.addPeriph( 'NIC', base = nic_base, size = nic_size, ptype = 'NIC', channels = nb_nics ) 171 173 172 174 cma = mapping.addPeriph( 'CMA', base = cma_base, size = cma_size, ptype = 'CMA', channels = 2*nb_nics ) 173 175 174 176 fbf = mapping.addPeriph( 'FBF', base = fbf_base, size = fbf_size, ptype = 'FBF', arg = fbf_width ) 175 176 rom = mapping.addPeriph( 'ROM', base = rom_base, size = rom_size, ptype = 'ROM' )177 177 178 178 pic = mapping.addPeriph( 'PIC', base = pic_base, size = pic_size, ptype = 'PIC', channels = 32 ) … … 193 193 mapping.addIrq( pic, index = 9, isrtype = 'ISR_TTY_RX', channel = 0 ) 194 194 195 ### hardware components replicated in all clusters 195 ### hardware components replicated in all clusters 196 196 197 197 for x in xrange( x_size ): … … 202 202 ram = mapping.addRam( 'RAM', base = ram_base + offset, size = ram_size ) 203 203 204 mmc = mapping.addPeriph( 'MMC', base = mmc_base + offset, size = mmc_size, 204 rom = mapping.addPeriph( 'ROM', base = rom_base + offset, size = rom_size, 205 ptype = 'ROM' ) 206 207 mmc = mapping.addPeriph( 'MMC', base = mmc_base + offset, size = mmc_size, 205 208 ptype = 'MMC' ) 206 209 207 dma = mapping.addPeriph( 'DMA', base = dma_base + offset, size = dma_size, 208 ptype = 'DMA', channels = nb_procs ) 209 210 xcu = mapping.addPeriph( 'XCU', base = xcu_base + offset, size = xcu_size, 210 dma = mapping.addPeriph( 'DMA', base = dma_base + offset, size = dma_size, 211 ptype = 'DMA', channels = nb_procs ) 212 213 xcu = mapping.addPeriph( 'XCU', base = xcu_base + offset, size = xcu_size, 211 214 ptype = 'XCU', channels = nb_procs * irq_per_proc, arg = 16 ) 212 215 … … 220 223 ### global vsegs for boot_loader / identity mapping 221 224 222 mapping.addGlobal( 'seg_boot_mapping' , boot_mapping_vbase , boot_mapping_size , 'C_W_', 225 mapping.addGlobal( 'seg_boot_mapping' , boot_mapping_vbase , boot_mapping_size , 'C_W_', 223 226 vtype = 'BLOB' , x = 0, y = 0, pseg = 'RAM', identity = True ) 224 227 225 mapping.addGlobal( 'seg_boot_code' , boot_code_vbase , boot_code_size , 'CXW_', 228 mapping.addGlobal( 'seg_boot_code' , boot_code_vbase , boot_code_size , 'CXW_', 226 229 vtype = 'BUFFER', x = 0, y = 0, pseg = 'RAM', identity = True ) 227 230 228 mapping.addGlobal( 'seg_boot_data' , boot_data_vbase , boot_data_size , 'C_W_', 231 mapping.addGlobal( 'seg_boot_data' , boot_data_vbase , boot_data_size , 'C_W_', 229 232 vtype = 'BUFFER', x = 0, y = 0, pseg = 'RAM', identity = True ) 230 233 231 mapping.addGlobal( 'seg_boot_buffer' , boot_buffer_vbase , boot_buffer_size , 'C_W_', 234 mapping.addGlobal( 'seg_boot_buffer' , boot_buffer_vbase , boot_buffer_size , 'C_W_', 232 235 vtype = 'BUFFER', x = 0, y = 0, pseg = 'RAM', identity = True ) 233 236 234 mapping.addGlobal( 'seg_boot_stack' , boot_stack_vbase , boot_stack_size , 'C_W_', 237 mapping.addGlobal( 'seg_boot_stack' , boot_stack_vbase , boot_stack_size , 'C_W_', 235 238 vtype = 'BUFFER', x = 0, y = 0, pseg = 'RAM', identity = True ) 236 239 237 ### global vsegs for kernel 238 239 mapping.addGlobal( 'seg_kernel_code' , kernel_code_vbase , kernel_code_size , 'CXW_', 240 ### global vsegs for kernel 241 242 mapping.addGlobal( 'seg_kernel_code' , kernel_code_vbase , kernel_code_size , 'CXW_', 240 243 vtype = 'ELF' , x = 0, y = 0, pseg = 'RAM', binpath = 'build/kernel/kernel.elf' ) 241 244 242 mapping.addGlobal( 'seg_kernel_data' , kernel_data_vbase , kernel_data_size , 'C_W_', 245 mapping.addGlobal( 'seg_kernel_data' , kernel_data_vbase , kernel_data_size , 'C_W_', 243 246 vtype = 'ELF' , x = 0, y = 0, pseg = 'RAM', binpath = 'build/kernel/kernel.elf' ) 244 247 245 mapping.addGlobal( 'seg_kernel_uncdata', kernel_uncdata_vbase, kernel_uncdata_size, '__W_', 248 mapping.addGlobal( 'seg_kernel_uncdata', kernel_uncdata_vbase, kernel_uncdata_size, '__W_', 246 249 vtype = 'ELF' , x = 0, y = 0, pseg = 'RAM', binpath = 'build/kernel/kernel.elf' ) 247 250 248 mapping.addGlobal( 'seg_kernel_init' , kernel_init_vbase , kernel_init_size , 'CXW_', 251 mapping.addGlobal( 'seg_kernel_init' , kernel_init_vbase , kernel_init_size , 'CXW_', 249 252 vtype = 'ELF' , x = 0, y = 0, pseg = 'RAM', binpath = 'build/kernel/kernel.elf' ) 250 253 251 254 ### global vsegs for external peripherals / identity mapping 252 255 253 mapping.addGlobal( 'seg_iob', iob_base, iob_size, '__W_', 256 mapping.addGlobal( 'seg_iob', iob_base, iob_size, '__W_', 254 257 vtype = 'PERI', x = 0, y = 0, pseg = 'IOB', identity = True ) 255 258 256 mapping.addGlobal( 'seg_bdv', bdv_base, bdv_size, '__W_', 259 mapping.addGlobal( 'seg_bdv', bdv_base, bdv_size, '__W_', 257 260 vtype = 'PERI', x = 0, y = 0, pseg = 'BDV', identity = True ) 258 261 259 mapping.addGlobal( 'seg_tty', tty_base, tty_size, '__W_', 262 mapping.addGlobal( 'seg_tty', tty_base, tty_size, '__W_', 260 263 vtype = 'PERI', x = 0, y = 0, pseg = 'TTY', identity = True ) 261 264 262 mapping.addGlobal( 'seg_nic', nic_base, nic_size, '__W_', 265 mapping.addGlobal( 'seg_nic', nic_base, nic_size, '__W_', 263 266 vtype = 'PERI', x = 0, y = 0, pseg = 'NIC', identity = True ) 264 267 265 mapping.addGlobal( 'seg_cma', cma_base, cma_size, '__W_', 268 mapping.addGlobal( 'seg_cma', cma_base, cma_size, '__W_', 266 269 vtype = 'PERI', x = 0, y = 0, pseg = 'CMA', identity = True ) 267 270 268 mapping.addGlobal( 'seg_fbf', fbf_base, fbf_size, '__W_', 271 mapping.addGlobal( 'seg_fbf', fbf_base, fbf_size, '__W_', 269 272 vtype = 'PERI', x = 0, y = 0, pseg = 'FBF', identity = True ) 270 273 271 mapping.addGlobal( 'seg_pic', pic_base, pic_size, '__W_', 274 mapping.addGlobal( 'seg_pic', pic_base, pic_size, '__W_', 272 275 vtype = 'PERI', x = 0, y = 0, pseg = 'PIC', identity = True ) 273 276 274 mapping.addGlobal( 'seg_rom', rom_base, rom_size, 'CXW_', 275 vtype = 'PERI', x = 0, y = 0, pseg = 'ROM', identity = True ) 276 277 ### Global vsegs for replicated peripherals, and for schedulers 277 ### Global vsegs for replicated peripherals, and for schedulers 278 278 ### name is indexed by (x,y), base address is incremented by (cluster_xy * peri_increment) 279 279 … … 283 283 offset = cluster_xy * peri_increment 284 284 285 mapping.addGlobal( 'seg_rom_%d_%d' %(x,y), rom_base + offset, rom_size, 286 'CX__', vtype = 'PERI' , x = x , y = y , pseg = 'ROM' ) 287 285 288 mapping.addGlobal( 'seg_xcu_%d_%d' %(x,y), xcu_base + offset, xcu_size, 286 289 '__W_', vtype = 'PERI' , x = x , y = y , pseg = 'XCU' ) … … 307 310 nb_procs = 2, 308 311 nb_ttys = 1, 309 nb_nics = 2, 312 nb_nics = 2, 310 313 fbf_width = 128, 311 314 x_io = 0, … … 317 320 318 321 # print mapping.giet_vsegs() 319 322 320 323 321 324 # Local Variables: -
branches/fault_tolerance/platforms/tsar_generic_iob/top.cpp
r724 r728 363 363 if ((strcmp(argv[n],"-NCYCLES") == 0) && (n+1<argc)) 364 364 { 365 ncycles = atoi(argv[n+1]);365 ncycles = strtol(argv[n+1], NULL, 0); 366 366 } 367 367 else if ((strcmp(argv[n],"-SOFT") == 0) && (n+1<argc) ) … … 372 372 { 373 373 debug_ok = true; 374 debug_from = atoi(argv[n+1]);374 debug_from = strtol(argv[n+1], NULL, 0); 375 375 } 376 376 else if ((strcmp(argv[n],"-DISK") == 0) && (n+1<argc) ) … … 380 380 else if ((strcmp(argv[n],"-MEMCID") == 0) && (n+1<argc) ) 381 381 { 382 debug_memc_id = atoi(argv[n+1]);382 debug_memc_id = strtol(argv[n+1], NULL, 0); 383 383 size_t x = debug_memc_id >> 4; 384 384 size_t y = debug_memc_id & 0xF; … … 391 391 else if ((strcmp(argv[n],"-XRAMID") == 0) && (n+1<argc) ) 392 392 { 393 debug_xram_id = atoi(argv[n+1]);393 debug_xram_id = strtol(argv[n+1], NULL, 0); 394 394 size_t x = debug_xram_id >> 4; 395 395 size_t y = debug_xram_id & 0xF; … … 402 402 else if ((strcmp(argv[n],"-IOB") == 0) && (n+1<argc) ) 403 403 { 404 debug_iob = atoi(argv[n+1]);404 debug_iob = strtol(argv[n+1], NULL, 0); 405 405 } 406 406 else if ((strcmp(argv[n],"-PROCID") == 0) && (n+1<argc) ) 407 407 { 408 debug_proc_id = atoi(argv[n+1]);408 debug_proc_id = strtol(argv[n+1], NULL, 0); 409 409 size_t cluster_xy = debug_proc_id / NB_PROCS_MAX ; 410 410 size_t x = cluster_xy >> 4; … … 418 418 else if ((strcmp(argv[n], "-THREADS") == 0) && ((n+1) < argc)) 419 419 { 420 threads_nr = atoi(argv[n+1]);420 threads_nr = strtol(argv[n+1], NULL, 0); 421 421 threads_nr = (threads_nr < 1) ? 1 : threads_nr; 422 422 } 423 423 else if ((strcmp(argv[n], "-FROZEN") == 0) && (n+1 < argc)) 424 424 { 425 frozen_cycles = atoi(argv[n+1]);425 frozen_cycles = strtol(argv[n+1], NULL, 0); 426 426 } 427 427 else if ((strcmp(argv[n], "-PERIOD") == 0) && (n+1 < argc)) 428 428 { 429 debug_period = atoi(argv[n+1]);429 debug_period = strtol(argv[n+1], NULL, 0); 430 430 } 431 431 else
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