Changeset 736
- Timestamp:
- Jul 4, 2014, 4:27:49 PM (10 years ago)
- Location:
- branches/fault_tolerance/platforms/tsar_generic_iob
- Files:
-
- 2 edited
Legend:
- Unmodified
- Added
- Removed
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branches/fault_tolerance/platforms/tsar_generic_iob/arch.py
r728 r736 41 41 ### define architecture constants 42 42 43 distptabs = 1 43 44 nb_ttys = 1 44 45 nb_nics = 2 … … 115 116 116 117 boot_mapping_vbase = 0x00000000 # ident 117 boot_mapping_size = 0x000 10000 # 64Kbytes118 119 boot_code_vbase = 0x000 10000 # ident118 boot_mapping_size = 0x00040000 # 256 Kbytes 119 120 boot_code_vbase = 0x00040000 # ident 120 121 boot_code_size = 0x00020000 # 128 Kbytes 121 122 122 boot_data_vbase = 0x000 30000 # ident123 boot_data_vbase = 0x00060000 # ident 123 124 boot_data_size = 0x00010000 # 64 Kbytes 124 125 125 boot_buffer_vbase = 0x000 40000 # ident126 boot_buffer_vbase = 0x00070000 # ident 126 127 boot_buffer_size = 0x00060000 # 384 Kbytes 127 128 128 boot_stack_vbase = 0x0 00A0000 # ident129 boot_stack_size = 0x00 050000 # 320 Kbytes129 boot_stack_vbase = 0x03F00000 # ident 130 boot_stack_size = 0x00100000 # 1 Mbytes 130 131 131 132 ### define kernel vsegs base addresses … … 202 203 ram = mapping.addRam( 'RAM', base = ram_base + offset, size = ram_size ) 203 204 205 mmc = mapping.addPeriph( 'MMC', base = mmc_base + offset, size = mmc_size, 206 ptype = 'MMC' ) 207 208 dma = mapping.addPeriph( 'DMA', base = dma_base + offset, size = dma_size, 209 ptype = 'DMA', channels = nb_procs ) 210 211 xcu = mapping.addPeriph( 'XCU', base = xcu_base + offset, size = xcu_size, 212 ptype = 'XCU', channels = nb_procs * irq_per_proc, arg = 16 ) 213 204 214 rom = mapping.addPeriph( 'ROM', base = rom_base + offset, size = rom_size, 205 215 ptype = 'ROM' ) 206 207 mmc = mapping.addPeriph( 'MMC', base = mmc_base + offset, size = mmc_size,208 ptype = 'MMC' )209 210 dma = mapping.addPeriph( 'DMA', base = dma_base + offset, size = dma_size,211 ptype = 'DMA', channels = nb_procs )212 213 xcu = mapping.addPeriph( 'XCU', base = xcu_base + offset, size = xcu_size,214 ptype = 'XCU', channels = nb_procs * irq_per_proc, arg = 16 )215 216 216 217 # MMC IRQ replicated in all clusters … … 240 241 ### global vsegs for kernel 241 242 242 mapping.addGlobal( 'seg_kernel_code' , kernel_code_vbase , kernel_code_size , 'CXW_', 243 vtype = 'ELF' , x = 0, y = 0, pseg = 'RAM', binpath = 'build/kernel/kernel.elf' ) 243 if distptabs: 244 for x in xrange( x_size ): 245 for y in xrange( y_size ): 246 cluster_xy = (x << y_width) + y; 247 248 mapping.addGlobal( 'seg_kernel_code', kernel_code_vbase, kernel_code_size, 249 'CXW_', vtype = 'ELF', x = x , y = y , pseg = 'RAM', 250 binpath = 'build/kernel/kernel.elf', local = True ) 251 252 mapping.addGlobal( 'seg_kernel_init', kernel_init_vbase, kernel_init_size, 253 'CXW_', vtype = 'ELF', x = x , y = y , pseg = 'RAM', 254 binpath = 'build/kernel/kernel.elf', local = True ) 255 else: 256 mapping.addGlobal( 'seg_kernel_code', kernel_code_vbase, kernel_code_size, 257 'CXW_', vtype = 'ELF', x = 0 , y = 0 , pseg = 'RAM', 258 binpath = 'build/kernel/kernel.elf' ) 259 260 mapping.addGlobal( 'seg_kernel_init', kernel_init_vbase, kernel_init_size, 261 'CXW_', vtype = 'ELF', x = 0 , y = 0 , pseg = 'RAM', 262 binpath = 'build/kernel/kernel.elf' ) 244 263 245 264 mapping.addGlobal( 'seg_kernel_data' , kernel_data_vbase , kernel_data_size , 'C_W_', … … 247 266 248 267 mapping.addGlobal( 'seg_kernel_uncdata', kernel_uncdata_vbase, kernel_uncdata_size, '__W_', 249 vtype = 'ELF' , x = 0, y = 0, pseg = 'RAM', binpath = 'build/kernel/kernel.elf' )250 251 mapping.addGlobal( 'seg_kernel_init' , kernel_init_vbase , kernel_init_size , 'CXW_',252 268 vtype = 'ELF' , x = 0, y = 0, pseg = 'RAM', binpath = 'build/kernel/kernel.elf' ) 253 269 -
branches/fault_tolerance/platforms/tsar_generic_iob/top.cpp
r728 r736 45 45 // - IOPIC HWI[7:4] connected to IRQ_CMA_TX[3:0]] 46 46 // - IOPIC HWI[8] connected to IRQ_BDEV 47 // - IOPIC HWI[15:9] unused (grounded) 48 // - IOPIC HWI[23:16] connected to IRQ_TTY_RX[7:0]] 49 // - IOPIC HWI[31:24] connected to IRQ_TTY_TX[7:0]] TBD 47 // - IOPIC HWI[9] connected to IRQ_TTY_RX[0] 48 // - IOPIC HWI[31:9] unused (grounded) 50 49 // 51 50 // Besides the external peripherals, each cluster contains on XICU component,
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