Index: /branches/reconfiguration/platforms/tsar_generic_iob/top.cpp =================================================================== --- /branches/reconfiguration/platforms/tsar_generic_iob/top.cpp (revision 749) +++ /branches/reconfiguration/platforms/tsar_generic_iob/top.cpp (revision 750) @@ -118,4 +118,5 @@ #include #include +#include #include @@ -321,5 +322,5 @@ char soft_name[256] = BOOT_SOFT_NAME; // pathname: binary code - size_t ncycles = 1000000000; // simulated cycles + size_t ncycles = UINT_MAX; // simulated cycles char disk_name[256] = BDEV_IMAGE_NAME; // pathname: disk image char nic_rx_name[256] = NIC_RX_NAME; // pathname: rx packets file @@ -843,13 +844,8 @@ // Mesh boundaries INT network DSPIN - DspinSignals**** signal_dspin_false_int_cmd_in = - alloc_elems >("signal_dspin_false_int_cmd_in", XMAX, YMAX, 4, 3); - DspinSignals**** signal_dspin_false_int_cmd_out = - alloc_elems >("signal_dspin_false_int_cmd_out", XMAX, YMAX, 4, 3); - DspinSignals**** signal_dspin_false_int_rsp_in = - alloc_elems >("signal_dspin_false_int_rsp_in", XMAX, YMAX, 4, 2); - DspinSignals**** signal_dspin_false_int_rsp_out = - alloc_elems >("signal_dspin_false_int_rsp_out", XMAX, YMAX, 4, 2); - + DspinSignals signal_dspin_false_int_cmd_in; + DspinSignals signal_dspin_false_int_cmd_out; + DspinSignals signal_dspin_false_int_rsp_in; + DspinSignals signal_dspin_false_int_rsp_out; // Horizontal inter-clusters RAM network DSPIN @@ -874,12 +870,8 @@ // Mesh boundaries RAM network DSPIN - DspinSignals*** signal_dspin_false_ram_cmd_in = - alloc_elems >("signal_dspin_false_ram_cmd_in", XMAX, YMAX, 4); - DspinSignals*** signal_dspin_false_ram_cmd_out = - alloc_elems >("signal_dspin_false_ram_cmd_out", XMAX, YMAX, 4); - DspinSignals*** signal_dspin_false_ram_rsp_in = - alloc_elems >("signal_dspin_false_ram_rsp_in", XMAX, YMAX, 4); - DspinSignals*** signal_dspin_false_ram_rsp_out = - alloc_elems >("signal_dspin_false_ram_rsp_out", XMAX, YMAX, 4); + DspinSignals signal_dspin_false_ram_cmd_in; + DspinSignals signal_dspin_false_ram_cmd_out; + DspinSignals signal_dspin_false_ram_rsp_in; + DspinSignals signal_dspin_false_ram_rsp_out; //////////////////////////// @@ -1283,27 +1275,27 @@ for (size_t k = 0; k < 3; k++) { - clusters[0][y]->p_dspin_int_cmd_in[WEST][k] (signal_dspin_false_int_cmd_in[0][y][WEST][k]); - clusters[0][y]->p_dspin_int_cmd_out[WEST][k] (signal_dspin_false_int_cmd_out[0][y][WEST][k]); - clusters[XMAX-1][y]->p_dspin_int_cmd_in[EAST][k] (signal_dspin_false_int_cmd_in[XMAX-1][y][EAST][k]); - clusters[XMAX-1][y]->p_dspin_int_cmd_out[EAST][k] (signal_dspin_false_int_cmd_out[XMAX-1][y][EAST][k]); + clusters[0][y]->p_dspin_int_cmd_in[WEST][k] (signal_dspin_false_int_cmd_in); + clusters[0][y]->p_dspin_int_cmd_out[WEST][k] (signal_dspin_false_int_cmd_out); + clusters[XMAX-1][y]->p_dspin_int_cmd_in[EAST][k] (signal_dspin_false_int_cmd_in); + clusters[XMAX-1][y]->p_dspin_int_cmd_out[EAST][k] (signal_dspin_false_int_cmd_out); } for (size_t k = 0; k < 2; k++) { - clusters[0][y]->p_dspin_int_rsp_in[WEST][k] (signal_dspin_false_int_rsp_in[0][y][WEST][k]); - clusters[0][y]->p_dspin_int_rsp_out[WEST][k] (signal_dspin_false_int_rsp_out[0][y][WEST][k]); - clusters[XMAX-1][y]->p_dspin_int_rsp_in[EAST][k] (signal_dspin_false_int_rsp_in[XMAX-1][y][EAST][k]); - clusters[XMAX-1][y]->p_dspin_int_rsp_out[EAST][k] (signal_dspin_false_int_rsp_out[XMAX-1][y][EAST][k]); + clusters[0][y]->p_dspin_int_rsp_in[WEST][k] (signal_dspin_false_int_rsp_in); + clusters[0][y]->p_dspin_int_rsp_out[WEST][k] (signal_dspin_false_int_rsp_out); + clusters[XMAX-1][y]->p_dspin_int_rsp_in[EAST][k] (signal_dspin_false_int_rsp_in); + clusters[XMAX-1][y]->p_dspin_int_rsp_out[EAST][k] (signal_dspin_false_int_rsp_out); } - clusters[0][y]->p_dspin_ram_cmd_in[WEST] (signal_dspin_false_ram_cmd_in[0][y][WEST]); - clusters[0][y]->p_dspin_ram_cmd_out[WEST] (signal_dspin_false_ram_cmd_out[0][y][WEST]); - clusters[0][y]->p_dspin_ram_rsp_in[WEST] (signal_dspin_false_ram_rsp_in[0][y][WEST]); - clusters[0][y]->p_dspin_ram_rsp_out[WEST] (signal_dspin_false_ram_rsp_out[0][y][WEST]); - - clusters[XMAX-1][y]->p_dspin_ram_cmd_in[EAST] (signal_dspin_false_ram_cmd_in[XMAX-1][y][EAST]); - clusters[XMAX-1][y]->p_dspin_ram_cmd_out[EAST] (signal_dspin_false_ram_cmd_out[XMAX-1][y][EAST]); - clusters[XMAX-1][y]->p_dspin_ram_rsp_in[EAST] (signal_dspin_false_ram_rsp_in[XMAX-1][y][EAST]); - clusters[XMAX-1][y]->p_dspin_ram_rsp_out[EAST] (signal_dspin_false_ram_rsp_out[XMAX-1][y][EAST]); + clusters[0][y]->p_dspin_ram_cmd_in[WEST] (signal_dspin_false_ram_cmd_in); + clusters[0][y]->p_dspin_ram_cmd_out[WEST] (signal_dspin_false_ram_cmd_out); + clusters[0][y]->p_dspin_ram_rsp_in[WEST] (signal_dspin_false_ram_rsp_in); + clusters[0][y]->p_dspin_ram_rsp_out[WEST] (signal_dspin_false_ram_rsp_out); + + clusters[XMAX-1][y]->p_dspin_ram_cmd_in[EAST] (signal_dspin_false_ram_cmd_in); + clusters[XMAX-1][y]->p_dspin_ram_cmd_out[EAST] (signal_dspin_false_ram_cmd_out); + clusters[XMAX-1][y]->p_dspin_ram_rsp_in[EAST] (signal_dspin_false_ram_rsp_in); + clusters[XMAX-1][y]->p_dspin_ram_rsp_out[EAST] (signal_dspin_false_ram_rsp_out); } @@ -1315,27 +1307,27 @@ for (size_t k = 0; k < 3; k++) { - clusters[x][0]->p_dspin_int_cmd_in[SOUTH][k] (signal_dspin_false_int_cmd_in[x][0][SOUTH][k]); - clusters[x][0]->p_dspin_int_cmd_out[SOUTH][k] (signal_dspin_false_int_cmd_out[x][0][SOUTH][k]); - clusters[x][YMAX-1]->p_dspin_int_cmd_in[NORTH][k] (signal_dspin_false_int_cmd_in[x][YMAX-1][NORTH][k]); - clusters[x][YMAX-1]->p_dspin_int_cmd_out[NORTH][k] (signal_dspin_false_int_cmd_out[x][YMAX-1][NORTH][k]); + clusters[x][0]->p_dspin_int_cmd_in[SOUTH][k] (signal_dspin_false_int_cmd_in); + clusters[x][0]->p_dspin_int_cmd_out[SOUTH][k] (signal_dspin_false_int_cmd_out); + clusters[x][YMAX-1]->p_dspin_int_cmd_in[NORTH][k] (signal_dspin_false_int_cmd_in); + clusters[x][YMAX-1]->p_dspin_int_cmd_out[NORTH][k] (signal_dspin_false_int_cmd_out); } for (size_t k = 0; k < 2; k++) { - clusters[x][0]->p_dspin_int_rsp_in[SOUTH][k] (signal_dspin_false_int_rsp_in[x][0][SOUTH][k]); - clusters[x][0]->p_dspin_int_rsp_out[SOUTH][k] (signal_dspin_false_int_rsp_out[x][0][SOUTH][k]); - clusters[x][YMAX-1]->p_dspin_int_rsp_in[NORTH][k] (signal_dspin_false_int_rsp_in[x][YMAX-1][NORTH][k]); - clusters[x][YMAX-1]->p_dspin_int_rsp_out[NORTH][k] (signal_dspin_false_int_rsp_out[x][YMAX-1][NORTH][k]); + clusters[x][0]->p_dspin_int_rsp_in[SOUTH][k] (signal_dspin_false_int_rsp_in); + clusters[x][0]->p_dspin_int_rsp_out[SOUTH][k] (signal_dspin_false_int_rsp_out); + clusters[x][YMAX-1]->p_dspin_int_rsp_in[NORTH][k] (signal_dspin_false_int_rsp_in); + clusters[x][YMAX-1]->p_dspin_int_rsp_out[NORTH][k] (signal_dspin_false_int_rsp_out); } - clusters[x][0]->p_dspin_ram_cmd_in[SOUTH] (signal_dspin_false_ram_cmd_in[x][0][SOUTH]); - clusters[x][0]->p_dspin_ram_cmd_out[SOUTH] (signal_dspin_false_ram_cmd_out[x][0][SOUTH]); - clusters[x][0]->p_dspin_ram_rsp_in[SOUTH] (signal_dspin_false_ram_rsp_in[x][0][SOUTH]); - clusters[x][0]->p_dspin_ram_rsp_out[SOUTH] (signal_dspin_false_ram_rsp_out[x][0][SOUTH]); - - clusters[x][YMAX-1]->p_dspin_ram_cmd_in[NORTH] (signal_dspin_false_ram_cmd_in[x][YMAX-1][NORTH]); - clusters[x][YMAX-1]->p_dspin_ram_cmd_out[NORTH] (signal_dspin_false_ram_cmd_out[x][YMAX-1][NORTH]); - clusters[x][YMAX-1]->p_dspin_ram_rsp_in[NORTH] (signal_dspin_false_ram_rsp_in[x][YMAX-1][NORTH]); - clusters[x][YMAX-1]->p_dspin_ram_rsp_out[NORTH] (signal_dspin_false_ram_rsp_out[x][YMAX-1][NORTH]); + clusters[x][0]->p_dspin_ram_cmd_in[SOUTH] (signal_dspin_false_ram_cmd_in); + clusters[x][0]->p_dspin_ram_cmd_out[SOUTH] (signal_dspin_false_ram_cmd_out); + clusters[x][0]->p_dspin_ram_rsp_in[SOUTH] (signal_dspin_false_ram_rsp_in); + clusters[x][0]->p_dspin_ram_rsp_out[SOUTH] (signal_dspin_false_ram_rsp_out); + + clusters[x][YMAX-1]->p_dspin_ram_cmd_in[NORTH] (signal_dspin_false_ram_cmd_in); + clusters[x][YMAX-1]->p_dspin_ram_cmd_out[NORTH] (signal_dspin_false_ram_cmd_out); + clusters[x][YMAX-1]->p_dspin_ram_rsp_in[NORTH] (signal_dspin_false_ram_rsp_in); + clusters[x][YMAX-1]->p_dspin_ram_rsp_out[NORTH] (signal_dspin_false_ram_rsp_out); } @@ -1351,192 +1343,189 @@ signal_irq_false = false; - // network boundaries signals - for (size_t x = 0; x < XMAX ; x++) + signal_dspin_false_int_cmd_in.write = false; + signal_dspin_false_int_cmd_out.read = true; + signal_dspin_false_int_rsp_in.write = false; + signal_dspin_false_int_rsp_out.read = true; + signal_dspin_false_ram_cmd_in.write = false; + signal_dspin_false_ram_cmd_out.read = true; + signal_dspin_false_ram_rsp_in.write = false; + signal_dspin_false_ram_rsp_out.read = true; + + sc_start(sc_core::sc_time(1, SC_NS)); + signal_resetn = true; + + // simulation loop + struct timeval t1,t2; + const size_t stats_period = 100000; // cycles + + if (ncycles == UINT_MAX) { - for (size_t y = 0; y < YMAX ; y++) + int n = 0; + while(1) { - for (size_t a = 0; a < 4; a++) - { - for (size_t k = 0; k < 3; k++) - { - signal_dspin_false_int_cmd_in[x][y][a][k].write = false; - signal_dspin_false_int_cmd_in[x][y][a][k].read = true; - signal_dspin_false_int_cmd_out[x][y][a][k].write = false; - signal_dspin_false_int_cmd_out[x][y][a][k].read = true; - } - - for (size_t k = 0; k < 2; k++) - { - signal_dspin_false_int_rsp_in[x][y][a][k].write = false; - signal_dspin_false_int_rsp_in[x][y][a][k].read = true; - signal_dspin_false_int_rsp_out[x][y][a][k].write = false; - signal_dspin_false_int_rsp_out[x][y][a][k].read = true; - } - - signal_dspin_false_ram_cmd_in[x][y][a].write = false; - signal_dspin_false_ram_cmd_in[x][y][a].read = true; - signal_dspin_false_ram_cmd_out[x][y][a].write = false; - signal_dspin_false_ram_cmd_out[x][y][a].read = true; - - signal_dspin_false_ram_rsp_in[x][y][a].write = false; - signal_dspin_false_ram_rsp_in[x][y][a].read = true; - signal_dspin_false_ram_rsp_out[x][y][a].write = false; - signal_dspin_false_ram_rsp_out[x][y][a].read = true; - } + gettimeofday(&t1, NULL); + sc_start(sc_core::sc_time(stats_period, SC_NS)); + gettimeofday(&t2, NULL); + + n += stats_period; + + uint64_t ms1 = (uint64_t) t1.tv_sec * 1000ULL + + (uint64_t) t1.tv_usec / 1000; + uint64_t ms2 = (uint64_t) t2.tv_sec * 1000ULL + + (uint64_t) t2.tv_usec / 1000; + std::cerr << "### cycle = " << n + << " / frequency = " + << (double) stats_period / (double) (ms2 - ms1) << "Khz" + << std::endl; } + + return EXIT_SUCCESS; } - sc_start(sc_core::sc_time(1, SC_NS)); - signal_resetn = true; - - - // simulation loop - struct timeval t1,t2; - gettimeofday(&t1, NULL); - - for (size_t n = 1; n < ncycles; n++) - { - // stats display - if( (n % 1000000) == 0) - { - gettimeofday(&t2, NULL); - - uint64_t ms1 = (uint64_t) t1.tv_sec * 1000ULL + - (uint64_t) t1.tv_usec / 1000; - uint64_t ms2 = (uint64_t) t2.tv_sec * 1000ULL + - (uint64_t) t2.tv_usec / 1000; - std::cerr << "### cycle = " << n - << " / frequency = " - << (double) 1000000 / (double) (ms2 - ms1) << "Khz" - << std::endl; - - gettimeofday(&t1, NULL); - } - - // Monitor a specific address for one L1 cache - // clusters[1][1]->proc[0]->cache_monitor(0x50090ULL); - - // Monitor a specific address for one L2 cache - // clusters[0][0]->memc->cache_monitor( 0x170000ULL); - - // Monitor a specific address for one XRAM - // if (n == 3000000) clusters[0][0]->xram->start_monitor( 0x170000ULL , 64); - - if (debug_ok and (n > debug_from) and (n % debug_period == 0)) - { - std::cout << "****************** cycle " << std::dec << n ; - std::cout << " ************************************************" << std::endl; - - // trace proc[debug_proc_id] - if ( debug_proc_id != 0xFFFFFFFF ) - { - size_t l = debug_proc_id % NB_PROCS_MAX ; - size_t cluster_xy = debug_proc_id / NB_PROCS_MAX ; - size_t x = cluster_xy >> 4; - size_t y = cluster_xy & 0xF; - - clusters[x][y]->proc[l]->print_trace(1); - std::ostringstream proc_signame; - proc_signame << "[SIG]PROC_" << x << "_" << y << "_" << l ; - clusters[x][y]->signal_int_vci_ini_proc[l].print_trace(proc_signame.str()); - - clusters[x][y]->xicu->print_trace(l); - std::ostringstream xicu_signame; - xicu_signame << "[SIG]XICU_" << x << "_" << y; - clusters[x][y]->signal_int_vci_tgt_xicu.print_trace(xicu_signame.str()); - -// clusters[x][y]->mdma->print_trace(); -// std::ostringstream mdma_signame; -// mdma_signame << "[SIG]MDMA_" << x << "_" << y; -// clusters[x][y]->signal_int_vci_tgt_mdma.print_trace(mdma_signame.str()); - - if( clusters[x][y]->signal_proc_it[l].read() ) - std::cout << "### IRQ_PROC_" << std::dec - << x << "_" << y << "_" << l << " ACTIVE" << std::endl; - } - - // trace memc[debug_memc_id] - if ( debug_memc_id != 0xFFFFFFFF ) - { - size_t x = debug_memc_id >> 4; - size_t y = debug_memc_id & 0xF; - - clusters[x][y]->memc->print_trace(0); - std::ostringstream smemc_tgt; - smemc_tgt << "[SIG]MEMC_TGT_" << x << "_" << y; - clusters[x][y]->signal_int_vci_tgt_memc.print_trace(smemc_tgt.str()); - std::ostringstream smemc_ini; - smemc_ini << "[SIG]MEMC_INI_" << x << "_" << y; - clusters[x][y]->signal_ram_vci_ini_memc.print_trace(smemc_ini.str()); - - clusters[x][y]->xram->print_trace(); - std::ostringstream sxram_tgt; - sxram_tgt << "[SIG]XRAM_TGT_" << x << "_" << y; - clusters[x][y]->signal_ram_vci_tgt_xram.print_trace(sxram_tgt.str()); - } - - - // trace XRAM and XRAM network routers in cluster[debug_xram_id] - if ( debug_xram_id != 0xFFFFFFFF ) - { - size_t x = debug_xram_id >> 4; - size_t y = debug_xram_id & 0xF; - - clusters[x][y]->xram->print_trace(); - std::ostringstream sxram_tgt; - sxram_tgt << "[SIG]XRAM_TGT_" << x << "_" << y; - clusters[x][y]->signal_ram_vci_tgt_xram.print_trace(sxram_tgt.str()); - - clusters[x][y]->ram_router_cmd->print_trace(); - clusters[x][y]->ram_router_rsp->print_trace(); - } - - // trace iob, iox and external peripherals - if ( debug_iob ) - { - clusters[0][0]->iob->print_trace(); - clusters[XMAX-1][YMAX-1]->iob->print_trace(); -// clusters[0][0]->signal_int_vci_tgt_iobx.print_trace( "[SIG]IOB0_INT_TGT"); -// clusters[0][0]->signal_int_vci_ini_iobx.print_trace( "[SIG]IOB0_INT_INI"); -// clusters[0][0]->signal_ram_vci_ini_iobx.print_trace( "[SIG]IOB0_RAM_INI"); - - signal_vci_ini_iob0.print_trace("[SIG]IOB0_IOX_INI"); - signal_vci_tgt_iob0.print_trace("[SIG]IOB0_IOX_TGT"); - -// cdma->print_trace(); -// signal_vci_tgt_cdma.print_trace("[SIG]IOX_CDMA_TGT"); -// signal_vci_ini_cdma.print_trace("[SIG]IOX_CDMA_INI"); - -// mtty->print_trace(); -// signal_vci_tgt_mtty.print_trace("[SIG]IOX_MTTY_TGT"); - - bdev->print_trace(); - signal_vci_tgt_bdev.print_trace("[SIG]BDEV_TGT"); - signal_vci_ini_bdev.print_trace("[SIG]BDEV_INI"); - - mnic->print_trace(); - signal_vci_tgt_mnic.print_trace("[SIG]MNIC_TGT"); - -// fbuf->print_trace(); -// signal_vci_tgt_fbuf.print_trace("[SIG]FBUF"); - - iopi->print_trace(); - signal_vci_ini_iopi.print_trace("[SIG]IOPI_INI"); - signal_vci_tgt_iopi.print_trace("[SIG]IOPI_TGT"); - iox_network->print_trace(); - - // interrupts - if (signal_irq_bdev) std::cout << "### IRQ_BDEV ACTIVE" << std::endl; - if (signal_irq_mtty_rx) std::cout << "### IRQ_MTTY ACTIVE" << std::endl; - if (signal_irq_mnic_rx[0]) std::cout << "### IRQ_MNIC_RX[0] ACTIVE" << std::endl; - if (signal_irq_mnic_rx[1]) std::cout << "### IRQ_MNIC_RX[1] ACTIVE" << std::endl; - if (signal_irq_mnic_tx[0]) std::cout << "### IRQ_MNIC_TX[0] ACTIVE" << std::endl; - if (signal_irq_mnic_tx[1]) std::cout << "### IRQ_MNIC_TX[1] ACTIVE" << std::endl; - } - } - - sc_start(sc_core::sc_time(1, SC_NS)); - } - return EXIT_SUCCESS; + gettimeofday(&t1, NULL); + for (size_t n = 1; n < ncycles; n++) + { + // stats display + if( (n % stats_period) == 0) + { + gettimeofday(&t2, NULL); + + uint64_t ms1 = (uint64_t) t1.tv_sec * 1000ULL + + (uint64_t) t1.tv_usec / 1000; + uint64_t ms2 = (uint64_t) t2.tv_sec * 1000ULL + + (uint64_t) t2.tv_usec / 1000; + std::cerr << "### cycle = " << n + << " / frequency = " + << (double) stats_period / (double) (ms2 - ms1) << "Khz" + << std::endl; + + gettimeofday(&t1, NULL); + } + + // Monitor a specific address for one L1 cache + // clusters[1][1]->proc[0]->cache_monitor(0x50090ULL); + + // Monitor a specific address for one L2 cache + // clusters[0][0]->memc->cache_monitor( 0x170000ULL); + + // Monitor a specific address for one XRAM + // if (n == 3000000) clusters[0][0]->xram->start_monitor( 0x170000ULL , 64); + + if (debug_ok and (n > debug_from) and (n % debug_period == 0)) + { + std::cout << "****************** cycle " << std::dec << n ; + std::cout << " ************************************************" << std::endl; + + // trace proc[debug_proc_id] + if ( debug_proc_id != 0xFFFFFFFF ) + { + size_t l = debug_proc_id % NB_PROCS_MAX ; + size_t cluster_xy = debug_proc_id / NB_PROCS_MAX ; + size_t x = cluster_xy >> 4; + size_t y = cluster_xy & 0xF; + + clusters[x][y]->proc[l]->print_trace(1); + std::ostringstream proc_signame; + proc_signame << "[SIG]PROC_" << x << "_" << y << "_" << l ; + clusters[x][y]->signal_int_vci_ini_proc[l].print_trace(proc_signame.str()); + + clusters[x][y]->xicu->print_trace(l); + std::ostringstream xicu_signame; + xicu_signame << "[SIG]XICU_" << x << "_" << y; + clusters[x][y]->signal_int_vci_tgt_xicu.print_trace(xicu_signame.str()); + + // clusters[x][y]->mdma->print_trace(); + // std::ostringstream mdma_signame; + // mdma_signame << "[SIG]MDMA_" << x << "_" << y; + // clusters[x][y]->signal_int_vci_tgt_mdma.print_trace(mdma_signame.str()); + + if( clusters[x][y]->signal_proc_it[l].read() ) + std::cout << "### IRQ_PROC_" << std::dec + << x << "_" << y << "_" << l << " ACTIVE" << std::endl; + } + + // trace memc[debug_memc_id] + if ( debug_memc_id != 0xFFFFFFFF ) + { + size_t x = debug_memc_id >> 4; + size_t y = debug_memc_id & 0xF; + + clusters[x][y]->memc->print_trace(0); + std::ostringstream smemc_tgt; + smemc_tgt << "[SIG]MEMC_TGT_" << x << "_" << y; + clusters[x][y]->signal_int_vci_tgt_memc.print_trace(smemc_tgt.str()); + std::ostringstream smemc_ini; + smemc_ini << "[SIG]MEMC_INI_" << x << "_" << y; + clusters[x][y]->signal_ram_vci_ini_memc.print_trace(smemc_ini.str()); + + clusters[x][y]->xram->print_trace(); + std::ostringstream sxram_tgt; + sxram_tgt << "[SIG]XRAM_TGT_" << x << "_" << y; + clusters[x][y]->signal_ram_vci_tgt_xram.print_trace(sxram_tgt.str()); + } + + + // trace XRAM and XRAM network routers in cluster[debug_xram_id] + if ( debug_xram_id != 0xFFFFFFFF ) + { + size_t x = debug_xram_id >> 4; + size_t y = debug_xram_id & 0xF; + + clusters[x][y]->xram->print_trace(); + std::ostringstream sxram_tgt; + sxram_tgt << "[SIG]XRAM_TGT_" << x << "_" << y; + clusters[x][y]->signal_ram_vci_tgt_xram.print_trace(sxram_tgt.str()); + + clusters[x][y]->ram_router_cmd->print_trace(); + clusters[x][y]->ram_router_rsp->print_trace(); + } + + // trace iob, iox and external peripherals + if ( debug_iob ) + { + clusters[0][0]->iob->print_trace(); + clusters[XMAX-1][YMAX-1]->iob->print_trace(); + // clusters[0][0]->signal_int_vci_tgt_iobx.print_trace( "[SIG]IOB0_INT_TGT"); + // clusters[0][0]->signal_int_vci_ini_iobx.print_trace( "[SIG]IOB0_INT_INI"); + // clusters[0][0]->signal_ram_vci_ini_iobx.print_trace( "[SIG]IOB0_RAM_INI"); + + signal_vci_ini_iob0.print_trace("[SIG]IOB0_IOX_INI"); + signal_vci_tgt_iob0.print_trace("[SIG]IOB0_IOX_TGT"); + + // cdma->print_trace(); + // signal_vci_tgt_cdma.print_trace("[SIG]IOX_CDMA_TGT"); + // signal_vci_ini_cdma.print_trace("[SIG]IOX_CDMA_INI"); + + // mtty->print_trace(); + // signal_vci_tgt_mtty.print_trace("[SIG]IOX_MTTY_TGT"); + + bdev->print_trace(); + signal_vci_tgt_bdev.print_trace("[SIG]BDEV_TGT"); + signal_vci_ini_bdev.print_trace("[SIG]BDEV_INI"); + + mnic->print_trace(); + signal_vci_tgt_mnic.print_trace("[SIG]MNIC_TGT"); + + // fbuf->print_trace(); + // signal_vci_tgt_fbuf.print_trace("[SIG]FBUF"); + + iopi->print_trace(); + signal_vci_ini_iopi.print_trace("[SIG]IOPI_INI"); + signal_vci_tgt_iopi.print_trace("[SIG]IOPI_TGT"); + iox_network->print_trace(); + + // interrupts + if (signal_irq_bdev) std::cout << "### IRQ_BDEV ACTIVE" << std::endl; + if (signal_irq_mtty_rx) std::cout << "### IRQ_MTTY ACTIVE" << std::endl; + if (signal_irq_mnic_rx[0]) std::cout << "### IRQ_MNIC_RX[0] ACTIVE" << std::endl; + if (signal_irq_mnic_rx[1]) std::cout << "### IRQ_MNIC_RX[1] ACTIVE" << std::endl; + if (signal_irq_mnic_tx[0]) std::cout << "### IRQ_MNIC_TX[0] ACTIVE" << std::endl; + if (signal_irq_mnic_tx[1]) std::cout << "### IRQ_MNIC_TX[1] ACTIVE" << std::endl; + } + } + + sc_start(sc_core::sc_time(1, SC_NS)); + } + return EXIT_SUCCESS; }