Ignore:
Timestamp:
Jul 24, 2014, 3:19:18 PM (10 years ago)
Author:
cfuguet
Message:

tsar_boot: improving configuration infrastructure

  • Using hard_config.h which respects the same sintax that the hard_config.h file of all TSAR platforms. This file can be then generated by the GIET-VM genmap tool or written manually.
  • All peripheral drivers have been moved to a drivers directory and they are compiled as a static library. This allows GCC to only include in the final .ELF the object files of used peripherals and not all of them.
  • Example hard_config.h and ldscripts have been introduced in the conf directory.
  • Improving comments in all files
Location:
trunk/softs/tsar_boot/src
Files:
4 edited

Legend:

Unmodified
Added
Removed

  • trunk/softs/tsar_boot/src/reset.S

    r755 r758  
    2424 * - Each processor initialises its private XICU WTI mask register.
    2525 * - Only processor 0 executes the reset_load_elf function to load into memory
    26  *   the system specific boot-loader stored on disk at BOOT_LOADER_LBA
     26 *   the system specific boot-loader stored on disk at RESET_LOADER_LBA
    2727 * - All other processors wait in a low power consumption mode that the
    2828 *   processor 0 wakes them using an IPI (Inter Processor Interruption)
    … …  
    8686    move    t3,     t0
    8787
    88     la      k0,     NB_PROCS         /* k0 <= # of processors per cluster   */
     88    la      k0,     NB_PROCS_MAX     /* k0 <= # of processors per cluster   */
    8989    divu    t3,     k0
    9090    mfhi    t1                       /* t1 <= lpid       = pid % NB_PROCS   */
    … …  
    101101     */
    102102
    103     la      t3,     ICU_PADDR_BASE   /* t3 <= ICU base address              */
    104     move    t4,     t1               /* t4 <= local_id                      */
    105     li      t5,     IRQ_PER_PROC     /* t5 <= IRQ_PER_PROC                  */
     103    la      t3,     SEG_XCU_BASE      /* t3 <= ICU base address             */
     104    move    t4,     t1                /* t4 <= local_id                     */
     105    li      t5,     IRQ_PER_PROCESSOR /* t5 <= IRQ_PER_PROCESSOR            */
    106106    multu   t4,     t5
    107107    mflo    t6                       /* t6 <= IRQ_PER_PROC * local_id       */
    … …  
    142142
    143143    la      a0,     versionstr
    144     la      k0,     reset_puts
    145     jalr    k0
    146     nop
    147 
    148 
    149 #if USE_SPI
    150 
    151     /* Processor 0 Initialize the SPI controller */
    152 
    153     la      k0,     reset_ioc_init
    154     jalr    k0
    155     nop
    156 
    157 #endif
     144    jal     reset_puts
     145    nop
     146
     147    /* Processor 0 initializes the block device */
     148
     149    jal     reset_ioc_init
     150    nop
    158151
    159152    /*
    … …  
    162155     */
    163156
    164     la      k0,     reset_elf_loader
    165     li      a0,     BOOT_LOADER_LBA
    166     jalr    k0
     157    li      a0,     RESET_LOADER_LBA
     158    jal     reset_elf_loader
    167159    nop
    168160

  • trunk/softs/tsar_boot/src/reset_elf_loader.c

    r701 r758  
    3838     * Load ELF PROGRAM HEADER TABLE
    3939     */
    40     Elf32_Phdr elf_pht[PHDR_ARRAY_SIZE];
     40    Elf32_Phdr elf_pht[RESET_PHDR_ARRAY_SIZE];
    4141    size_t phdr_nbyte = sizeof(Elf32_Phdr) * elf_header.e_phnum;
    4242    size_t phdr_off = elf_header.e_phoff;

  • trunk/softs/tsar_boot/src/reset_ioc.c

    r654 r758  
     1/**
     2 * \file   reset_ioc.c
     3 * \date   December 2013
     4 * \author Cesar Fuguet
     5 *
     6 * \brief  API for accessing the disk controller
     7 *
     8 * \note   These functions call the specific disk controller driver depending
     9 *         on the USE_IOC_BDV, USE_IOC_SPI or USE_RAMDISK constants
     10 */
     11
    112#include <reset_ioc.h>
     13#include <defs.h>
    214
    3 #if USE_SPI
    4 static struct sdcard_dev     _sdcard_device;
    5 static struct spi_dev *const _spi_device = (struct spi_dev*) IOC_PADDR_BASE;
     15#if !defined(USE_IOC_BDV) && !defined(USE_IOC_SPI) && !defined(USE_RAMDISK)
     16#   error "One of the USE_IOC_* constants must be defined in the hard_config.h"
    617#endif
    718
    8 #define SDCARD_RESET_ITER_MAX   4
     19#if (USE_IOC_BDV + USE_IOC_SPI + USE_RAMDISK) != 1
     20#   error "Only one disk controller must be used"
     21#endif
    922
    10 ///////////////////////////////////
    11 inline void reset_sleep(int cycles)
     23#if USE_IOC_SPI
     24#include <reset_sdc.h>
     25#endif
     26
     27#if USE_IOC_BDV
     28#include <reset_bdv.h>
     29#endif
     30
     31#if USE_RAMDISK
     32#include <reset_rdk.h>
     33#endif
     34
     35/**
     36 * \brief Initialize the disk controller
     37 */
     38int reset_ioc_init()
    1239{
    13     int i;
    14     for (i = 0; i < cycles; i++);
     40#if USE_IOC_BDV
     41    return reset_bdv_init();
     42#elif USE_IOC_SPI
     43    return reset_sdc_init();
     44#elif USE_RAMDISK
     45    return reset_rdk_init();
     46#else
     47#   error "reset_ioc_init() : Not supported disk controller chosen"
     48#endif
    1549}
    1650
    17 #if USE_SPI
    18 ///////////////////////////////////////////////////////////////////////////////
    19 //     reset_ioc_init
    20 // This function initializes the SDCARD / required for FPGA.
    21 ///////////////////////////////////////////////////////////////////////////////
    22 int reset_ioc_init()
     51/**
     52 * \param lba   : first block index on the disk
     53 * \param buffer: base address of the memory buffer
     54 * \param count : number of blocks to be transfered
     55 *
     56 * \brief Transfer data from disk to a memory buffer
     57 *
     58 * \note  This is a blocking function. The function returns once the transfer
     59 *        is completed.
     60 */
     61int reset_ioc_read( unsigned int lba, void* buffer, unsigned int count )
    2362{
    24     unsigned char sdcard_rsp;
    25 
    26     reset_puts("Initializing block device\n\r");
    27 
    28     /**
    29      * Initializing the SPI controller
    30      */
    31     spi_dev_config (
    32       _spi_device   ,
    33       200000        , /**< SPI_clk: 200 Khz */
    34       SYSCLK_FREQ   , /**< Sys_clk          */
    35       8             , /**< Charlen: 8       */
    36       SPI_TX_NEGEDGE,
    37       SPI_RX_POSEDGE
    38     );
    39 
    40     /**
    41      * Initializing the SD Card
    42      */
    43     unsigned int iter = 0;
    44     while(1)
    45     {
    46         reset_puts("Trying to initialize SD card... ");
    47 
    48         sdcard_rsp = sdcard_dev_open(&_sdcard_device, _spi_device, 0);
    49         if (sdcard_rsp == 0)
    50         {
    51             reset_puts("OK\n");
    52             break;
    53         }
    54 
    55         reset_puts("KO\n");
    56         reset_sleep(1000);
    57         if (++iter >= SDCARD_RESET_ITER_MAX)
    58         {
    59             reset_puts("\nERROR: During SD card reset to IDLE state\n"
    60                       "/ card response = ");
    61             reset_putx(sdcard_rsp);
    62             reset_puts("\n");
    63             reset_exit();
    64         }
    65     }
    66 
    67     /**
    68      * Set the block length of the SD Card
    69      */
    70     sdcard_rsp = sdcard_dev_set_blocklen(&_sdcard_device, 512);
    71     if (sdcard_rsp)
    72     {
    73         reset_puts("ERROR: During SD card blocklen initialization\n");
    74         reset_exit();
    75     }
    76 
    77     /**
    78      * Incrementing SDCARD clock frequency for normal function
    79      */
    80     spi_dev_config (
    81         _spi_device ,
    82         10000000    , /**< SPI_clk 10 Mhz */
    83         SYSCLK_FREQ , /**< Sys_clk        */
    84         -1          , /**< Charlen: 8     */
    85         -1          ,
    86         -1
    87     );
    88 
    89     reset_puts("Finish block device initialization\n\r");
    90 
    91     return 0;
    92 } // end reset_ioc_init()
    93 #endif
    94 
    95 //////////////////////////////////////////////////////////////////////////////
    96 // reset_bdv_read()
    97 /////////////////////////////////////////////////////////////////////////////
    98 #if USE_BDV
    99 int reset_bdv_read( unsigned int lba,
    100                     void*        buffer,
    101                     unsigned int count )
    102 {
    103     unsigned int * ioc_address = (unsigned int*)IOC_PADDR_BASE;
    104 
    105     // block_device configuration
    106     iowrite32( &ioc_address[BLOCK_DEVICE_BUFFER], (unsigned int) buffer );
    107     iowrite32( &ioc_address[BLOCK_DEVICE_COUNT], count );
    108     iowrite32( &ioc_address[BLOCK_DEVICE_LBA], lba );
    109     iowrite32( &ioc_address[BLOCK_DEVICE_IRQ_ENABLE], 0 );
    110 
    111     // block_device trigger transfer
    112     iowrite32( &ioc_address[BLOCK_DEVICE_OP], ( unsigned int )
    113                BLOCK_DEVICE_READ );
    114 
    115     unsigned int status = 0;
    116     while ( 1 )
    117     {
    118         status = ioread32(&ioc_address[BLOCK_DEVICE_STATUS]);
    119         if ( status == BLOCK_DEVICE_READ_SUCCESS )
    120         {
    121             break;
    122         }
    123         if ( status == BLOCK_DEVICE_READ_ERROR   ) {
    124             reset_puts("ERROR during read on the BLK device\n");
    125             return 1;
    126         }
    127     }
    128 #if (CACHE_COHERENCE == 0) || USE_IOB
    129     reset_buf_invalidate(buffer, CACHE_LINE_SIZE, count * 512);
    130 #endif
    131     return 0;
    132 }
    133 #endif
    134 
    135 //////////////////////////////////////////////////////////////////////////////
    136 // reset_spi_read()
    137 /////////////////////////////////////////////////////////////////////////////
    138 #if USE_SPI
    139 static int reset_spi_read( unsigned int lba,
    140                            void*        buffer,
    141                            unsigned int count )
    142 {
    143     unsigned int sdcard_rsp;
    144     unsigned int i;
    145 
    146     sdcard_dev_lseek(&_sdcard_device, lba);
    147     for(i = 0; i < count; i++)
    148     {
    149         unsigned char* buf = (unsigned char *) buffer + (512 * i);
    150         if (( sdcard_rsp = sdcard_dev_read ( &_sdcard_device, buf, 512 ) ))
    151         {
    152             reset_puts("ERROR during read on the SDCARD device. Code: ");
    153             reset_putx(sdcard_rsp);
    154             reset_puts("\n");
    155             return 1;
    156         }
    157     }
    158     return 0;
    159 }
    160 #endif
    161 
    162 //////////////////////////////////////////////////////////////////////////////
    163 // reset_rdk_read()
    164 /////////////////////////////////////////////////////////////////////////////
    165 #if USE_RDK
    166 static int reset_rdk_read( unsigned int lba,
    167                            void*        buffer,
    168                            unsigned int count )
    169 {
    170     unsigned int* rdk_address = (unsigned int*) RDK_PADDR_BASE;
    171     char* src = (char*) rdk_address + (lba * 512);
    172 
    173     memcpy(buffer, (void*) src, count * 512);
    174     return 0;
    175 }
    176 #endif
    177 
    178 ///////////////////////////////////////////////////////////////////////////////
    179 //      reset_ioc_read()
    180 // Transfer data from disk to a memory buffer
    181 // - param lba    : first block index on the disk
    182 // - param buffer : base address of the memory buffer
    183 // - param count  : number of blocks to be transfered
    184 // This is a blocking function. The function returns once the transfer is
    185 // completed.
    186 //
    187 // The USE_BDV, USE_SPI and USE_RDK variables signal if the disk is accessed
    188 // through a BLOCK DEVICE, SPI or RAMDISK respectively
    189 ///////////////////////////////////////////////////////////////////////////////
    190 int reset_ioc_read( unsigned int lba,
    191                     void*        buffer,
    192                     unsigned int count )
    193 {
    194 #if USE_BDV
     63#if USE_IOC_BDV
    19564    return reset_bdv_read(lba, buffer, count);
    196 #elif USE_SPI
    197     return reset_spi_read(lba, buffer, count);
    198 #elif USE_RDK
     65#elif USE_IOC_SPI
     66    return reset_sdc_read(lba, buffer, count);
     67#elif USE_RAMDISK
    19968    return reset_rdk_read(lba, buffer, count);
    20069#else
    201 #   error "reset_ioc_read() : No supported disk controller chosen"
     70#   error "reset_ioc_read() : Not supported disk controller chosen"
    20271#endif
    20372}
    20473
    20574/*
    206  * vim: tabstop=4 : shiftwidth=4 : expandtab
     75 * vim: tabstop=4 : softtabstop=4 : shiftwidth=4 : expandtab
    20776 */

  • trunk/softs/tsar_boot/src/reset_utils.c

    r703 r758  
    88
    99#include <reset_utils.h>
    10 
    11 /*
    12  * pread(size_t file_offset, void* buf, size_t nbyte, size_t offset)
    13  *
    14  * read from disk into buffer "nbyte" bytes from (file_offset + offset)
    15  *
     10#include <reset_tty.h>
     11#include <reset_ioc.h>
     12#include <io.h>
     13
     14/**
    1615 * \param file_offset: Disk relative offset of file
    1716 * \param buf: Destination buffer
    1817 * \param nbyte: Number of bytes to read
    1918 * \param offset: File relative offset
     19 *
     20 * \brief read from disk into buffer "nbyte" bytes from (file_offset + offset)
    2021 *
    2122 * \note Absolute disk offset (in bytes) is (file_offset + offset)
    … …  
    5758        if (offset_blk != blk_buf_idx) {
    5859            if (reset_ioc_read(offset_blk, (void*)&blk_buf, 1)) {
    59                 return -1; 
     60                return -1;
    6061            }
    6162        }
    6263        blk_buf_idx = offset_blk;
    63         read_nbyte = (nbyte > unaligned_nbyte) ? unaligned_nbyte : nbyte; 
     64        read_nbyte = (nbyte > unaligned_nbyte) ? unaligned_nbyte : nbyte;
    6465        memcpy((void*)dst, (void*)&blk_buf.b[offset], read_nbyte);
    6566        nbyte -= read_nbyte;
    … …  
    7071     * Read aligned bytes directly to buffer
    7172     */
    72     size_t nblk = nbyte / BLOCK_SIZE; 
     73    size_t nblk = nbyte / BLOCK_SIZE;
    7374    if (nblk) {
    7475        if (reset_ioc_read(offset_blk, (void*)&dst[read_nbyte], nblk)) {
    … …  
    9192        read_nbyte += nbyte;
    9293    }
    93     return read_nbyte;
    94 }
    95 
    96 /********************************************************************
    97  * proctime()
    98  *
    99  * Returns processor local time.
    100  ********************************************************************/
    101 inline unsigned int proctime()
    102 {
    103     unsigned int ret;
    104     asm volatile ("mfc0   %0,        $9":"=r" (ret));
    105     return ret;
    106 }
    107 
    108 /********************************************************************
    109  * memcpy( _dst, _src, size )
    110  *
    111  * Transfer data between two memory buffers.
    112  *
    113  * \param _dst   : Destination buffer base address
     94    return read_nbyte;
     95}
     96
     97/**
     98 * \param _dst   : Destination buffer base address
    11499 * \param _src   : Source buffer base address
    115  * \param size   : Number of bytes to transfer
    116  *
    117  ********************************************************************/
     100 * \param size   : Number of bytes to transfer
     101 *
     102 * \brief Transfer data between two memory buffers.
     103 */
    118104void* memcpy(void *_dst, const void *_src, size_t n)
    119105{
    … …  
    135121}
    136122
    137 /********************************************************************
    138  * memset( _dst, value, size )
    139  *
    140  * Initialize memory buffers with predefined value.
    141  *
    142  * \param _dst   : Destination buffer base address
    143  * \param value  : Initialization value
     123/**
     124 * \param _dst   : Destination buffer base address
     125 * \param value  : Initialization value
    144126 * \param size   : Number of bytes to initialize
    145127 *
    146  ********************************************************************/
     128 * \brief Initialize memory buffers with predefined value.
     129 */
    147130void* memset(void *_dst, int c, size_t len)
    148131{
    … …  
    179162}
    180163
    181 /********************************************************************
    182  * check_elf_header(Elf32_Ehdr*)
    183  *
    184  * Verify that ELF file is valid and that the number of program
    185  * headers does not exceed the defined maximum
    186  *
     164/**
    187165 * \param ehdr : ELF header pointer
    188166 *
    189  ********************************************************************/
     167 * \brief Verify that ELF file is valid and that the number of program headers
     168 *        does not exceed the defined maximum
     169 */
    190170void check_elf_header(Elf32_Ehdr *ehdr)
    191171{
    … …  
    205185     * Verification of Program Headers table size. It must be
    206186     * smaller than the work size allocated for the
    207      * elf_pht[PHDR_ARRAY_SIZE] array
    208      */
    209     if (ehdr->e_phnum > PHDR_ARRAY_SIZE)
     187     * elf_pht[RESET_PHDR_ARRAY_SIZE] array
     188     */
     189    if (ehdr->e_phnum > RESET_PHDR_ARRAY_SIZE)
    210190    {
    211191        reset_puts("[RESET ERROR] ELF PHDR table size too large\n");
    … …  
    214194}
    215195
    216 /********************************************************************
    217  * reset_print_elf_phdr( elf_phdr_ptr )
    218  *
    219  * Print some fields of a ELF program header
    220  *
     196/**
    221197 * \param elf_phdr_ptr : Pointer to the ELF program header to print
    222198 *
    223  ********************************************************************/
     199 * \brief Print some fields of a ELF program header
     200 */
    224201void reset_print_elf_phdr(Elf32_Phdr * elf_phdr_ptr)
    225202{
    … …  
    243220}
    244221
    245 
    246 /********************************************************************
    247  * reset_mcc_inval()
    248  *
    249  * Invalidate all data cache lines corresponding to a memory buffer
    250  * (identified by an address and a size) in L2 cache.
    251  ********************************************************************/
    252 #if USE_IOB
    253 void reset_mcc_invalidate (const void * buffer, size_t size)
    254 {
    255     addr_t *mcc_address = (addr_t*)MCC_PADDR_BASE;
    256 
    257     // get the hard lock assuring exclusive access to MEMC
    258     while (ioread32(&mcc_address[MCC_LOCK]));
    259 
    260     // write invalidate paremeters on the memory cache this preloader
    261     // use only the cluster 0 and then the HI bits are not used
    262    
    263     iowrite32(&mcc_address[MCC_ADDR_LO], (unsigned int) buffer);
    264     iowrite32(&mcc_address[MCC_ADDR_HI], (unsigned int) 0);
    265     iowrite32(&mcc_address[MCC_LENGTH] , (unsigned int) size);
    266     iowrite32(&mcc_address[MCC_CMD]    , (unsigned int) MCC_CMD_INVAL);
    267 
    268     // release the lock protecting MEMC
    269     iowrite32(&mcc_address[MCC_LOCK], (unsigned int) 0);
    270 }
    271 #endif
    272 
    273 /********************************************************************
    274  * reset_dcache_buf_invalidate()
    275  *
    276  * Invalidate all data cache lines corresponding to a memory buffer
    277  * (identified by an address and a size) in L1 cache and L2 cache.
    278  ********************************************************************/
    279 #if (CACHE_COHERENCE == 0) || USE_IOB
    280 void reset_buf_invalidate (const void * buffer, size_t line_size, size_t size)
    281 {
    282     unsigned int i;
    283 
    284     // iterate on cache lines
    285     for (i = 0; i <= size; i += line_size)
    286     {
    287         asm volatile(
    288             " cache %0, %1"
    289             :// no outputs
    290             :"i" (0x11), "R" (*((unsigned char *) buffer + i))
    291             );
    292     }
    293 
    294 #if USE_IOB
    295     reset_mcc_invalidate(buffer, size);
    296 #endif
    297 }
    298 #endif
    299 
    300 // vim: tabstop=4 : softtabstop=4 : shiftwidth=4 : expandtab
     222/*
     223 * vim: tabstop=4 : softtabstop=4 : shiftwidth=4 : expandtab
     224 */
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