Index: trunk/softs/tsar_boot/Doxyfile =================================================================== --- trunk/softs/tsar_boot/Doxyfile (revision 755) +++ trunk/softs/tsar_boot/Doxyfile (revision 758) @@ -210,5 +210,5 @@ # of all members will be omitted, etc. -OPTIMIZE_OUTPUT_FOR_C = NO +OPTIMIZE_OUTPUT_FOR_C = YES # Set the OPTIMIZE_OUTPUT_JAVA tag to YES if your project consists of Java @@ -366,5 +366,5 @@ # the EXTRACT_PRIVATE and EXTRACT_STATIC tags are set to YES -EXTRACT_ALL = NO +EXTRACT_ALL = YES # If the EXTRACT_PRIVATE tag is set to YES all private members of a class @@ -803,10 +803,10 @@ # VERBATIM_HEADERS is set to NO. -SOURCE_BROWSER = NO +SOURCE_BROWSER = YES # Setting the INLINE_SOURCES tag to YES will include the body # of functions and classes directly in the documentation. -INLINE_SOURCES = NO +INLINE_SOURCES = YES # Setting the STRIP_CODE_COMMENTS tag to YES (the default) will instruct @@ -1677,5 +1677,5 @@ # have no effect if this option is set to NO (the default) -HAVE_DOT = NO +HAVE_DOT = YES # The DOT_NUM_THREADS specifies the number of dot invocations doxygen is @@ -1774,5 +1774,5 @@ # graphs for selected functions only using the \callergraph command. -CALLER_GRAPH = NO +CALLER_GRAPH = YES # If the GRAPHICAL_HIERARCHY and HAVE_DOT tags are set to YES then doxygen Index: trunk/softs/tsar_boot/Makefile =================================================================== --- trunk/softs/tsar_boot/Makefile (revision 755) +++ trunk/softs/tsar_boot/Makefile (revision 758) @@ -1,8 +1,9 @@ -# let the user have a default configuration (ie for PLATFORM_DIR and SOCLIB) +# let the user have a default configuration (ie for PLATFORM_DIR) -include ./build.mk +USE_DT ?= 1 +DTS ?= platform.dts + MAKECMDGOALS ?= none -RAMDISK ?= 0 -SOCLIB ?= 0 ifneq ($(MAKECMDGOALS),$(filter $(MAKECMDGOALS),clean distclean clean-doc doc)) @@ -10,18 +11,11 @@ $(error please define PLATFORM_DIR 'make PLATFORM_DIR=foo') else - ifeq ($(SOCLIB),1) - ifeq ($(RAMDISK),1) - DEFS+= -DUSE_RDK - else - DEFS+= -DUSE_BDV - endif - DTS=platform_soclib.dts - $(info Make for $(PLATFORM_DIR), SocLib variant) - else - DEFS+= -DUSE_SPI - DTS=platform_fpga.dts - $(info Make for $(PLATFORM_DIR), FPGA variant) - endif + $(info Make for $(PLATFORM_DIR)) endif +endif + +# Platform clock frequency (in KHz) +ifdef SYSTEM_CLK + DEFS := "-DRESET_SYSTEM_CLK=$(SYSTEM_CLK)" endif @@ -30,4 +24,5 @@ AS := mipsel-unknown-elf-as DU := mipsel-unknown-elf-objdump +AR := mipsel-unknown-elf-ar RM := rm -rf ECHO := @echo @@ -38,6 +33,4 @@ BUILD_DIR := build -SRCS_DIR := src -INCS_DIR := include # ============================================================================= @@ -45,12 +38,5 @@ # ============================================================================= -INCLUDE += -I. -I$(INCS_DIR) -I$(PLATFORM_DIR) - -# ============================================================================= -# Paths of sources in another directories -# ============================================================================= - -VPATH += $(SRCS_DIR) -VPATH += $(PLATFORM_DIR) +INCLUDE += -I. -Iinclude -Idrivers -I$(PLATFORM_DIR) # ============================================================================= @@ -58,46 +44,71 @@ # ============================================================================= +VPATH += src + CFLAGS := -Wall \ -mno-gpopt \ -ffreestanding \ -fomit-frame-pointer \ - -mips32 \ - -ggdb \ - -mlong-calls \ + -march=mips32 \ -O2 \ -Werror C_SRCS := reset_elf_loader.c \ + reset_utils.c \ + reset_exception.c \ reset_ioc.c \ - reset_utils.c \ - reset_tty.c \ - reset_exception.c - -ifeq ($(SOCLIB),0) - C_SRCS += sdcard.c spi.c -endif + version.c S_SRCS := reset.S -OBJS := $(subst .c,.o, $(notdir $(C_SRCS))) -OBJS += $(subst .S,.o, $(notdir $(S_SRCS))) -OBJS := $(addprefix $(BUILD_DIR)/, $(OBJS)) +OBJS := $(addprefix $(BUILD_DIR)/,\ + $(subst .c,.o, $(notdir $(C_SRCS))) \ + $(subst .S,.o, $(notdir $(S_SRCS)))) TARGET := preloader.elf -USE_DT ?= 1 +# ============================================================================= +# Drivers library +# ============================================================================= + +VPATH += drivers + +DRV_SRCS := reset_tty.c \ + reset_inval.c \ + reset_sdc.c \ + reset_bdv.c \ + reset_rdk.c \ + sdcard.c \ + spi.c + +DRV_OBJS := $(addprefix $(BUILD_DIR)/,\ + $(subst .c,.o, $(notdir $(DRV_SRCS)))) + +DRV_LIB := libdrivers.a + +# ============================================================================= +# Makefile rules +# ============================================================================= + +VPATH += $(BUILD_DIR) all: $(TARGET) -$(BUILD_DIR)/version.o: $(BUILD_DIR) $(OBJS) VERSION version.sh - $(ECHO) "[version.sh]" - ./version.sh > $(BUILD_DIR)/version.c - $(ECHO) "[ CC ] $(BUILD_DIR)/version.c" - $(CC) $(DEFS) $(CFLAGS) $(INCLUDE) -c -o $@ $(BUILD_DIR)/version.c +$(BUILD_DIR)/$(DRV_LIB): $(BUILD_DIR) $(DRV_OBJS) + $(ECHO) "[ AR ] $(notdir $@)" + $(AR) rcs $@ $(DRV_OBJS) + +$(BUILD_DIR)/version.o: $(BUILD_DIR)/version.c + $(ECHO) "[ CC ] $(notdir $<)" + $(CC) $(DEFS) $(CFLAGS) $(INCLUDE) -c -o $@ $< $(DU) -D $@ > $@.txt -$(TARGET): $(BUILD_DIR) $(BUILD_DIR)/version.o $(OBJS) $(PLATFORM_DIR)/ldscript $(BUILD_DIR)/platform.ld +$(BUILD_DIR)/version.c: $(BUILD_DIR) version.sh VERSION + $(ECHO) "[version.sh]" + ./version.sh > $@ + +$(TARGET): $(BUILD_DIR) $(OBJS) $(PLATFORM_DIR)/ldscript $(BUILD_DIR)/platform.ld $(BUILD_DIR)/$(DRV_LIB) $(ECHO) "[ LD ] $@" - $(LD) -o $@ -T $(PLATFORM_DIR)/ldscript $(OBJS) $(BUILD_DIR)/version.o + $(LD) -o $@ -T $(PLATFORM_DIR)/ldscript $(OBJS) -L$(BUILD_DIR) -ldrivers $(DU) -D $@ > $@.txt @@ -112,5 +123,5 @@ endif -$(BUILD_DIR)/platform.dtb: $(DTS) +$(BUILD_DIR)/platform.dtb: $(PLATFORM_DIR)/$(DTS) $(ECHO) "[ DTC ] $(notdir $<)" ${DTC} -O dtb -o $@ $< &> /dev/null Index: trunk/softs/tsar_boot/README =================================================================== --- trunk/softs/tsar_boot/README (revision 755) +++ trunk/softs/tsar_boot/README (revision 758) @@ -1,6 +1,8 @@ -TSAR BOOT LOADER +\author: Cesar Fuguet +\date : July 24, 2014 + +TSAR BOOT-LOADER Files: -=============================================================================== src/ Source files The entry point of this boot loader is the file reset.S @@ -8,90 +10,56 @@ include/ Header files -conf/ Platform specific files and ldscript examples. +driver/ Drivers source files and headers + +conf/ Platform specific files and ldscript For each platform, we must define a new directory. + Mandatory files: - - defs_platform.h: + - hard_config.h (can be generated using giet-vm genmap tool) - This file is mandatory. This file defines the NB_PROCS per - cluster, the NB_CLUSTERS and the base address of the TTY, IOC, - XICU and MEMC (config) devices. It defines also: + - ldscript - #define USE_IOB + Optional files: - This constant is used by the boot_ioc_read function to know - if the buffer used to store the blocks from the block_device - must be invalidated in the memory cache after the transfert - has finished. + - platform.dts (platform device tree) - #define CACHE_COHERENCE +Makefile Makefile to compile the boot loader. + Mandatory arguments: - This constant is used by the boot_ioc_read function to know - if the buffer used to store the blocks from the block_device - must be invalidated in the dcache after the transfert has - finished. + - PLATFORM_DIR= - #define CACHE_LINE_SIZE - - This constant is mandatory if CACHE_COHERENCE=0 or USE_IOB=1 - This constant defines the size in bytes of a cache line. - - #define RESET_DEBUG - - Set value to 1 to show some debug messages during loading - - #define IRQ_PER_PROC - - This constant is used to know how many XICU irq outputs are - connected to each processor. - - - platform_soclib.dts: - - Device tree file. It is mandatory if compiling for a SOCLIB - platform and USE_DT=1. - - - platform_fpga.dts: - - Device tree file. It is mandatory if compiling for a FPGA - platform and USE_DT=1. - - - ldscript: - - LD script defining the segments of this boot loader. - We define two segments: - - seg_stack_base: - - Base address of the stack used by processor 0 during the boot - process. read-write data and bss will also be there. - - seg_boot_base: - - Base address of the code and read-only data defined for this - loader - -Makefile Makefile to compile the boot loader. Arguments to pass: - - PLATFORM_DIR= - Defines the directory where to find the plateform specific files - SOCLIB=1 + Optional arguments: - If using SOCLIB, define this flag to use the BLOCK DEVICE - driver and to choose the platform_soclib device tree. + - USE_DT= - RAMDISK=1 - - If using SOCLIB, define this flag to use a RAMDISK instead of - BLOCK DEVICE (Set this flag when the SOCLIB flag is also set) - - USE_DT=0 - + Value can be 1 or 0. If a device tree file is not used, set this flag to 0. It is set by default to 1. - e.g. make PLATFORM_DIR= \ - SOCLIB=1 \ - USE_DT=0 \ - RAMDISK=0 + - SYSTEM_CLK= + + Platform clock frequency in KHz + + - DTS= + + Platform device tree (by default is platform.dts) + +Examples: + + make PLATFORM_DIR= USE_DT=0 + + Compile for and do not compile device tree file + + make PLATFORM_DIR= DTS=platform_fpga.dts SYSTEM_CLK=25000 + + Compile for and compile the 'platform_dpga.dts' + device tree file. System clock frequency is 25 MHz + + make PLATFORM_DIR= SYSTEM_CLK=25000 + + Compile for and compile the 'platform.dts' + device tree file (default name). System clock frequency is 25 MHz + Index: trunk/softs/tsar_boot/VERSION =================================================================== --- trunk/softs/tsar_boot/VERSION (revision 755) +++ trunk/softs/tsar_boot/VERSION (revision 758) @@ -1,1 +1,1 @@ -1.1 +1.3 Index: trunk/softs/tsar_boot/conf/platform_de2_115_fpga/hard_config.h =================================================================== --- trunk/softs/tsar_boot/conf/platform_de2_115_fpga/hard_config.h (revision 758) +++ trunk/softs/tsar_boot/conf/platform_de2_115_fpga/hard_config.h (revision 758) @@ -0,0 +1,95 @@ +#ifndef HARD_CONFIG_H +#define HARD_CONFIG_H + +/* General platform parameters */ + +#define X_SIZE 1 +#define Y_SIZE 1 +#define X_WIDTH 4 +#define Y_WIDTH 4 +#define X_IO 0 +#define Y_IO 0 +#define NB_PROCS_MAX 2 +#define IRQ_PER_PROCESSOR 4 +#define RESET_ADDRESS 0xff000000 +#define NB_TOTAL_PROCS 16 + +/* Peripherals */ + +#define NB_TTY_CHANNELS 1 +#define NB_IOC_CHANNELS 1 +#define NB_NIC_CHANNELS 0 +#define NB_CMA_CHANNELS 0 +#define NB_TIM_CHANNELS 0 +#define NB_DMA_CHANNELS 0 + +#define USE_XCU 1 +#define USE_IOB 0 +#define USE_PIC 0 +#define USE_FBF 1 + +#define USE_IOC_BDV 0 +#define USE_IOC_SPI 1 +#define USE_IOC_HBA 0 + +#define USE_RAMDISK 0 + +#define FBUF_X_SIZE 640 +#define FBUF_Y_SIZE 480 + +#define XCU_NB_INPUTS 16 + +/* base addresses and sizes for physical segments */ + +#define SEG_RAM_BASE 0x0 +#define SEG_RAM_SIZE 0x08000000 /* 128 MB */ + +#define SEG_CMA_BASE 0xb6000000 +#define SEG_CMA_SIZE 0x4000 + +#define SEG_DMA_BASE 0xb1000000 +#define SEG_DMA_SIZE 0x4000 + +#define SEG_FBF_BASE 0xb7000000 +#define SEG_FBF_SIZE 0x100000 + +#define SEG_ICU_BASE 0xffffffff +#define SEG_ICU_SIZE 0x0 + +#define SEG_IOB_BASE 0xbe000000 +#define SEG_IOB_SIZE 0x1000 + +#define SEG_IOC_BASE 0xf2000000 +#define SEG_IOC_SIZE 0x1000 + +#define SEG_MMC_BASE 0xe0000000 +#define SEG_MMC_SIZE 0x1000 + +#define SEG_MWR_BASE 0xffffffff +#define SEG_MWR_SIZE 0x0 + +#define SEG_ROM_BASE 0xff000000 +#define SEG_ROM_SIZE 0x4000 + +#define SEG_SIM_BASE 0xffffffff +#define SEG_SIM_SIZE 0x0 + +#define SEG_NIC_BASE 0xffffffff +#define SEG_NIC_SIZE 0x0 + +#define SEG_PIC_BASE 0xffffffff +#define SEG_PIC_SIZE 0x0 + +#define SEG_TIM_BASE 0xffffffff +#define SEG_TIM_SIZE 0x0 + +#define SEG_TTY_BASE 0xf4000000 +#define SEG_TTY_SIZE 0x4000 + +#define SEG_XCU_BASE 0xf0000000 +#define SEG_XCU_SIZE 0x1000 + +#define SEG_RDK_BASE 0xffffffff +#define SEG_RDK_SIZE 0x0 + +#endif Index: trunk/softs/tsar_boot/conf/platform_de2_115_fpga/ldscript =================================================================== --- trunk/softs/tsar_boot/conf/platform_de2_115_fpga/ldscript (revision 758) +++ trunk/softs/tsar_boot/conf/platform_de2_115_fpga/ldscript (revision 758) @@ -0,0 +1,35 @@ +/********************************************************** + File : ldscript + Author : Cesar Fuguet + Date : June 2011 +**********************************************************/ + +/* Definition of the base address for segments */ + +seg_code_base = 0xFF000000; +seg_data_base = 0x03F00000; + +/* Grouping sections into segments */ + +ENTRY(reset) + +SECTIONS +{ + . = seg_code_base; + .text : + { + *(.reset) + *(.rodata) + *(.rodata.*) + . = ALIGN(0x4); + dtb_addr = .; + INCLUDE "build/platform.ld"; + } + + . = seg_data_base; + .bss ALIGN(0x4) (NOLOAD) : + { + *(.data) + *(.bss) + } +} Index: trunk/softs/tsar_boot/conf/platform_de2_115_fpga/platform.dts =================================================================== --- trunk/softs/tsar_boot/conf/platform_de2_115_fpga/platform.dts (revision 758) +++ trunk/softs/tsar_boot/conf/platform_de2_115_fpga/platform.dts (revision 758) @@ -0,0 +1,125 @@ +/dts-v1/; + +/ { + #address-cells = <0x1>; + #size-cells = <0x1>; + + cpus { + #address-cells = <0x1>; + #size-cells = <0x0>; + + Mips,32@0 { + device_type = "cpu"; + icudev_type = "cpu:mips"; + name = "Mips,32"; + reg = <0x00000000>; + }; + + Mips,32@1 { + device_type = "cpu"; + icudev_type = "cpu:mips"; + name = "Mips,32"; + reg = <0x00000001>; + }; + }; + + memory@0x00000000 { + cached = <0x1>; + device_type = "memory"; + reg = <0x00000000 0x08000000>; + }; + + memory@0xff000000 { + cached = <0x1>; + device_type = "rom"; + reg = <0xff000000 0x00010000>; + }; + + tty@0xf4000000 { + device_type = "vci:tty"; + irq = <&{/xicu@0xf0000000} 0x0>; + reg = <0xf4000000 0x00000010>; + tty_count = <0x1>; + }; + + blockdevice@0xf2000000 { + device_type = "vci:ioc"; + irq = <&{/xicu@0xf0000000} 0x1>; + reg = <0xf2000000 0x00000020>; + }; + + fb@0xf3000000 { + device_type = "soclib:frame_buffer"; + reg = <0xf3000000 0x00100000>; + mode = <16>; + width = <640>; + height = <480>; + }; + + vcikbc@0xf1000000 { + device_type = "vci:ps2"; + irq = <&{/xicu@0xf0000000} 0x2>; + reg = <0xf1000000 0x00000020>; + ports = <0x2>; + }; + + xicu@0xf0000000 { + device_type = "soclib:xicu:root"; + input_lines = <0x10>; + ipis = <0x10>; + reg = <0xf0000000 0x00001000>; + timers = <0x10>; + timer-freq = <25000000>; + + out@0 { + device_type = "soclib:xicu:filter"; + irq = <&{/cpus/Mips,32@0} 0x0>; + output_line = <0x0>; + parent = <&{/xicu@0xf0000000}>; + }; + + out@1 { + device_type = "soclib:xicu:filter"; + irq = <&{/cpus/Mips,32@0} 0x1>; + output_line = <0x1>; + parent = <&{/xicu@0xf0000000}>; + }; + + out@2 { + device_type = "soclib:xicu:filter"; + irq = <&{/cpus/Mips,32@0} 0x2>; + output_line = <0x2>; + parent = <&{/xicu@0xf0000000}>; + }; + + out@3 { + device_type = "soclib:xicu:filter"; + irq = <&{/cpus/Mips,32@1} 0x0>; + output_line = <0x3>; + parent = <&{/xicu@0xf0000000}>; + }; + + out@4 { + device_type = "soclib:xicu:filter"; + irq = <&{/cpus/Mips,32@1} 0x1>; + output_line = <0x4>; + parent = <&{/xicu@0xf0000000}>; + }; + + out@5 { + device_type = "soclib:xicu:filter"; + irq = <&{/cpus/Mips,32@1} 0x2>; + output_line = <0x5>; + parent = <&{/xicu@0xf0000000}>; + }; + }; + + topology { + #address-cells = <2>; + #size-cells = <0>; + cluster@0,0 { + reg = <0 0>; + devices = <&{/cpus/Mips,32@0} &{/cpus/Mips,32@1} &{/xicu@0xf0000000} &{/tty@0xf4000000} &{/blockdevice@0xf2000000} &{/fb@0xf3000000} &{/vcikbc@0xf1000000} >; + }; + }; +}; Index: trunk/softs/tsar_boot/conf/platform_tsar_generic_iob/defs_platform.h =================================================================== --- trunk/softs/tsar_boot/conf/platform_tsar_generic_iob/defs_platform.h (revision 755) +++ (revision ) @@ -1,16 +1,0 @@ -#define NB_PROCS 4 -#define NB_CLUSTERS 1 -#define CLUSTER_IO 0 - -#define IRQ_PER_PROC 4 - -#define USE_IOB 1 -#define CACHE_COHERENCE 1 -#define CACHE_LINE_SIZE 64 // bytes (ie 16 x 32-bit word) -#define RESET_DEBUG 0 - -#define ICU_PADDR_BASE 0xB0000000 -#define MCC_PADDR_BASE 0xB2000000 -#define IOC_PADDR_BASE 0xB3000000 -#define TTY_PADDR_BASE 0xB4000000 -#define RDK_PADDR_BASE 0xFFFFFFFF // not used Index: trunk/softs/tsar_boot/conf/platform_tsar_generic_iob/hard_config.h =================================================================== --- trunk/softs/tsar_boot/conf/platform_tsar_generic_iob/hard_config.h (revision 758) +++ trunk/softs/tsar_boot/conf/platform_tsar_generic_iob/hard_config.h (revision 758) @@ -0,0 +1,97 @@ +/* Generated by genmap for tsar_iob_2_2_4 */ + +#ifndef HARD_CONFIG_H +#define HARD_CONFIG_H + +/* General platform parameters */ + +#define X_SIZE 2 +#define Y_SIZE 2 +#define X_WIDTH 4 +#define Y_WIDTH 4 +#define X_IO 0 +#define Y_IO 0 +#define NB_PROCS_MAX 4 +#define IRQ_PER_PROCESSOR 4 +#define RESET_ADDRESS 0xbfc00000 +#define NB_TOTAL_PROCS 16 + +/* Peripherals */ + +#define NB_TTY_CHANNELS 1 +#define NB_IOC_CHANNELS 1 +#define NB_NIC_CHANNELS 2 +#define NB_CMA_CHANNELS 4 +#define NB_TIM_CHANNELS 0 +#define NB_DMA_CHANNELS 4 + +#define USE_XCU 1 +#define USE_IOB 1 +#define USE_PIC 1 +#define USE_FBF 1 + +#define USE_IOC_BDV 1 +#define USE_IOC_SPI 0 +#define USE_IOC_HBA 0 + +#define USE_RAMDISK 0 + +#define FBUF_X_SIZE 1024 +#define FBUF_Y_SIZE 1024 + +#define XCU_NB_INPUTS 16 + +/* base addresses and sizes for physical segments */ + +#define SEG_RAM_BASE 0x0 +#define SEG_RAM_SIZE 0x4000000 + +#define SEG_CMA_BASE 0xb6000000 +#define SEG_CMA_SIZE 0x4000 + +#define SEG_DMA_BASE 0xb1000000 +#define SEG_DMA_SIZE 0x4000 + +#define SEG_FBF_BASE 0xb7000000 +#define SEG_FBF_SIZE 0x100000 + +#define SEG_ICU_BASE 0xffffffff +#define SEG_ICU_SIZE 0x0 + +#define SEG_IOB_BASE 0xbe000000 +#define SEG_IOB_SIZE 0x1000 + +#define SEG_IOC_BASE 0xb3000000 +#define SEG_IOC_SIZE 0x1000 + +#define SEG_MMC_BASE 0xb2000000 +#define SEG_MMC_SIZE 0x1000 + +#define SEG_MWR_BASE 0xffffffff +#define SEG_MWR_SIZE 0x0 + +#define SEG_ROM_BASE 0xbfc00000 +#define SEG_ROM_SIZE 0x4000 + +#define SEG_SIM_BASE 0xffffffff +#define SEG_SIM_SIZE 0x0 + +#define SEG_NIC_BASE 0xb5000000 +#define SEG_NIC_SIZE 0x80000 + +#define SEG_PIC_BASE 0xb8000000 +#define SEG_PIC_SIZE 0x1000 + +#define SEG_TIM_BASE 0xffffffff +#define SEG_TIM_SIZE 0x0 + +#define SEG_TTY_BASE 0xb4000000 +#define SEG_TTY_SIZE 0x4000 + +#define SEG_XCU_BASE 0xb0000000 +#define SEG_XCU_SIZE 0x1000 + +#define SEG_RDK_BASE 0xffffffff +#define SEG_RDK_SIZE 0x0 + +#endif Index: trunk/softs/tsar_boot/conf/platform_tsar_generic_iob/ldscript =================================================================== --- trunk/softs/tsar_boot/conf/platform_tsar_generic_iob/ldscript (revision 755) +++ trunk/softs/tsar_boot/conf/platform_tsar_generic_iob/ldscript (revision 758) @@ -1,14 +1,12 @@ /********************************************************** - File : ldscript + File : ldscript Author : Cesar Fuguet Date : June 2011 **********************************************************/ -/* Definition of the base address for code segment */ +/* Definition of the base address for segments */ -seg_reset_code_base = 0xBFC00000; - -seg_reset_stack_base = 0x000D0000; -seg_reset_stack_size = 0x00050000; +seg_code_base = 0xBFC00000; +seg_data_base = 0x000D0000; /* Grouping sections into segments */ @@ -18,6 +16,6 @@ SECTIONS { - . = seg_reset_code_base; - .text : + . = seg_code_base; + .text : { *(.reset) @@ -29,6 +27,6 @@ } - . = seg_reset_stack_base; - .bss ALIGN(0x4) (NOLOAD) : + . = seg_data_base; + .bss ALIGN(0x4) (NOLOAD) : { *(.data) Index: trunk/softs/tsar_boot/drivers/reset_bdv.c =================================================================== --- trunk/softs/tsar_boot/drivers/reset_bdv.c (revision 758) +++ trunk/softs/tsar_boot/drivers/reset_bdv.c (revision 758) @@ -0,0 +1,88 @@ +/** + * \file reset_bdv.c + * \date December 14, 2014 + * \author Cesar Fuguet + */ +#include +#include +#include +#include +#include + +#ifndef SEG_IOC_BASE +# error "SEG_IOC_BASE constant must be defined in the hard_config.h file" +#endif + +static int* const ioc_address = (int* const)SEG_IOC_BASE; + +enum block_device_registers { + BLOCK_DEVICE_BUFFER, + BLOCK_DEVICE_LBA, + BLOCK_DEVICE_COUNT, + BLOCK_DEVICE_OP, + BLOCK_DEVICE_STATUS, + BLOCK_DEVICE_IRQ_ENABLE, + BLOCK_DEVICE_SIZE, + BLOCK_DEVICE_BLOCK_SIZE, +}; + +enum block_device_operations { + BLOCK_DEVICE_NOOP, + BLOCK_DEVICE_READ, + BLOCK_DEVICE_WRITE, +}; + +enum block_device_status { + BLOCK_DEVICE_IDLE, + BLOCK_DEVICE_BUSY, + BLOCK_DEVICE_READ_SUCCESS, + BLOCK_DEVICE_WRITE_SUCCESS, + BLOCK_DEVICE_READ_ERROR, + BLOCK_DEVICE_WRITE_ERROR, + BLOCK_DEVICE_ERROR, +}; + +int reset_bdv_init() +{ + return 0; +} + +int reset_bdv_read( unsigned int lba, void* buffer, unsigned int count ) +{ + /* + * block_device configuration + */ + iowrite32( &ioc_address[BLOCK_DEVICE_BUFFER], (unsigned int) buffer ); + iowrite32( &ioc_address[BLOCK_DEVICE_COUNT], count ); + iowrite32( &ioc_address[BLOCK_DEVICE_LBA], lba ); + iowrite32( &ioc_address[BLOCK_DEVICE_IRQ_ENABLE], 0 ); + + /* + * block_device trigger transfer + */ + iowrite32( &ioc_address[BLOCK_DEVICE_OP], ( unsigned int ) + BLOCK_DEVICE_READ ); + + unsigned int status = 0; + while ( 1 ) + { + status = ioread32(&ioc_address[BLOCK_DEVICE_STATUS]); + if ( status == BLOCK_DEVICE_READ_SUCCESS ) + { + break; + } + if ( status == BLOCK_DEVICE_READ_ERROR ) { + reset_puts("ERROR during read on the BLK device\n"); + return 1; + } + } + +#if (RESET_HARD_CC == 0) || USE_IOB + reset_buf_invalidate(buffer, count * 512, USE_IOB); +#endif + return 0; +} + +/* + * vim: tabstop=4 : softtabstop=4 : shiftwidth=4 : expandtab + */ Index: trunk/softs/tsar_boot/drivers/reset_bdv.h =================================================================== --- trunk/softs/tsar_boot/drivers/reset_bdv.h (revision 758) +++ trunk/softs/tsar_boot/drivers/reset_bdv.h (revision 758) @@ -0,0 +1,17 @@ +/** + * \file reset_bdv.h + * \date December 14, 2014 + * \author Cesar Fuguet + */ +#ifndef RESET_BDV_H +#define RESET_BDV_H + +int reset_bdv_init(); + +int reset_bdv_read( unsigned int lba, void* buffer, unsigned int count ); + +#endif + +/* + * vim: tabstop=4 : softtabstop=4 : shiftwidth=4 : expandtab + */ Index: trunk/softs/tsar_boot/drivers/reset_inval.c =================================================================== --- trunk/softs/tsar_boot/drivers/reset_inval.c (revision 758) +++ trunk/softs/tsar_boot/drivers/reset_inval.c (revision 758) @@ -0,0 +1,80 @@ +/** + * \file reset_inval.c + * \date December 14, 2014 + * \author Cesar Fuguet + */ + +#include +#include +#include + +#ifndef SEG_MMC_BASE +# error "SEG_MMC_BASE constant must be defined in the hard_config.h file" +#endif + +static int* const mcc_address = (int* const)SEG_MMC_BASE; + +enum memc_registers +{ + MCC_LOCK = 0, + MCC_ADDR_LO = 1, + MCC_ADDR_HI = 2, + MCC_LENGTH = 3, + MCC_CMD = 4 +}; + +enum memc_operations +{ + MCC_CMD_NOP = 0, + MCC_CMD_INVAL = 1, + MCC_CMD_SYNC = 2 +}; + +/** + * \brief Invalidate all data cache lines corresponding to a memory buffer + * (identified by an address and a size) in L2 cache. + */ +void reset_mcc_invalidate (void* const buffer, size_t size) +{ + // get the hard lock assuring exclusive access to MEMC + while (ioread32(&mcc_address[MCC_LOCK])); + + // write invalidate paremeters on the memory cache this preloader + // use only the cluster 0 and then the HI bits are not used + + iowrite32(&mcc_address[MCC_ADDR_LO], (unsigned int) buffer); + iowrite32(&mcc_address[MCC_ADDR_HI], (unsigned int) 0); + iowrite32(&mcc_address[MCC_LENGTH] , (unsigned int) size); + iowrite32(&mcc_address[MCC_CMD] , (unsigned int) MCC_CMD_INVAL); + + // release the lock protecting MEMC + iowrite32(&mcc_address[MCC_LOCK], (unsigned int) 0); +} + +/** + * \brief Invalidate all data cache lines corresponding to a memory buffer + * (identified by an address and a size) in L1 cache and L2 cache. + */ +void reset_buf_invalidate (void* const buffer, size_t size, int inval_memc) +{ + unsigned int i; + + /* + * iterate on cache lines containing target buffer to invalidate them + */ + for (i = 0; i <= size; i += CACHE_LINE_SIZE) + { + asm volatile( + " cache %0, %1" + : /* no outputs */ + : "i" (0x11), "R" (*((char*)buffer + i)) + : "memory" + ); + } + + if (inval_memc) reset_mcc_invalidate(buffer, size); +} + +/* + * vim: tabstop=4 : softtabstop=4 : shiftwidth=4 : expandtab + */ Index: trunk/softs/tsar_boot/drivers/reset_inval.h =================================================================== --- trunk/softs/tsar_boot/drivers/reset_inval.h (revision 758) +++ trunk/softs/tsar_boot/drivers/reset_inval.h (revision 758) @@ -0,0 +1,20 @@ +/** + * \file reset_inval.h + * \date December 14, 2014 + * \author Cesar Fuguet + */ + +#ifndef RESET_INVAL_H +#define RESET_INVAL_H + +#include + +void reset_mcc_invalidate (void* const buffer, size_t size); + +void reset_buf_invalidate (void* const buffer, size_t size, int inval_memc); + +#endif + +/* + * vim: tabstop=4 : softtabstop=4 : shiftwidth=4 : expandtab + */ Index: trunk/softs/tsar_boot/drivers/reset_rdk.c =================================================================== --- trunk/softs/tsar_boot/drivers/reset_rdk.c (revision 758) +++ trunk/softs/tsar_boot/drivers/reset_rdk.c (revision 758) @@ -0,0 +1,30 @@ +/** + * \file reset_rdk.c + * \date December 14, 2014 + * \author Cesar Fuguet + */ +#include +#include +#include + +#ifndef SEG_RDK_BASE +# error "SEG_RDK_BASE constant must be defined in the hard_config.h file" +#endif + +static int* const rdk_address = (int* const)SEG_RDK_BASE; + +int reset_rdk_init() +{ + return 0; +} + +int reset_rdk_read( unsigned int lba, void* buffer, unsigned int count ) +{ + char* const src = (char* const)rdk_address + (lba * BLOCK_SIZE); + memcpy(buffer, (void*)src, count * BLOCK_SIZE); + return 0; +} + +/* + * vim: tabstop=4 : softtabstop=4 : shiftwidth=4 : expandtab + */ Index: trunk/softs/tsar_boot/drivers/reset_rdk.h =================================================================== --- trunk/softs/tsar_boot/drivers/reset_rdk.h (revision 758) +++ trunk/softs/tsar_boot/drivers/reset_rdk.h (revision 758) @@ -0,0 +1,13 @@ +/** + * \file reset_rdk.h + * \date December 14, 2014 + * \author Cesar Fuguet + */ + +int reset_rdk_init(); + +int reset_rdk_read( unsigned int lba, void* buffer, unsigned int count ); + +/* + * vim: tabstop=4 : softtabstop=4 : shiftwidth=4 : expandtab + */ Index: trunk/softs/tsar_boot/drivers/reset_sdc.c =================================================================== --- trunk/softs/tsar_boot/drivers/reset_sdc.c (revision 758) +++ trunk/softs/tsar_boot/drivers/reset_sdc.c (revision 758) @@ -0,0 +1,120 @@ +/** + * \file reset_sdc.c + * \author Cesar Fuguet + * \date July 23, 2014 + * + * \brief Wrapper for the SD card and SPI drivers + */ +#include +#include +#include +#include +#include +#include + +#ifndef SEG_IOC_BASE +# error "SEG_IOC_BASE constant must be defined in the hard_config.h file" +#endif + +static struct sdcard_dev _sdcard_device; +static struct spi_dev *const _spi_device = (struct spi_dev*)SEG_IOC_BASE; + +static const int sdcard_reset_retries = 4; +static const int spi_init_clkfreq = 200000 ; /* Hz */ +static const int spi_func_clkfreq = 10000000; /* Hz */ + +int reset_sdc_init() +{ + unsigned char sdcard_rsp; + + reset_puts("Initializing block device\n\r"); + + /** + * Initializing the SPI controller + */ + spi_dev_config ( + _spi_device , + spi_init_clkfreq , + RESET_SYSTEM_CLK * 1000, + 8 , + SPI_TX_NEGEDGE , + SPI_RX_POSEDGE + ); + + /** + * Initializing the SD Card + */ + unsigned int iter = 0; + while(1) + { + reset_puts("Trying to initialize SD card... "); + + sdcard_rsp = sdcard_dev_open(&_sdcard_device, _spi_device, 0); + if (sdcard_rsp == 0) + { + reset_puts("OK\n"); + break; + } + + reset_puts("KO\n"); + reset_sleep(1000); + if (++iter >= sdcard_reset_retries) + { + reset_puts("\nERROR: During SD card reset to IDLE state\n" + "/ card response = "); + reset_putx(sdcard_rsp); + reset_puts("\n"); + reset_exit(); + } + } + + /** + * Set the block length of the SD Card + */ + sdcard_rsp = sdcard_dev_set_blocklen(&_sdcard_device, 512); + if (sdcard_rsp) + { + reset_puts("ERROR: During SD card blocklen initialization\n"); + reset_exit(); + } + + /** + * Incrementing SDCARD clock frequency for normal function + */ + spi_dev_config ( + _spi_device , + spi_func_clkfreq , + RESET_SYSTEM_CLK * 1000, + -1 , + -1 , + -1 + ); + + reset_puts("Finish block device initialization\n\r"); + + return 0; +} /* end reset_spi_init() */ + +int reset_sdc_read( unsigned int lba, void* buffer, unsigned int count ) +{ + unsigned int sdcard_rsp; + unsigned int i; + + sdcard_dev_lseek(&_sdcard_device, lba); + for(i = 0; i < count; i++) + { + unsigned char* buf = (unsigned char *) buffer + (512 * i); + if (( sdcard_rsp = sdcard_dev_read ( &_sdcard_device, buf, 512 ) )) + { + reset_puts("ERROR during read on the SDCARD device. Code: "); + reset_putx(sdcard_rsp); + reset_puts("\n"); + return 1; + } + } + return 0; +} + +/* + * vim: tabstop=4 : softtabstop=4 : shiftwidth=4 : expandtab + */ Index: trunk/softs/tsar_boot/drivers/reset_sdc.h =================================================================== --- trunk/softs/tsar_boot/drivers/reset_sdc.h (revision 758) +++ trunk/softs/tsar_boot/drivers/reset_sdc.h (revision 758) @@ -0,0 +1,25 @@ +/** + * \file reset_sdc.h + * \author Cesar Fuguet + * \date July 23, 2014 + * + * \brief Wrapper for the SD card and SPI drivers + */ +#ifndef RESET_SDC_H +#define RESET_SDC_H + +/** + * \brief this function initializes the SD card device and the SPI controller + */ +int reset_sdc_init(); + +/** + * \brief read a block in the SD card device using the SPI controller + */ +int reset_sdc_read( unsigned int lba, void* buffer, unsigned int count ); + +#endif /* RESET_SDCARD_H */ + +/* + * vim: tabstop=4 : softtabstop=4 : shiftwidth=4 : expandtab + */ Index: trunk/softs/tsar_boot/drivers/reset_tty.c =================================================================== --- trunk/softs/tsar_boot/drivers/reset_tty.c (revision 758) +++ trunk/softs/tsar_boot/drivers/reset_tty.c (revision 758) @@ -0,0 +1,114 @@ +/******************************************************************** + * \file reset_tty.c + * \date 5 mars 2014 + * \author Cesar Fuguet + * + * Minimal driver for TTY controler + *******************************************************************/ + +#include +#include +#include + +#ifndef SEG_TTY_BASE +# error "SEG_TTY_BASE constant must be defined in the hard_config.h file" +#endif + +static int* const tty_address = (int* const)SEG_TTY_BASE; + +enum tty_registers { + TTY_WRITE = 0, + TTY_STATUS = 1, + TTY_READ = 2, + TTY_CONFIG = 3, + + TTY_SPAN = 4, +}; + +/////////////////////// +int reset_getc(char *c) +{ + if (ioread32( &tty_address[TTY_STATUS] ) == 0) return 0; + *c = ioread32( &tty_address[TTY_READ] ); + return 1; +} + +///////////////////////////// +void reset_putc(const char c) +{ + iowrite32( &tty_address[TTY_WRITE], (unsigned int)c ); + if (c == '\n') reset_putc( '\r' ); +} + +/////////////////////////////////// +void reset_puts(const char *buffer) +{ + unsigned int n; + + for ( n=0; n<100; n++) + { + if (buffer[n] == 0) break; + reset_putc(buffer[n]); + } +} + +///////////////////////////////// +void reset_putx(unsigned int val) +{ + static const char HexaTab[] = "0123456789ABCDEF"; + char buf[11]; + unsigned int c; + + buf[0] = '0'; + buf[1] = 'x'; + buf[10] = 0; + + for ( c = 0 ; c < 8 ; c++ ) + { + buf[9-c] = HexaTab[val&0xF]; + val = val >> 4; + } + reset_puts(buf); +} + +///////////////////////////////// +void reset_putd(unsigned int val) +{ + static const char DecTab[] = "0123456789"; + char buf[11]; + unsigned int i; + unsigned int first = 0; + + buf[10] = 0; + + for ( i = 0 ; i < 10 ; i++ ) + { + if ((val != 0) || (i == 0)) + { + buf[9-i] = DecTab[val % 10]; + first = 9-i; + } + else + { + break; + } + val /= 10; + } + reset_puts( &buf[first] ); +} + +///////////////// +void reset_exit() +{ + register int pid; + asm volatile( "mfc0 %0, $15, 1": "=r"(pid) ); + + reset_puts("\n!!! Exit Processor "); + reset_putx(pid); + reset_puts(" !!!\n"); + + while(1) asm volatile("nop"); // infinite loop... +} + + + Index: trunk/softs/tsar_boot/drivers/reset_tty.h =================================================================== --- trunk/softs/tsar_boot/drivers/reset_tty.h (revision 758) +++ trunk/softs/tsar_boot/drivers/reset_tty.h (revision 758) @@ -0,0 +1,11 @@ +#ifndef RESET_TTY_H +#define RESET_TTY_H + +void reset_exit(); +int reset_getc(char * c); +void reset_putc(const char c); +void reset_puts(const char *buffer); +void reset_putx(unsigned int val); +void reset_putd(unsigned int val); + +#endif Index: trunk/softs/tsar_boot/drivers/sdcard.c =================================================================== --- trunk/softs/tsar_boot/drivers/sdcard.c (revision 758) +++ trunk/softs/tsar_boot/drivers/sdcard.c (revision 758) @@ -0,0 +1,366 @@ +/** + * \file : sdcard.c + * \date : 30 August 2012 + * \author : Cesar Fuguet + * + * This file defines the driver of a SD Card device using an SPI controller + */ + +#include +#include + +/** + * \param sdcard: Initialized pointer to the block device + * + * \return void + * + * \brief Enable SD Card select signal + */ +static void _sdcard_enable(struct sdcard_dev * sdcard) +{ + spi_ss_assert(sdcard->spi, sdcard->slave_id); +} + +/** + * \param sdcard: Initialized pointer to the block device + * + * \return void + * + * \brief Disable SD Card select signal + */ +static void _sdcard_disable(struct sdcard_dev * sdcard) +{ + spi_ss_deassert(sdcard->spi, sdcard->slave_id); +} + +/** + * \param tick_count: SD Card clock ticks number + * + * \return void + * + * \brief Enable SD Card clock + * The tick count is byte measured (1 tick, 8 clock) + */ +static void _sdcard_gen_tick(struct sdcard_dev * sdcard, unsigned int tick_count) +{ + register int i = 0; + while(i++ < tick_count) spi_put_tx(sdcard->spi, 0xFF, 0); +} + +/** + * \param sdcard: Initialized pointer to the block device + * + * \return char from the SD card + * + * \brief Get a byte from the SD Card + */ +static unsigned char _sdcard_receive_char(struct sdcard_dev * sdcard) +{ + _sdcard_gen_tick(sdcard, 1); + + return spi_get_rx(sdcard->spi, 0); +} + +/** + * \param sdcard: Initialized pointer to the block device + * + * \return sdcard response + * + * \brief Wait for a valid response after the send of a command + * This function can return if one of the next two conditions are true: + * 1. Bit valid received + * 2. Timeout (not valid bit received after SDCARD_COMMAND_TIMEOUT + * wait ticks) + */ +static unsigned char _sdcard_wait_response(struct sdcard_dev * sdcard) +{ + unsigned char sdcard_rsp; + register int iter; + + iter = 0; + sdcard_rsp = _sdcard_receive_char(sdcard); + while ( + (iter < SDCARD_COMMAND_TIMEOUT) && + !SDCARD_CHECK_R1_VALID(sdcard_rsp) + ) + { + sdcard_rsp = _sdcard_receive_char(sdcard); + iter++; + } + + return sdcard_rsp; +} + +/** + * \params sdcard: Initialized pointer to the block device + * + * \return void + * + * \brief Wait data block start marker + */ +static void _sdcard_wait_data_block(struct sdcard_dev * sdcard) +{ + while (_sdcard_receive_char(sdcard) != 0xFE); +} + +/** + * \param sdcard : Initialized pointer to block device + * \param index : SD card CMD index + * \param app : Type of command, 0 for normal command or 1 for application + * specific + * \param args : SD card CMD arguments + * + * \return response first byte + * + * \brief Send command to the SD card + */ +static int _sdcard_send_command ( + struct sdcard_dev * sdcard , + int index , + int app , + void * args , + unsigned crc7 ) +{ + unsigned char sdcard_rsp; + unsigned char * _args; + + _sdcard_gen_tick(sdcard, 5); + + if (app == SDCARD_ACMD) + { + spi_put_tx(sdcard->spi, 0x40 | 55 , 0 );/* CMD and START bit */ + spi_put_tx(sdcard->spi, 0x00 , 0 );/* Argument[0] */ + spi_put_tx(sdcard->spi, 0x00 , 0 );/* Argument[1] */ + spi_put_tx(sdcard->spi, 0x00 , 0 );/* Argument[2] */ + spi_put_tx(sdcard->spi, 0x00 , 0 );/* Argument[3] */ + spi_put_tx(sdcard->spi, 0x01 | (crc7 << 1), 0 );/* END bit */ + + sdcard_rsp = _sdcard_wait_response(sdcard); + if (SDCARD_CHECK_R1_ERROR(sdcard_rsp)) + { + return sdcard_rsp; + } + } + + _args = (unsigned char *) args; + + _sdcard_gen_tick(sdcard, 1); + + spi_put_tx(sdcard->spi, 0x40 | index , 0 ); + spi_put_tx(sdcard->spi, _args[0] , 0 ); + spi_put_tx(sdcard->spi, _args[1] , 0 ); + spi_put_tx(sdcard->spi, _args[2] , 0 ); + spi_put_tx(sdcard->spi, _args[3] , 0 ); + spi_put_tx(sdcard->spi, 0x01 | (crc7 << 1), 0 ); + + return _sdcard_wait_response(sdcard); +} + +int sdcard_dev_open(struct sdcard_dev * sdcard, struct spi_dev * spi, int ss) +{ + unsigned char args[4]; + unsigned char sdcard_rsp; + unsigned int iter, ersp; + + sdcard->spi = spi; + sdcard->slave_id = ss; + + /* + * Supply SD card ramp up time (min 74 cycles) + */ + _sdcard_gen_tick(sdcard, 10); + + /* + * Assert slave select signal + * Send CMD0 (Reset Command) + * Deassert slave select signal + */ + _sdcard_enable(sdcard); + + args[0] = 0; + args[1] = 0; + args[2] = 0; + args[3] = 0; + sdcard_rsp = _sdcard_send_command(sdcard, 0, SDCARD_CMD, args, 0x4A); + if ( sdcard_rsp != 0x01 ) + { + reset_puts("card CMD0 failed "); + return sdcard_rsp; + } + + _sdcard_disable(sdcard); + /* + * send CMD8. If card is pre-v2, It will reply with illegal command. + * Otherwise we announce sdhc support. + */ + _sdcard_enable(sdcard); + args[0] = 0; + args[1] = 0; + args[2] = 0x01; + args[3] = 0x01; + sdcard_rsp = _sdcard_send_command(sdcard, 8, SDCARD_CMD, args, 0x63); + if (!SDCARD_CHECK_R1_VALID(sdcard_rsp)) { + reset_puts("card CMD8 failed "); + return sdcard_rsp; + } + if (!SDCARD_CHECK_R1_ERROR(sdcard_rsp)) { + /* no error, command accepted. get whole reply */ + ersp = _sdcard_receive_char(sdcard); + ersp = (ersp << 8) | _sdcard_receive_char(sdcard); + ersp = (ersp << 8) | _sdcard_receive_char(sdcard); + ersp = (ersp << 8) | _sdcard_receive_char(sdcard); + if ((ersp & 0xffff) != 0x0101) { + /* voltage mismatch */ + reset_puts("card CMD8 mismatch: "); + reset_putx(ersp); + return sdcard_rsp; + } + reset_puts("v2 or later "); + sdcard->sdhc = 1; + } else if ((sdcard_rsp & SDCARD_R1_ILLEGAL_CMD) == 0) { + /* other error */ + reset_puts("card CMD8 error "); + return sdcard_rsp; + } else { + sdcard->sdhc = 0; + } + _sdcard_disable(sdcard); + /* send CMD41, enabling the card */ + _sdcard_enable(sdcard); + args[0] = sdcard->sdhc ? 0x40: 0; + args[1] = 0; + args[2] = 0; + args[3] = 0; + + iter = 0; + while( iter++ < SDCARD_COMMAND_TIMEOUT ) + { + sdcard_rsp = _sdcard_send_command(sdcard, 41, SDCARD_ACMD, args, 0x00); + if( sdcard_rsp == 0x01 ) + { + continue; + } + + break; + } + + _sdcard_disable(sdcard); + if (sdcard_rsp) { + reset_puts("SD ACMD41 failed "); + return sdcard_rsp; + } + if (sdcard->sdhc != 0) { + /* get the card capacity to see if it's really HC */ + _sdcard_enable(sdcard); + args[0] = sdcard->sdhc ? 0x40: 0; + args[1] = 0; + args[2] = 0; + args[3] = 0; + sdcard_rsp = _sdcard_send_command(sdcard, 58, SDCARD_CMD, + args, 0x00); + if (sdcard_rsp) { + reset_puts("SD CMD58 failed "); + return sdcard_rsp; + } + ersp = _sdcard_receive_char(sdcard); + ersp = (ersp << 8) | _sdcard_receive_char(sdcard); + ersp = (ersp << 8) | _sdcard_receive_char(sdcard); + ersp = (ersp << 8) | _sdcard_receive_char(sdcard); + if (ersp & 0x40000000) { + reset_puts("SDHC "); + } else { + sdcard->sdhc = 0; + } + _sdcard_disable(sdcard); + } + reset_puts("card detected "); + return 0; +} + +int sdcard_dev_read(struct sdcard_dev * sdcard, void * buf, unsigned int count) +{ + unsigned char args[4]; + unsigned char sdcard_rsp; + register int i; + + for (i = 0; i < 4; i++) + { + args[i] = (sdcard->access_pointer >> (32 - (i+1)*8)) & 0xFF; + } + + _sdcard_enable(sdcard); + + sdcard_rsp = _sdcard_send_command(sdcard, 17, SDCARD_CMD, args, 0x00); + if ( SDCARD_CHECK_R1_ERROR(sdcard_rsp) ) + { + _sdcard_disable(sdcard); + return sdcard_rsp; + } + + _sdcard_wait_data_block(sdcard); + + spi_get_data(sdcard->spi, buf, count); + + /* + * Get the remainder of the block bytes and the CRC16 (comes + * at the end of the data block) + */ + i = count; + while( i++ < (512 + 2) ) _sdcard_receive_char(sdcard); + + _sdcard_disable(sdcard); + + /* + * Move the access pointer to the next block + */ + sdcard->access_pointer += sdcard->block_length; + + return 0; +} + +unsigned int sdcard_dev_write(struct sdcard_dev *sdcard, void * buf, unsigned int count) +{ + return 0; +} + +void sdcard_dev_lseek(struct sdcard_dev * sdcard, unsigned int blk_pos) +{ + sdcard->access_pointer = sdcard->block_length * blk_pos; +} + +int sdcard_dev_set_blocklen(struct sdcard_dev * sdcard, unsigned int len) +{ + unsigned char args[4]; + unsigned char sdcard_rsp; + register int i; + + if (len != 512) + return 1; + + if (sdcard->sdhc) { + sdcard->block_length = 1; + return 0; + } + + for (i = 0; i < 4; i++) + args[i] = (len >> (32 - (i+1)*8)) & 0xFF; + + _sdcard_enable(sdcard); + + sdcard_rsp = _sdcard_send_command(sdcard, 16, SDCARD_CMD, args, 0x00); + if ( SDCARD_CHECK_R1_ERROR(sdcard_rsp) ) + { + _sdcard_disable(sdcard); + return sdcard_rsp; + } + + _sdcard_disable(sdcard); + + sdcard->block_length = len; + + return 0; +} + +/* + * vim: tabstop=4 : shiftwidth=4 : expandtab : softtabstop=4 + */ Index: trunk/softs/tsar_boot/drivers/sdcard.h =================================================================== --- trunk/softs/tsar_boot/drivers/sdcard.h (revision 758) +++ trunk/softs/tsar_boot/drivers/sdcard.h (revision 758) @@ -0,0 +1,172 @@ +/** + * \file sdcard.h + * \date 30 August 2012 + * \author Cesar fuguet + * + * This file defines the driver of a SD Card device using an SPI controller + */ + +#ifndef SDCARD_H +#define SDCARD_H + +#include + +/** + * \brief SD Card type definition + */ +struct sdcard_dev +{ + /** + * SPI controller pointer + */ + struct spi_dev * spi; + + /** + * Block length of the SDCARD + */ + unsigned int block_length; + + /** + * Access pointer representing the offset in bytes used + * to read or write in the SDCARD. + * + * \note this driver is for cards SDSD, therefore this offset + * must be multiple of the block length + */ + unsigned int access_pointer; + + /** + * Slave ID. This ID represents the number of the slave select signal + * used in the hardware platform + */ + int slave_id; + + /* is the card high capacity ? */ + int sdhc; +}; + +/** + * \param sdcard : uninitialized pointer. This parameter will contain + * a pointer to the initialized block device or NULL otherwise + * \param spi : initialized pointer to the spi controller + * \param ss : slave select signal number + * + * \return 0 when initialization succeeds or an error code value otherwise. + * The error codes are defined in this header file. + * + * \brief Initialize the block device + */ +int sdcard_dev_open(struct sdcard_dev * sdcard, struct spi_dev * spi, int ss); + +/** + * \param sdcard : Pointer to the initialized block device + * \param buf : Pointer to a memory segment wherein store + * \param count : number of bytes to read + * + * \return 0 when read succeeds or an error code value otherwise. + * The error codes are defined in this header file. + * + * \brief Read in the block device + * + * The read is made in the current block device access pointer. + * In the read succeeds, the block device access pointer is + * relocated to the next block. + */ +int sdcard_dev_read(struct sdcard_dev * sdcard, void * buf, unsigned int count); + +/** + * \param sdcard : Pointer to the initialized block device + * \param buf : Pointer to a memory segment wherein the + * \param count : number of blocks to write + * + * \return 0 when write succeeds or an error code value otherwise. + * The error codes are defined in this header file. + * + * \brief Write in the block device + * + * The write is made in the current block device access pointer. + * In the write succeeds, the block device access pointer is + * relocated to the next block. + */ +unsigned int sdcard_dev_write(struct sdcard_dev * sdcard, void * buf, unsigned int count); + +/** + * \param sdcard : Pointer to the initialized block device + * \param pos : Position where the block device access + * pointer must be move + * + * \return void + * + * \brief Change block device access pointer position + * + * The block device access pointer is relocated in terms of blocks + */ +void sdcard_dev_lseek(struct sdcard_dev * sdcard, unsigned int pos); + +/** + * \param sdcard : Pointer to the initialized block device + * \param len : Block device length to set + * + * \return 0 when succeed or error code value otherwise + * + * \brief Set the block length of the device + */ +int sdcard_dev_set_blocklen(struct sdcard_dev * sdcard, unsigned int len); + +/** + * SD Card constants + */ + +/** Number of retries after an unacknowledge command */ +#define SDCARD_COMMAND_TIMEOUT 100 + +/** This command is a simple SD commmand */ +#define SDCARD_CMD 0 + +/** This is an application specific command */ +#define SDCARD_ACMD 1 + +/** The transmition is done in the negative edge of the clock */ +#define SDCARD_TX_NEGEDGE 0 + +/** The transmition is done in the positive edge of the clock */ +#define SDCARD_TX_POSEDGE 1 + +/** The reception is done in the negative edge of the clock */ +#define SDCARD_RX_NEGEDGE 0 + +/** The reception is done in the positive edge of the clock */ +#define SDCARD_RX_POSEDGE 1 + +/** + * SD Card macros + */ + +/** Check if the response is valid */ +#define SDCARD_CHECK_R1_VALID(x) (~x & SDCARD_R1_RSP_VALID) ? 1 : 0 + +/** + * Check if there is an error in the response + * + * \note this macro must be used after verify that the response is + * valid + */ +#define SDCARD_CHECK_R1_ERROR(x) ( x & 0x7E) ? 1 : 0 + +/** + * SD Card Response 1 (R1) format constants + */ +#define SDCARD_R1_IN_IDLE_STATE ( 1 << 0 ) /**< \brief R1 bit 0 */ +#define SDCARD_R1_ERASE_RESET ( 1 << 1 ) /**< \brief R1 bit 1 */ +#define SDCARD_R1_ILLEGAL_CMD ( 1 << 2 ) /**< \brief R1 bit 2 */ +#define SDCARD_R1_COM_CRC_ERR ( 1 << 3 ) /**< \brief R1 bit 3 */ +#define SDCARD_R1_ERASE_SEQ_ERR ( 1 << 4 ) /**< \brief R1 bit 4 */ +#define SDCARD_R1_ADDRESS_ERR ( 1 << 5 ) /**< \brief R1 bit 5 */ +#define SDCARD_R1_PARAMETER_ERR ( 1 << 6 ) /**< \brief R1 bit 6 */ +#define SDCARD_R1_RSP_VALID ( 1 << 7 ) /**< \brief R1 bit 7 */ + +#endif + +/* + * vim: tabstop=4 : shiftwidth=4 : expandtab : softtabstop=4 + */ Index: trunk/softs/tsar_boot/drivers/spi.c =================================================================== --- trunk/softs/tsar_boot/drivers/spi.c (revision 758) +++ trunk/softs/tsar_boot/drivers/spi.c (revision 758) @@ -0,0 +1,192 @@ +/** + * \file spi.c + * \date 31 August 2012 + * \author Cesar Fuguet + */ +#include +#include +#include + +/** + * \param x: input value + * + * \return byte-swapped value + * + * \brief byte-swap a 32bit word + */ +static unsigned int bswap32(unsigned int x) +{ + unsigned int y; + y = (x & 0x000000ff) << 24; + y |= (x & 0x0000ff00) << 8; + y |= (x & 0x00ff0000) >> 8; + y |= (x & 0xff000000) >> 24; + return y; +} + +/** + * \param spi : Initialized pointer to the SPI controller + * + * \brief Wait until the SPI controller has finished a transfer + * + * Wait until the GO_BUSY bit of the SPI controller be deasserted + */ +static void _spi_wait_if_busy(struct spi_dev * spi) +{ + register int delay; + + while(SPI_IS_BUSY(spi)) + { + for (delay = 0; delay < 100; delay++); + } +} + +/** + * \param spi : Initialized pointer to the SPI controller + * + * \return void + * + * \brief Init transfer of the tx registers to the selected slaves + */ +static void _spi_init_transfer(struct spi_dev * spi) +{ + unsigned int spi_ctrl = ioread32(&spi->ctrl); + + iowrite32(&spi->ctrl, spi_ctrl | SPI_CTRL_GO_BSY); +} + +/** + * \param spi_freq : Desired frequency for the generated clock from the SPI + * controller + * \param sys_freq : System clock frequency + * + * \brief Calculated the value for the divider register in order to obtain the SPI + * desired clock frequency + */ +static unsigned int _spi_calc_divider_value ( + unsigned int spi_freq , + unsigned int sys_freq ) +{ + return ((sys_freq / (spi_freq * 2)) - 1); +} + +void spi_put_tx(struct spi_dev * spi, unsigned char byte, int index) +{ + _spi_wait_if_busy(spi); + { + iowrite8(&spi->rx_tx[index % 4], byte); + _spi_init_transfer(spi); + } + _spi_wait_if_busy(spi); +} + +volatile unsigned char spi_get_rx(struct spi_dev * spi, int index) +{ + return ioread8(&spi->rx_tx[index % 4]); +} + +void spi_get_data(struct spi_dev * spi, void *buf, unsigned int count) +{ + unsigned int *data = buf; + unsigned char *data8; + unsigned int spi_ctrl0, spi_ctrl; + int i; + + _spi_wait_if_busy(spi); + + spi_ctrl0 = ioread32(&spi->ctrl); +#ifdef IOC_USE_DMA + if (count == 512 && ((int)buf & 0x3f) == 0) { + /* use DMA */ + spi->dma_base = (int)buf; + spi->dma_baseh = 0; + spi->dma_count = count | SPI_DMA_COUNT_READ; + _spi_wait_if_busy(spi); + i = count / 4; + } else +#endif /* IOC_USE_DMA */ + { + /* switch to 128 bits words */ + spi_ctrl = (spi_ctrl0 & ~SPI_CTRL_CHAR_LEN_MASK) | 128; + iowrite32(&spi->ctrl, spi_ctrl); + + /* read data */ + for (i = 0; i + 3 < count / 4; i += 4) { + iowrite32(&spi->rx_tx[0], 0xffffffff); + iowrite32(&spi->rx_tx[1], 0xffffffff); + iowrite32(&spi->rx_tx[2], 0xffffffff); + iowrite32(&spi->rx_tx[3], 0xffffffff); + iowrite32(&spi->ctrl, spi_ctrl | SPI_CTRL_GO_BSY); + + _spi_wait_if_busy(spi); + + *data = bswap32(ioread32(&spi->rx_tx[3])); + data++; + *data = bswap32(ioread32(&spi->rx_tx[2])); + data++; + *data = bswap32(ioread32(&spi->rx_tx[1])); + data++; + *data = bswap32(ioread32(&spi->rx_tx[0])); + data++; + } + } + + /* switch back to original word size */ + iowrite32(&spi->ctrl, spi_ctrl0); + + /* read missing bits */ + data8 = (void *)data; + i = i * 4; + for (; i < count; i++) + { + iowrite32(&spi->rx_tx[0], 0xffffffff); + iowrite32(&spi->ctrl, spi_ctrl0 | SPI_CTRL_GO_BSY); + + _spi_wait_if_busy(spi); + + *data8 = spi_get_rx(spi, 0); + data8++; + } + return; +} + +void spi_ss_assert(struct spi_dev * spi, int index) +{ + unsigned int spi_ss = ioread32(&spi->ss); + + iowrite32(&spi->ss, spi_ss | (1 << index)); +} + +void spi_ss_deassert(struct spi_dev * spi, int index) +{ + unsigned int spi_ss = ioread32(&spi->ss); + + iowrite32(&spi->ss, spi_ss & ~(1 << index)); +} + +void spi_dev_config ( + struct spi_dev * spi, + int spi_freq , + int sys_freq , + int char_len , + int tx_edge , + int rx_edge ) +{ + unsigned int spi_ctrl = ioread32(&spi->ctrl); + + if ( tx_edge == 0 ) spi_ctrl |= SPI_CTRL_TXN_EN; + else if ( tx_edge == 1 ) spi_ctrl &= ~SPI_CTRL_TXN_EN; + if ( rx_edge == 0 ) spi_ctrl |= SPI_CTRL_RXN_EN; + else if ( rx_edge == 1 ) spi_ctrl &= ~SPI_CTRL_RXN_EN; + if ( char_len > 0 ) spi_ctrl = (spi_ctrl & ~SPI_CTRL_CHAR_LEN_MASK) | + (char_len & SPI_CTRL_CHAR_LEN_MASK); + + iowrite32(&spi->ctrl, spi_ctrl); + + if (spi_freq > 0 && sys_freq > 0) + iowrite32(&spi->divider, _spi_calc_divider_value(spi_freq, sys_freq)); +} + +/* + * vim: tabstop=4 : shiftwidth=4 : expandtab : softtabstop=4 + */ Index: trunk/softs/tsar_boot/drivers/spi.h =================================================================== --- trunk/softs/tsar_boot/drivers/spi.h (revision 758) +++ trunk/softs/tsar_boot/drivers/spi.h (revision 758) @@ -0,0 +1,154 @@ +/** + * \file : spi.h + * \date : 30 August 2012 + * \author: Cesar Fuguet + * + * This file contains the definition of a driver for the SPI controller + */ + +#ifndef SPI_H +#define SPI_H + +#include + +/** + * SPI type definition + */ +struct spi_dev +{ + /** + * RX/TX registers of the SPI controller + */ + unsigned int rx_tx[4]; + + /** + * Control register of the SPI controller + */ + unsigned int ctrl; + + /** + * Divider register for the SPI controller generated clock signal + */ + unsigned int divider; + + /** + * Slave select register of the SPI controller + */ + unsigned int ss; + unsigned int dma_base; + unsigned int dma_baseh; + unsigned int dma_count; +}; + +/** + * \param spi : initialized pointer to a SPI controller. + * \param byte : Byte to send to the SPI controller + * \param index : index of the TX register in the SPI (TX[index]) + * + * \return void + * + * \brief Send a byte to one of the tx buffer registers of the + * SPI controller + */ +void spi_put_tx(struct spi_dev * spi, unsigned char byte, int index); + +/** + * \param spi : initialized pointer to a SPI controller. + * \param index : index of the RX register in the SPI (RX[index]) + * + * \return byte from the RX[index] register + * + * \brief Get a byte from one of the rx buffer registers of the + * SPI controller + */ +inline volatile unsigned char spi_get_rx(struct spi_dev * spi, int index); + +/** + * \param spi : initialized pointer to a SPI controller. + * \param buf : buffer to store data read + * \param count : byte count to read + * + * \return void + * + * \brief get a data block from the SPI controller using 128bits + * reads if possible + */ +void spi_get_data(struct spi_dev * spi, void *buf, unsigned int count); + +/** + * \param spi : initialized pointer to a SPI controller. + * \param index : index of the slave select signal to assert + * + * \return void + * + * \brief Set the index selected slave select signal (ss[index] <= '0') + */ +inline void spi_ss_assert(struct spi_dev * spi, int index); + +/** + * \param spi : initialized pointer to a SPI controller. + * \param index : index of the slave select signal to deassert + * + * \return void + * + * \brief Unset the index selected slave select signal (ss[index] <= '0') + */ +inline void spi_ss_deassert(struct spi_dev * spi, int index); + +/** + * \param spi : initialized pointer to a SPI controller. + * \param spi_freq : SPI Master to Slave clock frequency (in Hz) + * \param sys_freq : System clock frequency (in Hz) + * \param char_len : number to bits to transmit in one transfer + * \param tx_edge : when 0, the Master Out Slave In signal is changed + * on the falling edge of the clock + * \param rx_edge : when 0, the Master In Slave Out signal is latched + * on the falling edge of the clock + * + * \return void + * + * \brief Configure the SPI controller + * \note Any of the arguments can be less than 0 if you want to keep the old value + */ +void spi_dev_config ( + struct spi_dev * spi, + int spi_freq , + int sys_freq , + int char_len , + int tx_edge , + int rx_edge ); + +/** + * SPI macros and constants + */ +#define SPI_TX_POSEDGE 1 /**< MOSI is changed on neg edge */ +#define SPI_TX_NEGEDGE 0 /**< MOSI is changed on pos edge */ +#define SPI_RX_POSEDGE 1 /**< MISO is latched on pos edge */ +#define SPI_RX_NEGEDGE 0 /**< MISO is latched on neg edge */ + +#define SPI_CTRL_ASS_EN ( 1 << 13 ) /**< Auto Slave Sel Assertion */ +#define SPI_CTRL_IE_EN ( 1 << 12 ) /**< Interrupt Enable */ +#define SPI_CTRL_LSB_EN ( 1 << 11 ) /**< LSB are sent first */ +#define SPI_CTRL_TXN_EN ( 1 << 10 ) /**< MOSI is changed on neg edge */ +#define SPI_CTRL_RXN_EN ( 1 << 9 ) /**< MISO is latched on neg edge */ +#define SPI_CTRL_GO_BSY ( 1 << 8 ) /**< Start the transfer */ +#define SPI_CTRL_DMA_BSY (1 << 16) /*** DMA in progress */ +#define SPI_CTRL_CHAR_LEN_MASK ( 0xFF ) /**< Bits transmited in 1 transfer */ +#define SPI_RXTX_MASK ( 0xFF ) /**< Mask for the an RX/TX value */ + +#define SPI_DMA_COUNT_READ (1 << 0) /* operation is a read (else write) */ + +/** + * \param x : Initialized pointer to the SPI controller + * + * \return 1 if there is an unfinished transfer in the SPI controller + * + * \brief Check the GO_BUSY bit of the SPI Controller + */ +#define SPI_IS_BUSY(x) ((ioread32(&x->ctrl) & (SPI_CTRL_GO_BSY|SPI_CTRL_DMA_BSY)) != 0) ? 1 : 0 + +#endif + +/* + * vim: tabstop=4 : shiftwidth=4 : expandtab : softtabstop=4 + */ Index: trunk/softs/tsar_boot/include/block_device.h =================================================================== --- trunk/softs/tsar_boot/include/block_device.h (revision 755) +++ (revision ) @@ -1,67 +1,0 @@ -/* - * SOCLIB_LGPL_HEADER_BEGIN - * - * This file is part of SoCLib, GNU LGPLv2.1. - * - * SoCLib is free software; you can redistribute it and/or modify it - * under the terms of the GNU Lesser General Public License as published - * by the Free Software Foundation; version 2.1 of the License. - * - * SoCLib is distributed in the hope that it will be useful, but - * WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU - * Lesser General Public License for more details. - * - * You should have received a copy of the GNU Lesser General Public - * License along with SoCLib; if not, write to the Free Software - * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA - * 02110-1301 USA - * - * SOCLIB_LGPL_HEADER_END - * - * Copyright (c) UPMC, Lip6, Asim - * Nicolas Pouillon , 2007 - * - * Maintainers: nipo - */ -#ifndef BLOCK_DEVICE_REGS_H -#define BLOCK_DEVICE_REGS_H - -enum SoclibBlockDeviceRegisters { - BLOCK_DEVICE_BUFFER, - BLOCK_DEVICE_LBA, - BLOCK_DEVICE_COUNT, - BLOCK_DEVICE_OP, - BLOCK_DEVICE_STATUS, - BLOCK_DEVICE_IRQ_ENABLE, - BLOCK_DEVICE_SIZE, - BLOCK_DEVICE_BLOCK_SIZE, -}; - -enum SoclibBlockDeviceOp { - BLOCK_DEVICE_NOOP, - BLOCK_DEVICE_READ, - BLOCK_DEVICE_WRITE, -}; - -enum SoclibBlockDeviceStatus { - BLOCK_DEVICE_IDLE, - BLOCK_DEVICE_BUSY, - BLOCK_DEVICE_READ_SUCCESS, - BLOCK_DEVICE_WRITE_SUCCESS, - BLOCK_DEVICE_READ_ERROR, - BLOCK_DEVICE_WRITE_ERROR, - BLOCK_DEVICE_ERROR, -}; - -#endif /* BLOCK_DEVICE_REGS_H */ - -// Local Variables: -// tab-width: 4 -// c-basic-offset: 4 -// c-file-offsets:((innamespace . 0)(inline-open . 0)) -// indent-tabs-mode: nil -// End: - -// vim: filetype=cpp:expandtab:shiftwidth=4:tabstop=4:softtabstop=4 - Index: trunk/softs/tsar_boot/include/defs.h =================================================================== --- trunk/softs/tsar_boot/include/defs.h (revision 755) +++ trunk/softs/tsar_boot/include/defs.h (revision 758) @@ -1,16 +1,71 @@ -#include +#include -#define RESET_VERSION 0x00010002 -#define RESET_STACK_SIZE 0x2000 +#define RESET_VERSION 0x00010003 +#define RESET_STACK_SIZE 0x2000 +#define RESET_LOADER_LBA 2 +#define RESET_PHDR_ARRAY_SIZE 16 -#define BOOT_LOADER_LBA 2 -#define PHDR_ARRAY_SIZE 16 - -#define BLOCK_SIZE 512 - -#ifndef CLUSTER_IO -# define CLUSTER_IO 0 +#ifndef RESET_DEBUG +# define RESET_DEBUG 0 #endif -// vim: tabstop=4 : softtabstop=4 : shiftwidth=4 : expandtab +#ifndef RESET_HARD_CC +# define RESET_HARD_CC 0 +#endif +/** + * Default clock frequency (by default is 25 MHz for FPGA dev card DE2-115) + */ +#ifndef RESET_SYSTEM_CLK +# define RESET_SYSTEM_CLK 25000 /* KHz */ +#endif + +/* + * TSAR platform independent hardware parameters + */ + +#define BLOCK_SIZE 512 /* bytes */ +#define CACHE_LINE_SIZE 64 /* bytes */ + +/* + * Verify that all used constants have been defined in the hard_config.h file + */ + +#ifndef NB_PROCS_MAX +# error "NB_PROCS_MAX constant must be defined in hard_config.h" +#endif + +#ifndef IRQ_PER_PROCESSOR +# error "IRQ_PER_PROCESSOR constant must be defined in hard_config.h file" +#endif + +#ifndef SEG_XCU_BASE +# error "SEG_XCU_BASE constant must be defined in the hard_config.h file" +#endif + +#ifndef SEG_ROM_BASE +# error "SEG_ROM_BASE constant must be defined in the hard_config.h file" +#endif + +/* + * IO cluster constants + */ + +#ifndef USE_IOB +# error "USE_IOB constant must be defined in the hard_config.h file" +#endif + +#if !defined(X_IO) || !defined(Y_IO) +# error "X_IO and Y_IO constants must be defined in the hard_config.h file" +#endif + +#if !defined(X_WIDTH) || !defined(Y_WIDTH) +# error "X_WIDTH and Y_WIDTH constants must be defined in the hard_config.h " + "file" +#endif + +#define CLUSTER_IO ((X_IO << Y_WIDTH) | Y_IO) + +/* + * vim: tabstop=4 : softtabstop=4 : shiftwidth=4 : expandtab + */ Index: trunk/softs/tsar_boot/include/inttypes.h =================================================================== --- trunk/softs/tsar_boot/include/inttypes.h (revision 758) +++ trunk/softs/tsar_boot/include/inttypes.h (revision 758) @@ -0,0 +1,13 @@ +/** + * \file inttypes.h + * \date July 24, 2014 + * \author Cesar Fuguet + * \brief Integer types definitions + */ +#ifndef INTTYPES_H +#define INTTYPES_H + +typedef unsigned int size_t; +typedef unsigned int addr_t; + +#endif Index: trunk/softs/tsar_boot/include/mcc.h =================================================================== --- trunk/softs/tsar_boot/include/mcc.h (revision 755) +++ (revision ) @@ -1,30 +1,0 @@ -#ifndef MCC_H -#define MCC_H - -enum MccRegisters -{ - MCC_LOCK = 0, - MCC_ADDR_LO = 1, - MCC_ADDR_HI = 2, - MCC_LENGTH = 3, - MCC_CMD = 4 -}; - -enum MccConfigCmd -{ - MCC_CMD_NOP = 0, - MCC_CMD_INVAL = 1, - MCC_CMD_SYNC = 2 -}; - -#endif - -// Local Variables: -// tab-width: 4; -// c-basic-offset: 4; -// c-file-offsets:((innamespace . 0)(inline-open . 0)); -// indent-tabs-mode: nil; -// End: -// -// vim: filetype=cpp:expandtab:shiftwidth=4:tabstop=4:softtabstop=4 - Index: trunk/softs/tsar_boot/include/reset_ioc.h =================================================================== --- trunk/softs/tsar_boot/include/reset_ioc.h (revision 755) +++ trunk/softs/tsar_boot/include/reset_ioc.h (revision 758) @@ -1,31 +1,22 @@ +/** + * \file reset_ioc.h + * \date December 14, 2013 + * \author Cesar Fuguet + * + * \brief API for accessing the disk controller + * + * \note These functions call the specific disk controller driver depending + * on the USE_IOC_BDV, USE_IOC_SPI or USE_RAMDISK constants + */ #ifndef RESET_IOC_H #define RESET_IOC_H -#if USE_SPI -#include -#include -#endif /* USE_SPI */ +int reset_ioc_init(); -#if USE_BDV -#include -#include -#endif /* USE_BDV */ - -#include -#include -#include -#include - -#if USE_SPI -extern int reset_ioc_init(); -#endif /* USE_SPI */ - -extern int reset_ioc_read( unsigned int lba, - void* buffer, - unsigned int count ); +int reset_ioc_read( unsigned int lba, void* buffer, unsigned int count ); #endif /* RESET_IOC_H */ /* - * vim: tabstop=4 : shiftwidth=4 : expandtab + * vim: tabstop=4 : softtabstop=4 : shiftwidth=4 : expandtab */ Index: trunk/softs/tsar_boot/include/reset_tty.h =================================================================== --- trunk/softs/tsar_boot/include/reset_tty.h (revision 755) +++ (revision ) @@ -1,13 +1,0 @@ -#ifndef RESET_TTY_H -#define RESET_TTY_H - -# include - -void reset_exit(); -int reset_getc(char * c); -void reset_putc(const char c); -void reset_puts(const char *buffer); -void reset_putx(unsigned int val); -void reset_putd(unsigned int val); - -#endif Index: trunk/softs/tsar_boot/include/reset_utils.h =================================================================== --- trunk/softs/tsar_boot/include/reset_utils.h (revision 755) +++ trunk/softs/tsar_boot/include/reset_utils.h (revision 758) @@ -5,19 +5,10 @@ */ -#ifndef BOOT_UTILS_H -#define BOOT_UTILS_H +#ifndef RESET_UTILS_H +#define RESET_UTILS_H #include -#include -#include +#include #include -#include -#include - -/******************************************************************** - * Integer types definition - ********************************************************************/ -typedef unsigned int size_t; -typedef unsigned int addr_t; /******************************************************************** @@ -26,5 +17,5 @@ /* - * cache line aligned disk block (sector) buffer + * cache line aligned disk block (sector) buffer */ struct aligned_blk @@ -37,22 +28,32 @@ ********************************************************************/ -extern unsigned int proctime(); +/** + * \brief processor waits for n cycles + */ +static inline void reset_sleep(int cycles) +{ + volatile int i; + for (i = 0; i < cycles; i++); +} -extern int pread(size_t file_offset, void *buf, size_t nbyte, size_t offset); +/** + * \brief returns processor count + */ +static inline unsigned int proctime() +{ + register unsigned int ret asm ("v0"); + asm volatile ("mfc0 %0, $9":"=r" (ret)); + return ret; +} -extern void* memcpy(void *_dst, const void *_src, size_t n); -extern void* memset(void *_dst, int c, size_t len); +int pread(size_t file_offset, void *buf, size_t nbyte, size_t offset); -extern void check_elf_header(Elf32_Ehdr *ehdr); -extern void reset_print_elf_phdr(Elf32_Phdr * elf_phdr_ptr); +void* memcpy(void *_dst, const void *_src, size_t n); +void* memset(void *_dst, int c, size_t len); -#if USE_IOB -void reset_mcc_invalidate (const void * buf, size_t size); -#endif /* USE_IOB */ +void check_elf_header(Elf32_Ehdr *ehdr); +void reset_print_elf_phdr(Elf32_Phdr * elf_phdr_ptr); -#if (CACHE_COHERENCE == 0) || USE_IOB -void reset_buf_invalidate (const void * buf, size_t line_size, size_t size); -#endif /* (CACHE_COHERENCE == 0) || USE_IOB */ -#endif /* BOOT_UTILS_H */ +#endif /* RESET_UTILS_H */ // vim: tabstop=4 : softtabstop=4 : shiftwidth=4 : expandtab Index: trunk/softs/tsar_boot/include/sdcard.h =================================================================== --- trunk/softs/tsar_boot/include/sdcard.h (revision 755) +++ (revision ) @@ -1,172 +1,0 @@ -/** - * \file sdcard.h - * \date 30 August 2012 - * \author Cesar fuguet - * - * This file defines the driver of a SD Card device using an SPI controller - */ - -#ifndef SDCARD_H -#define SDCARD_H - -#include - -/** - * \brief SD Card type definition - */ -struct sdcard_dev -{ - /** - * SPI controller pointer - */ - struct spi_dev * spi; - - /** - * Block length of the SDCARD - */ - unsigned int block_length; - - /** - * Access pointer representing the offset in bytes used - * to read or write in the SDCARD. - * - * \note this driver is for cards SDSD, therefore this offset - * must be multiple of the block length - */ - unsigned int access_pointer; - - /** - * Slave ID. This ID represents the number of the slave select signal - * used in the hardware platform - */ - int slave_id; - - /* is the card high capacity ? */ - int sdhc; -}; - -/** - * \param sdcard : uninitialized pointer. This parameter will contain - * a pointer to the initialized block device or NULL otherwise - * \param spi : initialized pointer to the spi controller - * \param ss : slave select signal number - * - * \return 0 when initialization succeeds or an error code value otherwise. - * The error codes are defined in this header file. - * - * \brief Initialize the block device - */ -int sdcard_dev_open(struct sdcard_dev * sdcard, struct spi_dev * spi, int ss); - -/** - * \param sdcard : Pointer to the initialized block device - * \param buf : Pointer to a memory segment wherein store - * \param count : number of bytes to read - * - * \return 0 when read succeeds or an error code value otherwise. - * The error codes are defined in this header file. - * - * \brief Read in the block device - * - * The read is made in the current block device access pointer. - * In the read succeeds, the block device access pointer is - * relocated to the next block. - */ -int sdcard_dev_read(struct sdcard_dev * sdcard, void * buf, unsigned int count); - -/** - * \param sdcard : Pointer to the initialized block device - * \param buf : Pointer to a memory segment wherein the - * \param count : number of blocks to write - * - * \return 0 when write succeeds or an error code value otherwise. - * The error codes are defined in this header file. - * - * \brief Write in the block device - * - * The write is made in the current block device access pointer. - * In the write succeeds, the block device access pointer is - * relocated to the next block. - */ -unsigned int sdcard_dev_write(struct sdcard_dev * sdcard, void * buf, unsigned int count); - -/** - * \param sdcard : Pointer to the initialized block device - * \param pos : Position where the block device access - * pointer must be move - * - * \return void - * - * \brief Change block device access pointer position - * - * The block device access pointer is relocated in terms of blocks - */ -void sdcard_dev_lseek(struct sdcard_dev * sdcard, unsigned int pos); - -/** - * \param sdcard : Pointer to the initialized block device - * \param len : Block device length to set - * - * \return 0 when succeed or error code value otherwise - * - * \brief Set the block length of the device - */ -int sdcard_dev_set_blocklen(struct sdcard_dev * sdcard, unsigned int len); - -/** - * SD Card constants - */ - -/** Number of retries after an unacknowledge command */ -#define SDCARD_COMMAND_TIMEOUT 100 - -/** This command is a simple SD commmand */ -#define SDCARD_CMD 0 - -/** This is an application specific command */ -#define SDCARD_ACMD 1 - -/** The transmition is done in the negative edge of the clock */ -#define SDCARD_TX_NEGEDGE 0 - -/** The transmition is done in the positive edge of the clock */ -#define SDCARD_TX_POSEDGE 1 - -/** The reception is done in the negative edge of the clock */ -#define SDCARD_RX_NEGEDGE 0 - -/** The reception is done in the positive edge of the clock */ -#define SDCARD_RX_POSEDGE 1 - -/** - * SD Card macros - */ - -/** Check if the response is valid */ -#define SDCARD_CHECK_R1_VALID(x) (~x & SDCARD_R1_RSP_VALID) ? 1 : 0 - -/** - * Check if there is an error in the response - * - * \note this macro must be used after verify that the response is - * valid - */ -#define SDCARD_CHECK_R1_ERROR(x) ( x & 0x7E) ? 1 : 0 - -/** - * SD Card Response 1 (R1) format constants - */ -#define SDCARD_R1_IN_IDLE_STATE ( 1 << 0 ) /**< \brief R1 bit 0 */ -#define SDCARD_R1_ERASE_RESET ( 1 << 1 ) /**< \brief R1 bit 1 */ -#define SDCARD_R1_ILLEGAL_CMD ( 1 << 2 ) /**< \brief R1 bit 2 */ -#define SDCARD_R1_COM_CRC_ERR ( 1 << 3 ) /**< \brief R1 bit 3 */ -#define SDCARD_R1_ERASE_SEQ_ERR ( 1 << 4 ) /**< \brief R1 bit 4 */ -#define SDCARD_R1_ADDRESS_ERR ( 1 << 5 ) /**< \brief R1 bit 5 */ -#define SDCARD_R1_PARAMETER_ERR ( 1 << 6 ) /**< \brief R1 bit 6 */ -#define SDCARD_R1_RSP_VALID ( 1 << 7 ) /**< \brief R1 bit 7 */ - -#endif - -/* - * vim: tabstop=4 : shiftwidth=4 : expandtab : softtabstop=4 - */ Index: trunk/softs/tsar_boot/include/spi.h =================================================================== --- trunk/softs/tsar_boot/include/spi.h (revision 755) +++ (revision ) @@ -1,154 +1,0 @@ -/** - * \file : spi.h - * \date : 30 August 2012 - * \author: Cesar Fuguet - * - * This file contains the definition of a driver for the SPI controller - */ - -#ifndef SPI_H -#define SPI_H - -#include - -/** - * SPI type definition - */ -struct spi_dev -{ - /** - * RX/TX registers of the SPI controller - */ - unsigned int rx_tx[4]; - - /** - * Control register of the SPI controller - */ - unsigned int ctrl; - - /** - * Divider register for the SPI controller generated clock signal - */ - unsigned int divider; - - /** - * Slave select register of the SPI controller - */ - unsigned int ss; - unsigned int dma_base; - unsigned int dma_baseh; - unsigned int dma_count; -}; - -/** - * \param spi : initialized pointer to a SPI controller. - * \param byte : Byte to send to the SPI controller - * \param index : index of the TX register in the SPI (TX[index]) - * - * \return void - * - * \brief Send a byte to one of the tx buffer registers of the - * SPI controller - */ -void spi_put_tx(struct spi_dev * spi, unsigned char byte, int index); - -/** - * \param spi : initialized pointer to a SPI controller. - * \param index : index of the RX register in the SPI (RX[index]) - * - * \return byte from the RX[index] register - * - * \brief Get a byte from one of the rx buffer registers of the - * SPI controller - */ -inline volatile unsigned char spi_get_rx(struct spi_dev * spi, int index); - -/** - * \param spi : initialized pointer to a SPI controller. - * \param buf : buffer to store data read - * \param count : byte count to read - * - * \return void - * - * \brief get a data block from the SPI controller using 128bits - * reads if possible - */ -void spi_get_data(struct spi_dev * spi, void *buf, unsigned int count); - -/** - * \param spi : initialized pointer to a SPI controller. - * \param index : index of the slave select signal to assert - * - * \return void - * - * \brief Set the index selected slave select signal (ss[index] <= '0') - */ -inline void spi_ss_assert(struct spi_dev * spi, int index); - -/** - * \param spi : initialized pointer to a SPI controller. - * \param index : index of the slave select signal to deassert - * - * \return void - * - * \brief Unset the index selected slave select signal (ss[index] <= '0') - */ -inline void spi_ss_deassert(struct spi_dev * spi, int index); - -/** - * \param spi : initialized pointer to a SPI controller. - * \param spi_freq : SPI Master to Slave clock frequency (in Hz) - * \param sys_freq : System clock frequency (in Hz) - * \param char_len : number to bits to transmit in one transfer - * \param tx_edge : when 0, the Master Out Slave In signal is changed - * on the falling edge of the clock - * \param rx_edge : when 0, the Master In Slave Out signal is latched - * on the falling edge of the clock - * - * \return void - * - * \brief Configure the SPI controller - * \note Any of the arguments can be less than 0 if you want to keep the old value - */ -void spi_dev_config ( - struct spi_dev * spi, - int spi_freq , - int sys_freq , - int char_len , - int tx_edge , - int rx_edge ); - -/** - * SPI macros and constants - */ -#define SPI_TX_POSEDGE 1 /**< MOSI is changed on neg edge */ -#define SPI_TX_NEGEDGE 0 /**< MOSI is changed on pos edge */ -#define SPI_RX_POSEDGE 1 /**< MISO is latched on pos edge */ -#define SPI_RX_NEGEDGE 0 /**< MISO is latched on neg edge */ - -#define SPI_CTRL_ASS_EN ( 1 << 13 ) /**< Auto Slave Sel Assertion */ -#define SPI_CTRL_IE_EN ( 1 << 12 ) /**< Interrupt Enable */ -#define SPI_CTRL_LSB_EN ( 1 << 11 ) /**< LSB are sent first */ -#define SPI_CTRL_TXN_EN ( 1 << 10 ) /**< MOSI is changed on neg edge */ -#define SPI_CTRL_RXN_EN ( 1 << 9 ) /**< MISO is latched on neg edge */ -#define SPI_CTRL_GO_BSY ( 1 << 8 ) /**< Start the transfer */ -#define SPI_CTRL_DMA_BSY (1 << 16) /*** DMA in progress */ -#define SPI_CTRL_CHAR_LEN_MASK ( 0xFF ) /**< Bits transmited in 1 transfer */ -#define SPI_RXTX_MASK ( 0xFF ) /**< Mask for the an RX/TX value */ - -#define SPI_DMA_COUNT_READ (1 << 0) /* operation is a read (else write) */ - -/** - * \param x : Initialized pointer to the SPI controller - * - * \return 1 if there is an unfinished transfer in the SPI controller - * - * \brief Check the GO_BUSY bit of the SPI Controller - */ -#define SPI_IS_BUSY(x) ((ioread32(&x->ctrl) & (SPI_CTRL_GO_BSY|SPI_CTRL_DMA_BSY)) != 0) ? 1 : 0 - -#endif - -/* - * vim: tabstop=4 : shiftwidth=4 : expandtab : softtabstop=4 - */ Index: trunk/softs/tsar_boot/include/tty.h =================================================================== --- trunk/softs/tsar_boot/include/tty.h (revision 755) +++ (revision ) @@ -1,23 +1,0 @@ -#ifndef TTY_REGS_H -#define TTY_REGS_H - -enum SoclibTtyRegisters { - TTY_WRITE = 0, - TTY_STATUS = 1, - TTY_READ = 2, - TTY_CONFIG = 3, - /**/ - TTY_SPAN = 4, -}; - -#endif - -// Local Variables: -// tab-width: 4; -// c-basic-offset: 4; -// c-file-offsets:((innamespace . 0)(inline-open . 0)); -// indent-tabs-mode: nil; -// End: -// -// vim: filetype=cpp:expandtab:shiftwidth=4:tabstop=4:softtabstop=4 - Index: trunk/softs/tsar_boot/src/reset.S =================================================================== --- trunk/softs/tsar_boot/src/reset.S (revision 755) +++ trunk/softs/tsar_boot/src/reset.S (revision 758) @@ -24,5 +24,5 @@ * - Each processor initialises its private XICU WTI mask register. * - Only processor 0 executes the reset_load_elf function to load into memory - * the system specific boot-loader stored on disk at BOOT_LOADER_LBA + * the system specific boot-loader stored on disk at RESET_LOADER_LBA * - All other processors wait in a low power consumption mode that the * processor 0 wakes them using an IPI (Inter Processor Interruption) @@ -86,5 +86,5 @@ move t3, t0 - la k0, NB_PROCS /* k0 <= # of processors per cluster */ + la k0, NB_PROCS_MAX /* k0 <= # of processors per cluster */ divu t3, k0 mfhi t1 /* t1 <= lpid = pid % NB_PROCS */ @@ -101,7 +101,7 @@ */ - la t3, ICU_PADDR_BASE /* t3 <= ICU base address */ - move t4, t1 /* t4 <= local_id */ - li t5, IRQ_PER_PROC /* t5 <= IRQ_PER_PROC */ + la t3, SEG_XCU_BASE /* t3 <= ICU base address */ + move t4, t1 /* t4 <= local_id */ + li t5, IRQ_PER_PROCESSOR /* t5 <= IRQ_PER_PROCESSOR */ multu t4, t5 mflo t6 /* t6 <= IRQ_PER_PROC * local_id */ @@ -142,18 +142,11 @@ la a0, versionstr - la k0, reset_puts - jalr k0 - nop - - -#if USE_SPI - - /* Processor 0 Initialize the SPI controller */ - - la k0, reset_ioc_init - jalr k0 - nop - -#endif + jal reset_puts + nop + + /* Processor 0 initializes the block device */ + + jal reset_ioc_init + nop /* @@ -162,7 +155,6 @@ */ - la k0, reset_elf_loader - li a0, BOOT_LOADER_LBA - jalr k0 + li a0, RESET_LOADER_LBA + jal reset_elf_loader nop Index: trunk/softs/tsar_boot/src/reset_elf_loader.c =================================================================== --- trunk/softs/tsar_boot/src/reset_elf_loader.c (revision 755) +++ trunk/softs/tsar_boot/src/reset_elf_loader.c (revision 758) @@ -38,5 +38,5 @@ * Load ELF PROGRAM HEADER TABLE */ - Elf32_Phdr elf_pht[PHDR_ARRAY_SIZE]; + Elf32_Phdr elf_pht[RESET_PHDR_ARRAY_SIZE]; size_t phdr_nbyte = sizeof(Elf32_Phdr) * elf_header.e_phnum; size_t phdr_off = elf_header.e_phoff; Index: trunk/softs/tsar_boot/src/reset_ioc.c =================================================================== --- trunk/softs/tsar_boot/src/reset_ioc.c (revision 755) +++ trunk/softs/tsar_boot/src/reset_ioc.c (revision 758) @@ -1,207 +1,76 @@ +/** + * \file reset_ioc.c + * \date December 2013 + * \author Cesar Fuguet + * + * \brief API for accessing the disk controller + * + * \note These functions call the specific disk controller driver depending + * on the USE_IOC_BDV, USE_IOC_SPI or USE_RAMDISK constants + */ + #include +#include -#if USE_SPI -static struct sdcard_dev _sdcard_device; -static struct spi_dev *const _spi_device = (struct spi_dev*) IOC_PADDR_BASE; +#if !defined(USE_IOC_BDV) && !defined(USE_IOC_SPI) && !defined(USE_RAMDISK) +# error "One of the USE_IOC_* constants must be defined in the hard_config.h" #endif -#define SDCARD_RESET_ITER_MAX 4 +#if (USE_IOC_BDV + USE_IOC_SPI + USE_RAMDISK) != 1 +# error "Only one disk controller must be used" +#endif -/////////////////////////////////// -inline void reset_sleep(int cycles) +#if USE_IOC_SPI +#include +#endif + +#if USE_IOC_BDV +#include +#endif + +#if USE_RAMDISK +#include +#endif + +/** + * \brief Initialize the disk controller + */ +int reset_ioc_init() { - int i; - for (i = 0; i < cycles; i++); +#if USE_IOC_BDV + return reset_bdv_init(); +#elif USE_IOC_SPI + return reset_sdc_init(); +#elif USE_RAMDISK + return reset_rdk_init(); +#else +# error "reset_ioc_init() : Not supported disk controller chosen" +#endif } -#if USE_SPI -/////////////////////////////////////////////////////////////////////////////// -// reset_ioc_init -// This function initializes the SDCARD / required for FPGA. -/////////////////////////////////////////////////////////////////////////////// -int reset_ioc_init() +/** + * \param lba : first block index on the disk + * \param buffer: base address of the memory buffer + * \param count : number of blocks to be transfered + * + * \brief Transfer data from disk to a memory buffer + * + * \note This is a blocking function. The function returns once the transfer + * is completed. + */ +int reset_ioc_read( unsigned int lba, void* buffer, unsigned int count ) { - unsigned char sdcard_rsp; - - reset_puts("Initializing block device\n\r"); - - /** - * Initializing the SPI controller - */ - spi_dev_config ( - _spi_device , - 200000 , /**< SPI_clk: 200 Khz */ - SYSCLK_FREQ , /**< Sys_clk */ - 8 , /**< Charlen: 8 */ - SPI_TX_NEGEDGE, - SPI_RX_POSEDGE - ); - - /** - * Initializing the SD Card - */ - unsigned int iter = 0; - while(1) - { - reset_puts("Trying to initialize SD card... "); - - sdcard_rsp = sdcard_dev_open(&_sdcard_device, _spi_device, 0); - if (sdcard_rsp == 0) - { - reset_puts("OK\n"); - break; - } - - reset_puts("KO\n"); - reset_sleep(1000); - if (++iter >= SDCARD_RESET_ITER_MAX) - { - reset_puts("\nERROR: During SD card reset to IDLE state\n" - "/ card response = "); - reset_putx(sdcard_rsp); - reset_puts("\n"); - reset_exit(); - } - } - - /** - * Set the block length of the SD Card - */ - sdcard_rsp = sdcard_dev_set_blocklen(&_sdcard_device, 512); - if (sdcard_rsp) - { - reset_puts("ERROR: During SD card blocklen initialization\n"); - reset_exit(); - } - - /** - * Incrementing SDCARD clock frequency for normal function - */ - spi_dev_config ( - _spi_device , - 10000000 , /**< SPI_clk 10 Mhz */ - SYSCLK_FREQ , /**< Sys_clk */ - -1 , /**< Charlen: 8 */ - -1 , - -1 - ); - - reset_puts("Finish block device initialization\n\r"); - - return 0; -} // end reset_ioc_init() -#endif - -////////////////////////////////////////////////////////////////////////////// -// reset_bdv_read() -///////////////////////////////////////////////////////////////////////////// -#if USE_BDV -int reset_bdv_read( unsigned int lba, - void* buffer, - unsigned int count ) -{ - unsigned int * ioc_address = (unsigned int*)IOC_PADDR_BASE; - - // block_device configuration - iowrite32( &ioc_address[BLOCK_DEVICE_BUFFER], (unsigned int) buffer ); - iowrite32( &ioc_address[BLOCK_DEVICE_COUNT], count ); - iowrite32( &ioc_address[BLOCK_DEVICE_LBA], lba ); - iowrite32( &ioc_address[BLOCK_DEVICE_IRQ_ENABLE], 0 ); - - // block_device trigger transfer - iowrite32( &ioc_address[BLOCK_DEVICE_OP], ( unsigned int ) - BLOCK_DEVICE_READ ); - - unsigned int status = 0; - while ( 1 ) - { - status = ioread32(&ioc_address[BLOCK_DEVICE_STATUS]); - if ( status == BLOCK_DEVICE_READ_SUCCESS ) - { - break; - } - if ( status == BLOCK_DEVICE_READ_ERROR ) { - reset_puts("ERROR during read on the BLK device\n"); - return 1; - } - } -#if (CACHE_COHERENCE == 0) || USE_IOB - reset_buf_invalidate(buffer, CACHE_LINE_SIZE, count * 512); -#endif - return 0; -} -#endif - -////////////////////////////////////////////////////////////////////////////// -// reset_spi_read() -///////////////////////////////////////////////////////////////////////////// -#if USE_SPI -static int reset_spi_read( unsigned int lba, - void* buffer, - unsigned int count ) -{ - unsigned int sdcard_rsp; - unsigned int i; - - sdcard_dev_lseek(&_sdcard_device, lba); - for(i = 0; i < count; i++) - { - unsigned char* buf = (unsigned char *) buffer + (512 * i); - if (( sdcard_rsp = sdcard_dev_read ( &_sdcard_device, buf, 512 ) )) - { - reset_puts("ERROR during read on the SDCARD device. Code: "); - reset_putx(sdcard_rsp); - reset_puts("\n"); - return 1; - } - } - return 0; -} -#endif - -////////////////////////////////////////////////////////////////////////////// -// reset_rdk_read() -///////////////////////////////////////////////////////////////////////////// -#if USE_RDK -static int reset_rdk_read( unsigned int lba, - void* buffer, - unsigned int count ) -{ - unsigned int* rdk_address = (unsigned int*) RDK_PADDR_BASE; - char* src = (char*) rdk_address + (lba * 512); - - memcpy(buffer, (void*) src, count * 512); - return 0; -} -#endif - -/////////////////////////////////////////////////////////////////////////////// -// reset_ioc_read() -// Transfer data from disk to a memory buffer -// - param lba : first block index on the disk -// - param buffer : base address of the memory buffer -// - param count : number of blocks to be transfered -// This is a blocking function. The function returns once the transfer is -// completed. -// -// The USE_BDV, USE_SPI and USE_RDK variables signal if the disk is accessed -// through a BLOCK DEVICE, SPI or RAMDISK respectively -/////////////////////////////////////////////////////////////////////////////// -int reset_ioc_read( unsigned int lba, - void* buffer, - unsigned int count ) -{ -#if USE_BDV +#if USE_IOC_BDV return reset_bdv_read(lba, buffer, count); -#elif USE_SPI - return reset_spi_read(lba, buffer, count); -#elif USE_RDK +#elif USE_IOC_SPI + return reset_sdc_read(lba, buffer, count); +#elif USE_RAMDISK return reset_rdk_read(lba, buffer, count); #else -# error "reset_ioc_read() : No supported disk controller chosen" +# error "reset_ioc_read() : Not supported disk controller chosen" #endif } /* - * vim: tabstop=4 : shiftwidth=4 : expandtab + * vim: tabstop=4 : softtabstop=4 : shiftwidth=4 : expandtab */ Index: trunk/softs/tsar_boot/src/reset_tty.c =================================================================== --- trunk/softs/tsar_boot/src/reset_tty.c (revision 755) +++ (revision ) @@ -1,103 +1,0 @@ -/******************************************************************** - * \file reset_tty.c - * \date 5 mars 2014 - * \author Cesar Fuguet - * - * Minimal driver for TTY controler - *******************************************************************/ - -#include -#include -#include - -/////////////////////// -int reset_getc(char *c) -{ - unsigned int* tty_address = (unsigned int*) TTY_PADDR_BASE; - - if (ioread32( &tty_address[TTY_STATUS] ) == 0) return 0; - *c = ioread32( &tty_address[TTY_READ] ); - return 1; -} - -///////////////////////////// -void reset_putc(const char c) -{ - unsigned int* tty_address = (unsigned int*) TTY_PADDR_BASE; - - iowrite32( &tty_address[TTY_WRITE], (unsigned int)c ); - if (c == '\n') reset_putc( '\r' ); -} - -/////////////////////////////////// -void reset_puts(const char *buffer) -{ - unsigned int n; - - for ( n=0; n<100; n++) - { - if (buffer[n] == 0) break; - reset_putc(buffer[n]); - } -} - -///////////////////////////////// -void reset_putx(unsigned int val) -{ - static const char HexaTab[] = "0123456789ABCDEF"; - char buf[11]; - unsigned int c; - - buf[0] = '0'; - buf[1] = 'x'; - buf[10] = 0; - - for ( c = 0 ; c < 8 ; c++ ) - { - buf[9-c] = HexaTab[val&0xF]; - val = val >> 4; - } - reset_puts(buf); -} - -///////////////////////////////// -void reset_putd(unsigned int val) -{ - static const char DecTab[] = "0123456789"; - char buf[11]; - unsigned int i; - unsigned int first = 0; - - buf[10] = 0; - - for ( i = 0 ; i < 10 ; i++ ) - { - if ((val != 0) || (i == 0)) - { - buf[9-i] = DecTab[val % 10]; - first = 9-i; - } - else - { - break; - } - val /= 10; - } - reset_puts( &buf[first] ); -} - -///////////////// -void reset_exit() -{ - register int pid; - asm volatile( "mfc0 %0, $15, 1": "=r"(pid) ); - - reset_puts("\n!!! Exit Processor "); - reset_putx(pid); - reset_puts(" !!!\n"); - - while(1) asm volatile("nop"); // infinite loop... -} - - - Index: trunk/softs/tsar_boot/src/reset_utils.c =================================================================== --- trunk/softs/tsar_boot/src/reset_utils.c (revision 755) +++ trunk/softs/tsar_boot/src/reset_utils.c (revision 758) @@ -8,14 +8,15 @@ #include - -/* - * pread(size_t file_offset, void* buf, size_t nbyte, size_t offset) - * - * read from disk into buffer "nbyte" bytes from (file_offset + offset) - * +#include +#include +#include + +/** * \param file_offset: Disk relative offset of file * \param buf: Destination buffer * \param nbyte: Number of bytes to read * \param offset: File relative offset + * + * \brief read from disk into buffer "nbyte" bytes from (file_offset + offset) * * \note Absolute disk offset (in bytes) is (file_offset + offset) @@ -57,9 +58,9 @@ if (offset_blk != blk_buf_idx) { if (reset_ioc_read(offset_blk, (void*)&blk_buf, 1)) { - return -1; + return -1; } } blk_buf_idx = offset_blk; - read_nbyte = (nbyte > unaligned_nbyte) ? unaligned_nbyte : nbyte; + read_nbyte = (nbyte > unaligned_nbyte) ? unaligned_nbyte : nbyte; memcpy((void*)dst, (void*)&blk_buf.b[offset], read_nbyte); nbyte -= read_nbyte; @@ -70,5 +71,5 @@ * Read aligned bytes directly to buffer */ - size_t nblk = nbyte / BLOCK_SIZE; + size_t nblk = nbyte / BLOCK_SIZE; if (nblk) { if (reset_ioc_read(offset_blk, (void*)&dst[read_nbyte], nblk)) { @@ -91,29 +92,14 @@ read_nbyte += nbyte; } - return read_nbyte; -} - -/******************************************************************** - * proctime() - * - * Returns processor local time. - ********************************************************************/ -inline unsigned int proctime() -{ - unsigned int ret; - asm volatile ("mfc0 %0, $9":"=r" (ret)); - return ret; -} - -/******************************************************************** - * memcpy( _dst, _src, size ) - * - * Transfer data between two memory buffers. - * - * \param _dst : Destination buffer base address + return read_nbyte; +} + +/** + * \param _dst : Destination buffer base address * \param _src : Source buffer base address - * \param size : Number of bytes to transfer - * - ********************************************************************/ + * \param size : Number of bytes to transfer + * + * \brief Transfer data between two memory buffers. + */ void* memcpy(void *_dst, const void *_src, size_t n) { @@ -135,14 +121,11 @@ } -/******************************************************************** - * memset( _dst, value, size ) - * - * Initialize memory buffers with predefined value. - * - * \param _dst : Destination buffer base address - * \param value : Initialization value +/** + * \param _dst : Destination buffer base address + * \param value : Initialization value * \param size : Number of bytes to initialize * - ********************************************************************/ + * \brief Initialize memory buffers with predefined value. + */ void* memset(void *_dst, int c, size_t len) { @@ -179,13 +162,10 @@ } -/******************************************************************** - * check_elf_header(Elf32_Ehdr*) - * - * Verify that ELF file is valid and that the number of program - * headers does not exceed the defined maximum - * +/** * \param ehdr : ELF header pointer * - ********************************************************************/ + * \brief Verify that ELF file is valid and that the number of program headers + * does not exceed the defined maximum + */ void check_elf_header(Elf32_Ehdr *ehdr) { @@ -205,7 +185,7 @@ * Verification of Program Headers table size. It must be * smaller than the work size allocated for the - * elf_pht[PHDR_ARRAY_SIZE] array - */ - if (ehdr->e_phnum > PHDR_ARRAY_SIZE) + * elf_pht[RESET_PHDR_ARRAY_SIZE] array + */ + if (ehdr->e_phnum > RESET_PHDR_ARRAY_SIZE) { reset_puts("[RESET ERROR] ELF PHDR table size too large\n"); @@ -214,12 +194,9 @@ } -/******************************************************************** - * reset_print_elf_phdr( elf_phdr_ptr ) - * - * Print some fields of a ELF program header - * +/** * \param elf_phdr_ptr : Pointer to the ELF program header to print * - ********************************************************************/ + * \brief Print some fields of a ELF program header + */ void reset_print_elf_phdr(Elf32_Phdr * elf_phdr_ptr) { @@ -243,58 +220,5 @@ } - -/******************************************************************** - * reset_mcc_inval() - * - * Invalidate all data cache lines corresponding to a memory buffer - * (identified by an address and a size) in L2 cache. - ********************************************************************/ -#if USE_IOB -void reset_mcc_invalidate (const void * buffer, size_t size) -{ - addr_t *mcc_address = (addr_t*)MCC_PADDR_BASE; - - // get the hard lock assuring exclusive access to MEMC - while (ioread32(&mcc_address[MCC_LOCK])); - - // write invalidate paremeters on the memory cache this preloader - // use only the cluster 0 and then the HI bits are not used - - iowrite32(&mcc_address[MCC_ADDR_LO], (unsigned int) buffer); - iowrite32(&mcc_address[MCC_ADDR_HI], (unsigned int) 0); - iowrite32(&mcc_address[MCC_LENGTH] , (unsigned int) size); - iowrite32(&mcc_address[MCC_CMD] , (unsigned int) MCC_CMD_INVAL); - - // release the lock protecting MEMC - iowrite32(&mcc_address[MCC_LOCK], (unsigned int) 0); -} -#endif - -/******************************************************************** - * reset_dcache_buf_invalidate() - * - * Invalidate all data cache lines corresponding to a memory buffer - * (identified by an address and a size) in L1 cache and L2 cache. - ********************************************************************/ -#if (CACHE_COHERENCE == 0) || USE_IOB -void reset_buf_invalidate (const void * buffer, size_t line_size, size_t size) -{ - unsigned int i; - - // iterate on cache lines - for (i = 0; i <= size; i += line_size) - { - asm volatile( - " cache %0, %1" - :// no outputs - :"i" (0x11), "R" (*((unsigned char *) buffer + i)) - ); - } - -#if USE_IOB - reset_mcc_invalidate(buffer, size); -#endif -} -#endif - -// vim: tabstop=4 : softtabstop=4 : shiftwidth=4 : expandtab +/* + * vim: tabstop=4 : softtabstop=4 : shiftwidth=4 : expandtab + */ Index: trunk/softs/tsar_boot/src/sdcard.c =================================================================== --- trunk/softs/tsar_boot/src/sdcard.c (revision 755) +++ (revision ) @@ -1,366 +1,0 @@ -/** - * \file : sdcard.c - * \date : 30 August 2012 - * \author : Cesar Fuguet - * - * This file defines the driver of a SD Card device using an SPI controller - */ - -#include -#include - -/** - * \param sdcard: Initialized pointer to the block device - * - * \return void - * - * \brief Enable SD Card select signal - */ -static void _sdcard_enable(struct sdcard_dev * sdcard) -{ - spi_ss_assert(sdcard->spi, sdcard->slave_id); -} - -/** - * \param sdcard: Initialized pointer to the block device - * - * \return void - * - * \brief Disable SD Card select signal - */ -static void _sdcard_disable(struct sdcard_dev * sdcard) -{ - spi_ss_deassert(sdcard->spi, sdcard->slave_id); -} - -/** - * \param tick_count: SD Card clock ticks number - * - * \return void - * - * \brief Enable SD Card clock - * The tick count is byte measured (1 tick, 8 clock) - */ -static void _sdcard_gen_tick(struct sdcard_dev * sdcard, unsigned int tick_count) -{ - register int i = 0; - while(i++ < tick_count) spi_put_tx(sdcard->spi, 0xFF, 0); -} - -/** - * \param sdcard: Initialized pointer to the block device - * - * \return char from the SD card - * - * \brief Get a byte from the SD Card - */ -static unsigned char _sdcard_receive_char(struct sdcard_dev * sdcard) -{ - _sdcard_gen_tick(sdcard, 1); - - return spi_get_rx(sdcard->spi, 0); -} - -/** - * \param sdcard: Initialized pointer to the block device - * - * \return sdcard response - * - * \brief Wait for a valid response after the send of a command - * This function can return if one of the next two conditions are true: - * 1. Bit valid received - * 2. Timeout (not valid bit received after SDCARD_COMMAND_TIMEOUT - * wait ticks) - */ -static unsigned char _sdcard_wait_response(struct sdcard_dev * sdcard) -{ - unsigned char sdcard_rsp; - register int iter; - - iter = 0; - sdcard_rsp = _sdcard_receive_char(sdcard); - while ( - (iter < SDCARD_COMMAND_TIMEOUT) && - !SDCARD_CHECK_R1_VALID(sdcard_rsp) - ) - { - sdcard_rsp = _sdcard_receive_char(sdcard); - iter++; - } - - return sdcard_rsp; -} - -/** - * \params sdcard: Initialized pointer to the block device - * - * \return void - * - * \brief Wait data block start marker - */ -static void _sdcard_wait_data_block(struct sdcard_dev * sdcard) -{ - while (_sdcard_receive_char(sdcard) != 0xFE); -} - -/** - * \param sdcard : Initialized pointer to block device - * \param index : SD card CMD index - * \param app : Type of command, 0 for normal command or 1 for application - * specific - * \param args : SD card CMD arguments - * - * \return response first byte - * - * \brief Send command to the SD card - */ -static int _sdcard_send_command ( - struct sdcard_dev * sdcard , - int index , - int app , - void * args , - unsigned crc7 ) -{ - unsigned char sdcard_rsp; - unsigned char * _args; - - _sdcard_gen_tick(sdcard, 5); - - if (app == SDCARD_ACMD) - { - spi_put_tx(sdcard->spi, 0x40 | 55 , 0 );/* CMD and START bit */ - spi_put_tx(sdcard->spi, 0x00 , 0 );/* Argument[0] */ - spi_put_tx(sdcard->spi, 0x00 , 0 );/* Argument[1] */ - spi_put_tx(sdcard->spi, 0x00 , 0 );/* Argument[2] */ - spi_put_tx(sdcard->spi, 0x00 , 0 );/* Argument[3] */ - spi_put_tx(sdcard->spi, 0x01 | (crc7 << 1), 0 );/* END bit */ - - sdcard_rsp = _sdcard_wait_response(sdcard); - if (SDCARD_CHECK_R1_ERROR(sdcard_rsp)) - { - return sdcard_rsp; - } - } - - _args = (unsigned char *) args; - - _sdcard_gen_tick(sdcard, 1); - - spi_put_tx(sdcard->spi, 0x40 | index , 0 ); - spi_put_tx(sdcard->spi, _args[0] , 0 ); - spi_put_tx(sdcard->spi, _args[1] , 0 ); - spi_put_tx(sdcard->spi, _args[2] , 0 ); - spi_put_tx(sdcard->spi, _args[3] , 0 ); - spi_put_tx(sdcard->spi, 0x01 | (crc7 << 1), 0 ); - - return _sdcard_wait_response(sdcard); -} - -int sdcard_dev_open(struct sdcard_dev * sdcard, struct spi_dev * spi, int ss) -{ - unsigned char args[4]; - unsigned char sdcard_rsp; - unsigned int iter, ersp; - - sdcard->spi = spi; - sdcard->slave_id = ss; - - /* - * Supply SD card ramp up time (min 74 cycles) - */ - _sdcard_gen_tick(sdcard, 10); - - /* - * Assert slave select signal - * Send CMD0 (Reset Command) - * Deassert slave select signal - */ - _sdcard_enable(sdcard); - - args[0] = 0; - args[1] = 0; - args[2] = 0; - args[3] = 0; - sdcard_rsp = _sdcard_send_command(sdcard, 0, SDCARD_CMD, args, 0x4A); - if ( sdcard_rsp != 0x01 ) - { - reset_puts("card CMD0 failed "); - return sdcard_rsp; - } - - _sdcard_disable(sdcard); - /* - * send CMD8. If card is pre-v2, It will reply with illegal command. - * Otherwise we announce sdhc support. - */ - _sdcard_enable(sdcard); - args[0] = 0; - args[1] = 0; - args[2] = 0x01; - args[3] = 0x01; - sdcard_rsp = _sdcard_send_command(sdcard, 8, SDCARD_CMD, args, 0x63); - if (!SDCARD_CHECK_R1_VALID(sdcard_rsp)) { - reset_puts("card CMD8 failed "); - return sdcard_rsp; - } - if (!SDCARD_CHECK_R1_ERROR(sdcard_rsp)) { - /* no error, command accepted. get whole reply */ - ersp = _sdcard_receive_char(sdcard); - ersp = (ersp << 8) | _sdcard_receive_char(sdcard); - ersp = (ersp << 8) | _sdcard_receive_char(sdcard); - ersp = (ersp << 8) | _sdcard_receive_char(sdcard); - if ((ersp & 0xffff) != 0x0101) { - /* voltage mismatch */ - reset_puts("card CMD8 mismatch: "); - reset_putx(ersp); - return sdcard_rsp; - } - reset_puts("v2 or later "); - sdcard->sdhc = 1; - } else if ((sdcard_rsp & SDCARD_R1_ILLEGAL_CMD) == 0) { - /* other error */ - reset_puts("card CMD8 error "); - return sdcard_rsp; - } else { - sdcard->sdhc = 0; - } - _sdcard_disable(sdcard); - /* send CMD41, enabling the card */ - _sdcard_enable(sdcard); - args[0] = sdcard->sdhc ? 0x40: 0; - args[1] = 0; - args[2] = 0; - args[3] = 0; - - iter = 0; - while( iter++ < SDCARD_COMMAND_TIMEOUT ) - { - sdcard_rsp = _sdcard_send_command(sdcard, 41, SDCARD_ACMD, args, 0x00); - if( sdcard_rsp == 0x01 ) - { - continue; - } - - break; - } - - _sdcard_disable(sdcard); - if (sdcard_rsp) { - reset_puts("SD ACMD41 failed "); - return sdcard_rsp; - } - if (sdcard->sdhc != 0) { - /* get the card capacity to see if it's really HC */ - _sdcard_enable(sdcard); - args[0] = sdcard->sdhc ? 0x40: 0; - args[1] = 0; - args[2] = 0; - args[3] = 0; - sdcard_rsp = _sdcard_send_command(sdcard, 58, SDCARD_CMD, - args, 0x00); - if (sdcard_rsp) { - reset_puts("SD CMD58 failed "); - return sdcard_rsp; - } - ersp = _sdcard_receive_char(sdcard); - ersp = (ersp << 8) | _sdcard_receive_char(sdcard); - ersp = (ersp << 8) | _sdcard_receive_char(sdcard); - ersp = (ersp << 8) | _sdcard_receive_char(sdcard); - if (ersp & 0x40000000) { - reset_puts("SDHC "); - } else { - sdcard->sdhc = 0; - } - _sdcard_disable(sdcard); - } - reset_puts("card detected "); - return 0; -} - -int sdcard_dev_read(struct sdcard_dev * sdcard, void * buf, unsigned int count) -{ - unsigned char args[4]; - unsigned char sdcard_rsp; - register int i; - - for (i = 0; i < 4; i++) - { - args[i] = (sdcard->access_pointer >> (32 - (i+1)*8)) & 0xFF; - } - - _sdcard_enable(sdcard); - - sdcard_rsp = _sdcard_send_command(sdcard, 17, SDCARD_CMD, args, 0x00); - if ( SDCARD_CHECK_R1_ERROR(sdcard_rsp) ) - { - _sdcard_disable(sdcard); - return sdcard_rsp; - } - - _sdcard_wait_data_block(sdcard); - - spi_get_data(sdcard->spi, buf, count); - - /* - * Get the remainder of the block bytes and the CRC16 (comes - * at the end of the data block) - */ - i = count; - while( i++ < (512 + 2) ) _sdcard_receive_char(sdcard); - - _sdcard_disable(sdcard); - - /* - * Move the access pointer to the next block - */ - sdcard->access_pointer += sdcard->block_length; - - return 0; -} - -unsigned int sdcard_dev_write(struct sdcard_dev *sdcard, void * buf, unsigned int count) -{ - return 0; -} - -void sdcard_dev_lseek(struct sdcard_dev * sdcard, unsigned int blk_pos) -{ - sdcard->access_pointer = sdcard->block_length * blk_pos; -} - -int sdcard_dev_set_blocklen(struct sdcard_dev * sdcard, unsigned int len) -{ - unsigned char args[4]; - unsigned char sdcard_rsp; - register int i; - - if (len != 512) - return 1; - - if (sdcard->sdhc) { - sdcard->block_length = 1; - return 0; - } - - for (i = 0; i < 4; i++) - args[i] = (len >> (32 - (i+1)*8)) & 0xFF; - - _sdcard_enable(sdcard); - - sdcard_rsp = _sdcard_send_command(sdcard, 16, SDCARD_CMD, args, 0x00); - if ( SDCARD_CHECK_R1_ERROR(sdcard_rsp) ) - { - _sdcard_disable(sdcard); - return sdcard_rsp; - } - - _sdcard_disable(sdcard); - - sdcard->block_length = len; - - return 0; -} - -/* - * vim: tabstop=4 : shiftwidth=4 : expandtab : softtabstop=4 - */ Index: trunk/softs/tsar_boot/src/spi.c =================================================================== --- trunk/softs/tsar_boot/src/spi.c (revision 755) +++ (revision ) @@ -1,192 +1,0 @@ -/** - * \file spi.c - * \date 31 August 2012 - * \author Cesar Fuguet - */ -#include -#include -#include - -/** - * \param x: input value - * - * \return byte-swapped value - * - * \brief byte-swap a 32bit word - */ -static unsigned int bswap32(unsigned int x) -{ - unsigned int y; - y = (x & 0x000000ff) << 24; - y |= (x & 0x0000ff00) << 8; - y |= (x & 0x00ff0000) >> 8; - y |= (x & 0xff000000) >> 24; - return y; -} - -/** - * \param spi : Initialized pointer to the SPI controller - * - * \brief Wait until the SPI controller has finished a transfer - * - * Wait until the GO_BUSY bit of the SPI controller be deasserted - */ -static void _spi_wait_if_busy(struct spi_dev * spi) -{ - register int delay; - - while(SPI_IS_BUSY(spi)) - { - for (delay = 0; delay < 100; delay++); - } -} - -/** - * \param spi : Initialized pointer to the SPI controller - * - * \return void - * - * \brief Init transfer of the tx registers to the selected slaves - */ -static void _spi_init_transfer(struct spi_dev * spi) -{ - unsigned int spi_ctrl = ioread32(&spi->ctrl); - - iowrite32(&spi->ctrl, spi_ctrl | SPI_CTRL_GO_BSY); -} - -/** - * \param spi_freq : Desired frequency for the generated clock from the SPI - * controller - * \param sys_freq : System clock frequency - * - * \brief Calculated the value for the divider register in order to obtain the SPI - * desired clock frequency - */ -static unsigned int _spi_calc_divider_value ( - unsigned int spi_freq , - unsigned int sys_freq ) -{ - return ((sys_freq / (spi_freq * 2)) - 1); -} - -void spi_put_tx(struct spi_dev * spi, unsigned char byte, int index) -{ - _spi_wait_if_busy(spi); - { - iowrite8(&spi->rx_tx[index % 4], byte); - _spi_init_transfer(spi); - } - _spi_wait_if_busy(spi); -} - -volatile unsigned char spi_get_rx(struct spi_dev * spi, int index) -{ - return ioread8(&spi->rx_tx[index % 4]); -} - -void spi_get_data(struct spi_dev * spi, void *buf, unsigned int count) -{ - unsigned int *data = buf; - unsigned char *data8; - unsigned int spi_ctrl0, spi_ctrl; - int i; - - _spi_wait_if_busy(spi); - - spi_ctrl0 = ioread32(&spi->ctrl); -#ifdef IOC_USE_DMA - if (count == 512 && ((int)buf & 0x3f) == 0) { - /* use DMA */ - spi->dma_base = (int)buf; - spi->dma_baseh = 0; - spi->dma_count = count | SPI_DMA_COUNT_READ; - _spi_wait_if_busy(spi); - i = count / 4; - } else -#endif /* IOC_USE_DMA */ - { - /* switch to 128 bits words */ - spi_ctrl = (spi_ctrl0 & ~SPI_CTRL_CHAR_LEN_MASK) | 128; - iowrite32(&spi->ctrl, spi_ctrl); - - /* read data */ - for (i = 0; i + 3 < count / 4; i += 4) { - iowrite32(&spi->rx_tx[0], 0xffffffff); - iowrite32(&spi->rx_tx[1], 0xffffffff); - iowrite32(&spi->rx_tx[2], 0xffffffff); - iowrite32(&spi->rx_tx[3], 0xffffffff); - iowrite32(&spi->ctrl, spi_ctrl | SPI_CTRL_GO_BSY); - - _spi_wait_if_busy(spi); - - *data = bswap32(ioread32(&spi->rx_tx[3])); - data++; - *data = bswap32(ioread32(&spi->rx_tx[2])); - data++; - *data = bswap32(ioread32(&spi->rx_tx[1])); - data++; - *data = bswap32(ioread32(&spi->rx_tx[0])); - data++; - } - } - - /* switch back to original word size */ - iowrite32(&spi->ctrl, spi_ctrl0); - - /* read missing bits */ - data8 = (void *)data; - i = i * 4; - for (; i < count; i++) - { - iowrite32(&spi->rx_tx[0], 0xffffffff); - iowrite32(&spi->ctrl, spi_ctrl0 | SPI_CTRL_GO_BSY); - - _spi_wait_if_busy(spi); - - *data8 = spi_get_rx(spi, 0); - data8++; - } - return; -} - -void spi_ss_assert(struct spi_dev * spi, int index) -{ - unsigned int spi_ss = ioread32(&spi->ss); - - iowrite32(&spi->ss, spi_ss | (1 << index)); -} - -void spi_ss_deassert(struct spi_dev * spi, int index) -{ - unsigned int spi_ss = ioread32(&spi->ss); - - iowrite32(&spi->ss, spi_ss & ~(1 << index)); -} - -void spi_dev_config ( - struct spi_dev * spi, - int spi_freq , - int sys_freq , - int char_len , - int tx_edge , - int rx_edge ) -{ - unsigned int spi_ctrl = ioread32(&spi->ctrl); - - if ( tx_edge == 0 ) spi_ctrl |= SPI_CTRL_TXN_EN; - else if ( tx_edge == 1 ) spi_ctrl &= ~SPI_CTRL_TXN_EN; - if ( rx_edge == 0 ) spi_ctrl |= SPI_CTRL_RXN_EN; - else if ( rx_edge == 1 ) spi_ctrl &= ~SPI_CTRL_RXN_EN; - if ( char_len > 0 ) spi_ctrl = (spi_ctrl & ~SPI_CTRL_CHAR_LEN_MASK) | - (char_len & SPI_CTRL_CHAR_LEN_MASK); - - iowrite32(&spi->ctrl, spi_ctrl); - - if (spi_freq > 0 && sys_freq > 0) - iowrite32(&spi->divider, _spi_calc_divider_value(spi_freq, sys_freq)); -} - -/* - * vim: tabstop=4 : shiftwidth=4 : expandtab : softtabstop=4 - */