Changeset 766

Timestamp:

Aug 13, 2014, 4:34:50 PM (10 years ago)

Author:

cfuguet

Message:

reconfiguration: tsar_generic_iob sc_start() calls optimization

• sc_start() continue during 'simul_period' cycles

• 'simul_period' is defined as the debug_period if debug activated or 'stats_period' otherwise

Location:

branches/reconfiguration/platforms/tsar_generic_iob

Files:

• arch.py (modified) (7 diffs)
• top.cpp (modified) (2 diffs)

branches/reconfiguration/platforms/tsar_generic_iob/arch.py

@@ -20 +20 @@
 #  - nb_procs       : number of processors per cluster
 #
-#  The "hidden" platform parameters are:
+#  The "hidden" parameters (defined below) are:
 #  - nb_ttys        : number of TTY channels
 #  - nb_nics        : number of NIC channels
@@ -43 +43 @@
     nb_ttys           = 1
     nb_nics           = 2
-    fbf_width         = 1024
+    fbf_width         = 128
     x_io              = 0
     y_io              = 0
@@ -59 +59 @@
 
     assert( (x_size == 1) or (x_size == 2) or (x_size == 4)
-             or (y_size == 8) or (x_size == 16) )
+             or (x_size == 8) or (x_size == 16) )
 
     assert( (y_size == 1) or (y_size == 2) or (y_size == 4)
@@ -111 +111 @@
     iob_size  = 0x1000                     # 4 kbytes
 
+
     ### GIET_VM specifics virtual segments
-
-    ### define  bootloader vsegs base addresses
+    ### define bootloader vsegs base addresses
 
     boot_mapping_vbase   = 0x00000000      # ident
-    boot_mapping_size    = 0x00040000      # 256 Kbytes
-
-    boot_code_vbase      = 0x00040000      # ident
-    boot_code_size       = 0x00020000      # 128 Kbytes
-
-    boot_data_vbase      = 0x00060000      # ident
-    boot_data_size       = 0x00010000      # 64 Kbytes
-
-    boot_buffer_vbase    = 0x00070000      # ident
-    boot_buffer_size     = 0x00060000      # 384 Kbytes
-
-    boot_stack_vbase     = 0x03F00000      # ident
-    boot_stack_size      = 0x00100000      # 1 Mbytes
-
-    ### define kernel vsegs base addresses
+    boot_mapping_size    = 0x00080000      # 512 Kbytes
+
+    boot_code_vbase      = 0x00080000      # ident
+    boot_code_size       = 0x00040000      # 256 Kbytes
+
+    boot_data_vbase      = 0x000C0000      # ident
+    boot_data_size       = 0x00080000      # 512 Kbytes
+
+    boot_stack_vbase     = 0x00140000      # ident
+    boot_stack_size      = 0x00050000      # 320 Kbytes
+
+    ### define kernel vsegs base addresses and sizes
 
     kernel_code_vbase    = 0x80000000
@@ -136 +133 @@
 
     kernel_data_vbase    = 0x80020000
-    kernel_data_size     = 0x00060000      # 384 Kbytes
-
-    kernel_uncdata_vbase = 0x80080000
-    kernel_uncdata_size  = 0x00040000      # 256 Kbytes
-
-    kernel_init_vbase    = 0x800C0000
+    kernel_data_size     = 0x00020000      # 128 Kbytes
+
+    kernel_uncdata_vbase = 0x80040000
+    kernel_uncdata_size  = 0x00010000      # 64 Kbytes
+
+    kernel_init_vbase    = 0x80050000
     kernel_init_size     = 0x00010000      # 64 Kbytes
 
     kernel_sched_vbase   = 0xF0000000            # distributed in all clusters
-    kernel_sched_size    = 0x1000 * nb_procs     # 4 kbytes per processor
+    kernel_sched_size    = 0x2000 * nb_procs     # 8 kbytes per processor
 
     ### create mapping
@@ -226 +223 @@
     ### global vsegs for boot_loader / identity mapping
 
-    mapping.addGlobal( 'seg_boot_mapping'  , boot_mapping_vbase  , boot_mapping_size  , 'C_W_',
-                       vtype = 'BLOB'  , x = 0, y = 0, pseg = 'RAM', identity = True )
-
-    mapping.addGlobal( 'seg_boot_code'     , boot_code_vbase     , boot_code_size     , 'CXW_',
-                       vtype = 'BUFFER', x = 0, y = 0, pseg = 'RAM', identity = True )
-
-    mapping.addGlobal( 'seg_boot_data'     , boot_data_vbase     , boot_data_size     , 'C_W_',
-                       vtype = 'BUFFER', x = 0, y = 0, pseg = 'RAM', identity = True )
-
-    mapping.addGlobal( 'seg_boot_buffer'   , boot_buffer_vbase   , boot_buffer_size   , 'C_W_',
-                       vtype = 'BUFFER', x = 0, y = 0, pseg = 'RAM', identity = True )
-
-    mapping.addGlobal( 'seg_boot_stack'    , boot_stack_vbase    , boot_stack_size    , 'C_W_',
-                       vtype = 'BUFFER', x = 0, y = 0, pseg = 'RAM', identity = True )
-
-    ### global vsegs for kernel
+    mapping.addGlobal( 'seg_boot_mapping', boot_mapping_vbase, boot_mapping_size,
+                       'C_W_', vtype = 'BLOB'  , x = 0, y = 0, pseg = 'RAM',
+                       identity = True )
+
+    mapping.addGlobal( 'seg_boot_code', boot_code_vbase, boot_code_size,
+                       'CXW_', vtype = 'BUFFER', x = 0, y = 0, pseg = 'RAM',
+                       identity = True )
+
+    mapping.addGlobal( 'seg_boot_data', boot_data_vbase, boot_data_size,
+                       'C_W_', vtype = 'BUFFER', x = 0, y = 0, pseg = 'RAM',
+                       identity = True )
+
+    mapping.addGlobal( 'seg_boot_stack', boot_stack_vbase, boot_stack_size,
+                       'C_W_', vtype = 'BUFFER', x = 0, y = 0, pseg = 'RAM',
+                       identity = True )
+
+    ### the code global vsegs for kernel can be replicated in all clusters
+    ### if the page tables are distributed in all clusters.
 
     if distributed_ptabs:
@@ -258 +257 @@
         mapping.addGlobal( 'seg_kernel_code', kernel_code_vbase, kernel_code_size,
                            'CXW_', vtype = 'ELF', x = 0 , y = 0 , pseg = 'RAM',
-                           binpath = 'build/kernel/kernel.elf' )
+                           binpath = 'build/kernel/kernel.elf', local = False )
 
         mapping.addGlobal( 'seg_kernel_init', kernel_init_vbase, kernel_init_size,
                            'CXW_', vtype = 'ELF', x = 0 , y = 0 , pseg = 'RAM',
-                           binpath = 'build/kernel/kernel.elf' )
-
-    mapping.addGlobal( 'seg_kernel_data'   , kernel_data_vbase   , kernel_data_size   , 'C_W_',
-                       vtype = 'ELF'   , x = 0, y = 0, pseg = 'RAM', binpath = 'build/kernel/kernel.elf' )
-
-    mapping.addGlobal( 'seg_kernel_uncdata', kernel_uncdata_vbase, kernel_uncdata_size, '__W_',
-                       vtype = 'ELF'   , x = 0, y = 0, pseg = 'RAM', binpath = 'build/kernel/kernel.elf' )
+                           binpath = 'build/kernel/kernel.elf', local = False )
+
+    ### shared global vsegs for kernel
+
+    mapping.addGlobal( 'seg_kernel_data', kernel_data_vbase, kernel_data_size,
+                       'C_W_', vtype = 'ELF', x = 0, y = 0, pseg = 'RAM',
+                       binpath = 'build/kernel/kernel.elf', local = False )
+
+    mapping.addGlobal( 'seg_kernel_uncdata', kernel_uncdata_vbase, kernel_uncdata_size,
+                       '__W_', vtype = 'ELF', x = 0, y = 0, pseg = 'RAM',
+                       binpath = 'build/kernel/kernel.elf', local = False )
 
     ### global vsegs for external peripherals / identity mapping
 
     mapping.addGlobal( 'seg_iob', iob_base, iob_size, '__W_',
-                       vtype = 'PERI', x = 0, y = 0, pseg = 'IOB', identity = True )
+                       vtype = 'PERI', x = 0, y = 0, pseg = 'IOB',
+                       identity = True )
 
     mapping.addGlobal( 'seg_bdv', bdv_base, bdv_size, '__W_',
-                       vtype = 'PERI', x = 0, y = 0, pseg = 'BDV', identity = True )
+                       vtype = 'PERI', x = 0, y = 0, pseg = 'BDV',
+                       identity = True )
 
     mapping.addGlobal( 'seg_tty', tty_base, tty_size, '__W_',
-                       vtype = 'PERI', x = 0, y = 0, pseg = 'TTY', identity = True )
+                       vtype = 'PERI', x = 0, y = 0, pseg = 'TTY',
+                       identity = True )
 
     mapping.addGlobal( 'seg_nic', nic_base, nic_size, '__W_',
-                       vtype = 'PERI', x = 0, y = 0, pseg = 'NIC', identity = True )
+                       vtype = 'PERI', x = 0, y = 0, pseg = 'NIC',
+                       identity = True )
 
     mapping.addGlobal( 'seg_cma', cma_base, cma_size, '__W_',
-                       vtype = 'PERI', x = 0, y = 0, pseg = 'CMA', identity = True )
+                       vtype = 'PERI', x = 0, y = 0, pseg = 'CMA',
+                       identity = True )
 
     mapping.addGlobal( 'seg_fbf', fbf_base, fbf_size, '__W_',
-                       vtype = 'PERI', x = 0, y = 0, pseg = 'FBF', identity = True )
+                       vtype = 'PERI', x = 0, y = 0, pseg = 'FBF',
+                       identity = True )
 
     mapping.addGlobal( 'seg_pic', pic_base, pic_size, '__W_',
-                       vtype = 'PERI', x = 0, y = 0, pseg = 'PIC', identity = True )
+                       vtype = 'PERI', x = 0, y = 0, pseg = 'PIC',
+                       identity = True )
+
 
     ### global vsegs for internal peripherals, and for schedulers

branches/reconfiguration/platforms/tsar_generic_iob/top.cpp

@@ -1397 +1397 @@
    // simulation loop
    struct timeval t1,t2;
-   const size_t stats_period = 100000; // cycles
-
-   if (ncycles == UINT_MAX)
-   {
-      int n = 0;
-      while(1)
-      {
-         gettimeofday(&t1, NULL);
-         sc_start(sc_core::sc_time(stats_period, SC_NS));
-         gettimeofday(&t2, NULL);
-
-         n += stats_period;
-
-         uint64_t ms1 = (uint64_t) t1.tv_sec  * 1000ULL +
-            (uint64_t) t1.tv_usec / 1000;
-         uint64_t ms2 = (uint64_t) t2.tv_sec  * 1000ULL +
-            (uint64_t) t2.tv_usec / 1000;
-         std::cerr << "### cycle = " << n
-            << " / frequency = "
-            << (double) stats_period / (double) (ms2 - ms1) << "Khz"
-            << std::endl;
-      }
-
-      return EXIT_SUCCESS;
-   }
-
-   gettimeofday(&t1, NULL);
-   for (size_t n = 1; n < ncycles; n++)
+
+   // cycles between stats
+   const size_t stats_period = 100000;
+   const size_t simul_period = debug_ok ? debug_period : stats_period;
+
+   for (size_t n = 0; n < ncycles; n += simul_period)
    {
       // stats display
-      if( (n % stats_period) == 0)
+      if((n % stats_period) == 0)
       {
-         gettimeofday(&t2, NULL);
-
-         uint64_t ms1 = (uint64_t) t1.tv_sec  * 1000ULL +
-            (uint64_t) t1.tv_usec / 1000;
-         uint64_t ms2 = (uint64_t) t2.tv_sec  * 1000ULL +
-            (uint64_t) t2.tv_usec / 1000;
-         std::cerr << "### cycle = " << n
-            << " / frequency = "
-            << (double) stats_period / (double) (ms2 - ms1) << "Khz"
-            << std::endl;
+         if (n > 0)
+         {
+            gettimeofday(&t2, NULL);
+
+            uint64_t ms1 = (uint64_t) t1.tv_sec  * 1000ULL +
+               (uint64_t) t1.tv_usec / 1000;
+            uint64_t ms2 = (uint64_t) t2.tv_sec  * 1000ULL +
+               (uint64_t) t2.tv_usec / 1000;
+            std::cerr << "### cycle = " << n << " / frequency (Khz) = "
+               << (double) stats_period / (double) (ms2 - ms1) << std::endl;
+         }
 
          gettimeofday(&t1, NULL);
@@ -1565 +1544 @@
       }
 
-      sc_start(sc_core::sc_time(1, SC_NS));
+      sc_start(sc_core::sc_time(simul_period, SC_NS));
    }
    return EXIT_SUCCESS;