Changeset 773 for branches/RWT/modules

Timestamp:

Aug 26, 2014, 6:05:42 PM (10 years ago)

Author:

meunier

Message:

RWT Branch:

• Corrected valgrind errors in the Memcache

File:

• branches/RWT/modules/vci_cc_vcache_wrapper/caba/source/src/vci_cc_vcache_wrapper.cpp (modified) (4 diffs)

branches/RWT/modules/vci_cc_vcache_wrapper/caba/source/src/vci_cc_vcache_wrapper.cpp

@@ -1173 +1173 @@
             // We register processor request
             r_icache_vaddr_save = m_ireq.addr;
+            paddr = (paddr_t) m_ireq.addr;
 
             // sytematic itlb access (if activated)
@@ -1188 +1189 @@
                                             &tlb_set ); // unused
             }
-            else
-            {
-                paddr = (paddr_t)m_ireq.addr;
-            }
+            // Not yet supported
+            //else if (vci_param::N > 32)
+            //{
+            //    paddr = paddr | ((paddr_t) r_icache_paddr_ext.read() << 32);
+            //}
+
 
             // systematic icache access (if activated)
@@ -2292 +2295 @@
         bool        wbuf_request       = false;     // request WBUF write in P1 stage
 
-
         // physical address computation : systematic DTLB access (if activated)
+        paddr = (paddr_t) m_dreq.addr;
         if ( m_dreq.valid )
         {
-
             if ( r_mmu_mode.read() & DATA_TLB_MASK )  // DTLB activated
             {
@@ -2311 +2313 @@
             else                                    // identity mapping
             {
-                paddr = (paddr_t)m_dreq.addr;
                 // we take into account the paddr extension
                 if (vci_param::N > 32)