Changeset 785 for branches/MESI/modules/vci_cc_vcache_wrapper/caba
- Timestamp:
- Sep 2, 2014, 6:25:53 PM (10 years ago)
- Location:
- branches/MESI/modules/vci_cc_vcache_wrapper/caba
- Files:
-
- 3 edited
Legend:
- Unmodified
- Added
- Removed
-
branches/MESI/modules/vci_cc_vcache_wrapper/caba/metadata/vci_cc_vcache_wrapper.sd
r670 r785 32 32 parameter.Reference('addr_size')) 33 33 ), 34 Uses('caba:dspin_ dhccp_param'),34 Uses('caba:dspin_hmesi_param'), 35 35 ], 36 36 -
branches/MESI/modules/vci_cc_vcache_wrapper/caba/source/include/vci_cc_vcache_wrapper.h
r719 r785 35 35 #include <inttypes.h> 36 36 #include <systemc> 37 37 38 #include "caba_base_module.h" 38 39 #include "multi_write_buffer.h" … … 42 43 #include "vci_initiator.h" 43 44 #include "dspin_interface.h" 44 #include "dspin_ dhccp_param.h"45 #include "dspin_hmesi_param.h" 45 46 #include "mapping_table.h" 46 47 #include "static_assert.h" -
branches/MESI/modules/vci_cc_vcache_wrapper/caba/source/src/vci_cc_vcache_wrapper.cpp
r719 r785 29 29 30 30 #include <cassert> 31 31 32 #include "arithmetics.h" 32 33 #include "../include/vci_cc_vcache_wrapper.h" … … 182 183 }; 183 184 185 #if 0 // causes compilation warnings if not used 184 186 const char *cache_state_str[] = { 185 187 "CACHE_SLOT_STATE_INVALID", … … 189 191 "CACHE_SLOT_STATE_ZOMBI", 190 192 }; 193 #endif 194 191 195 } 192 196 … … 3833 3837 r_cas_local_word.read(), 3834 3838 r_dcache_vci_cas_new.read()); 3835 3836 //r_dcache.write_dir( r_cas_local_way.read(),3837 // r_cas_local_set.read(),3838 // CACHE_SLOT_STATE_MODIFIED );3839 3839 } 3840 3840 … … 4323 4323 4324 4324 uint32_t rdata; 4325 size_t way ;4326 size_t set ;4325 size_t way = 0; // To avoid g++ warning 4326 size_t set = 0; // To avoid g++ warning 4327 4327 size_t word; 4328 4328 r_dcache.read_neutral(r_dcache_xtn_data_addr.read(), … … 5881 5881 if ( p_vci.rspval.read() ) 5882 5882 { 5883 if ( (p_vci.rerror.read()&0x1) != 0) // error reported5883 if ((p_vci.rerror.read() & 0x1) != 0) // error reported 5884 5884 { 5885 5885 r_vci_rsp_ins_error = true; … … 5947 5947 if ( p_vci.rspval.read() ) 5948 5948 { 5949 if ( (p_vci.rerror.read() &0x1) != 0 ) // error reported5949 if ( (p_vci.rerror.read() & 0x1) != 0 ) // error reported 5950 5950 { 5951 5951 r_vci_rsp_data_error = true; … … 5954 5954 else // no error reported 5955 5955 { 5956 5957 5958 5956 if ( r_vci_rsp_fifo_dcache.wok() ) 5959 5957 { … … 5961 5959 "The VCI response packet for data miss is too long"); 5962 5960 5963 r_vci_rsp_cpt 5964 vci_rsp_fifo_dcache_put 5965 vci_rsp_fifo_dcache_data 5966 5967 if ( p_vci.reop.read())5961 r_vci_rsp_cpt = r_vci_rsp_cpt.read() + 1; 5962 vci_rsp_fifo_dcache_put = true, 5963 vci_rsp_fifo_dcache_data = p_vci.rdata.read(); 5964 5965 if (p_vci.reop.read()) 5968 5966 { 5969 5967 r_dcache_rsp_state = ((p_vci.rpktid.read() & 0x8) == 0x8); // EXCLUSIVE = 0x8 5970 if (r_vci_rsp_cpt.read() != m_dcache_words - 1) std::cout << "assert on proc " << name() << std::endl; 5971 assert( (r_vci_rsp_cpt.read() == m_dcache_words - 1) and 5972 "The VCI response packet for data miss is too short"); 5973 5974 r_vci_rsp_fsm = RSP_IDLE; 5968 assert( (r_vci_rsp_cpt.read() == m_dcache_words - 1) and "The VCI response packet for data miss is too short"); 5969 5970 r_vci_rsp_fsm = RSP_IDLE; 5975 5971 } 5976 5972 } … … 5987 5983 "illegal VCI response packet for uncachable read data"); 5988 5984 5989 if ( (p_vci.rerror.read() &0x1) != 0 ) // error reported5985 if ( (p_vci.rerror.read() & 0x1) != 0 ) // error reported 5990 5986 { 5991 5987 r_vci_rsp_data_error = true; … … 6010 6006 if ( p_vci.rspval.read() ) 6011 6007 { 6012 if ( (p_vci.rerror.read() &0x1) != 0 ) // error reported6008 if ( (p_vci.rerror.read() & 0x1) != 0 ) // error reported 6013 6009 { 6014 6010 r_vci_rsp_data_error = true; … … 6211 6207 uint64_t receive_data = p_dspin_m2p.data.read(); 6212 6208 // initialize coherence packet type 6213 uint64_t receive_type = Dspin DhccpParam::dspin_get(receive_data,6214 Dspin DhccpParam::M2P_TYPE);6209 uint64_t receive_type = DspinHmesiParam::dspin_get(receive_data, 6210 DspinHmesiParam::M2P_TYPE); 6215 6211 // test for a broadcast 6216 if (Dspin DhccpParam::dspin_get(receive_data,DspinDhccpParam::M2P_BC))6212 if (DspinHmesiParam::dspin_get(receive_data,DspinHmesiParam::M2P_BC)) 6217 6213 { 6218 6214 r_cc_receive_fsm = CC_RECEIVE_BRDCAST_HEADER; 6219 6215 } 6220 6216 // test for a multi updt 6221 else if (receive_type == Dspin DhccpParam::TYPE_MULTI_UPDT_DATA)6217 else if (receive_type == DspinHmesiParam::TYPE_MULTI_UPDT_DATA) 6222 6218 { 6223 6219 r_cc_receive_fsm = CC_RECEIVE_DATA_UPDT_HEADER; 6224 6220 } 6225 else if (receive_type == Dspin DhccpParam::TYPE_MULTI_UPDT_INST)6221 else if (receive_type == DspinHmesiParam::TYPE_MULTI_UPDT_INST) 6226 6222 { 6227 6223 r_cc_receive_fsm = CC_RECEIVE_INS_UPDT_HEADER; 6228 6224 } 6229 6225 // test for a multi inval 6230 else if (receive_type == Dspin DhccpParam::TYPE_MULTI_INVAL_DATA)6226 else if (receive_type == DspinHmesiParam::TYPE_MULTI_INVAL_DATA) 6231 6227 { 6232 6228 r_cc_receive_fsm = CC_RECEIVE_DATA_INVAL_HEADER; … … 6247 6243 not (r_cc_receive_dcache_req.read())) 6248 6244 { 6249 r_cc_receive_dcache_srcid = Dspin DhccpParam::dspin_get(receive_data,6250 Dspin DhccpParam::BROADCAST_SRCID);6251 6252 r_cc_receive_dcache_inval_is_config = Dspin DhccpParam::dspin_get(receive_data,6253 Dspin DhccpParam::BRDCAST_IS_CONFIG);6254 6255 r_cc_receive_dcache_is_shared = Dspin DhccpParam::dspin_get(receive_data,6256 Dspin DhccpParam::BRDCAST_IS_SHARED);6257 6258 r_cc_receive_fsm 6245 r_cc_receive_dcache_srcid = DspinHmesiParam::dspin_get(receive_data, 6246 DspinHmesiParam::BROADCAST_SRCID); 6247 6248 r_cc_receive_dcache_inval_is_config = DspinHmesiParam::dspin_get(receive_data, 6249 DspinHmesiParam::BRDCAST_IS_CONFIG); 6250 6251 r_cc_receive_dcache_is_shared = DspinHmesiParam::dspin_get(receive_data, 6252 DspinHmesiParam::BRDCAST_IS_SHARED); 6253 6254 r_cc_receive_fsm = CC_RECEIVE_BRDCAST_NLINE; 6259 6255 } 6260 6256 break; … … 6278 6274 // request dcache to handle the BROADCAST 6279 6275 r_cc_receive_dcache_req = true; 6280 r_cc_receive_dcache_nline = Dspin DhccpParam::dspin_get(receive_data,6281 Dspin DhccpParam::BROADCAST_NLINE);6276 r_cc_receive_dcache_nline = DspinHmesiParam::dspin_get(receive_data, 6277 DspinHmesiParam::BROADCAST_NLINE); 6282 6278 r_cc_receive_dcache_type = CC_TYPE_BRDCAST; 6283 6279 // request icache to handle the BROADCAST 6284 6280 r_cc_receive_icache_req = true; 6285 r_cc_receive_icache_nline = Dspin DhccpParam::dspin_get(receive_data,6286 Dspin DhccpParam::BROADCAST_NLINE);6281 r_cc_receive_icache_nline = DspinHmesiParam::dspin_get(receive_data, 6282 DspinHmesiParam::BROADCAST_NLINE); 6287 6283 r_cc_receive_icache_type = CC_TYPE_INVAL; 6288 6284 // get back to idle state … … 6303 6299 // sample updt tab index in the HEADER, then skip to second flit 6304 6300 r_cc_receive_fsm = CC_RECEIVE_DATA_INVAL_NLINE; 6305 r_cc_receive_dcache_inval_is_config = Dspin DhccpParam::dspin_get(receive_data,6306 Dspin DhccpParam::MULTI_INVAL_IS_CONFIG);6307 6308 r_cc_receive_dcache_is_shared = Dspin DhccpParam::dspin_get(receive_data,6309 Dspin DhccpParam::MULTI_INVAL_IS_SHARED);6301 r_cc_receive_dcache_inval_is_config = DspinHmesiParam::dspin_get(receive_data, 6302 DspinHmesiParam::MULTI_INVAL_IS_CONFIG); 6303 6304 r_cc_receive_dcache_is_shared = DspinHmesiParam::dspin_get(receive_data, 6305 DspinHmesiParam::MULTI_INVAL_IS_SHARED); 6310 6306 } 6311 6307 break; … … 6329 6325 // request dcache to handle the INVAL 6330 6326 r_cc_receive_dcache_req = true; 6331 r_cc_receive_dcache_nline = Dspin DhccpParam::dspin_get(receive_data,DspinDhccpParam::MULTI_INVAL_NLINE);6327 r_cc_receive_dcache_nline = DspinHmesiParam::dspin_get(receive_data,DspinHmesiParam::MULTI_INVAL_NLINE); 6332 6328 r_cc_receive_dcache_type = CC_TYPE_INVAL; 6333 6329 // get back to idle state … … 6348 6344 // request icache to handle the INVAL 6349 6345 r_cc_receive_icache_req = true; 6350 r_cc_receive_icache_nline = Dspin DhccpParam::dspin_get(receive_data,DspinDhccpParam::MULTI_INVAL_NLINE);6346 r_cc_receive_icache_nline = DspinHmesiParam::dspin_get(receive_data,DspinHmesiParam::MULTI_INVAL_NLINE); 6351 6347 r_cc_receive_icache_type = CC_TYPE_INVAL; 6352 6348 // get back to idle state … … 6365 6361 if (not r_cc_receive_dcache_req.read()) 6366 6362 { 6367 r_cc_receive_dcache_updt_tab_idx = Dspin DhccpParam::dspin_get(receive_data,DspinDhccpParam::CC_UPDT_IVT_INDEX);6363 r_cc_receive_dcache_updt_tab_idx = DspinHmesiParam::dspin_get(receive_data,DspinHmesiParam::CC_UPDT_IVT_INDEX); 6368 6364 r_cc_receive_fsm = CC_RECEIVE_DATA_UPDT_NLINE; 6369 6365 break; … … 6380 6376 if (not r_cc_receive_icache_req.read()) 6381 6377 { 6382 r_cc_receive_icache_updt_tab_idx = Dspin DhccpParam::dspin_get(receive_data,DspinDhccpParam::CC_UPDT_IVT_INDEX);6378 r_cc_receive_icache_updt_tab_idx = DspinHmesiParam::dspin_get(receive_data,DspinHmesiParam::CC_UPDT_IVT_INDEX); 6383 6379 r_cc_receive_fsm = CC_RECEIVE_INS_UPDT_NLINE; 6384 6380 break; … … 6397 6393 { 6398 6394 r_cc_receive_dcache_req = true; 6399 r_cc_receive_dcache_nline = Dspin DhccpParam::dspin_get(receive_data,DspinDhccpParam::MULTI_UPDT_NLINE);6395 r_cc_receive_dcache_nline = DspinHmesiParam::dspin_get(receive_data,DspinHmesiParam::MULTI_UPDT_NLINE); 6400 6396 r_cc_receive_dcache_type = CC_TYPE_UPDT; 6401 6397 // get back to idle state … … 6415 6411 { 6416 6412 r_cc_receive_icache_req = true; 6417 r_cc_receive_icache_nline = Dspin DhccpParam::dspin_get(receive_data,DspinDhccpParam::MULTI_UPDT_NLINE);6413 r_cc_receive_icache_nline = DspinHmesiParam::dspin_get(receive_data,DspinHmesiParam::MULTI_UPDT_NLINE); 6418 6414 r_cc_receive_icache_type = CC_TYPE_UPDT; 6419 6415 // get back to idle state … … 6428 6424 ///////////////// DSPIN CLACK interface /////////////// 6429 6425 6430 uint64_t clack_type = Dspin DhccpParam::dspin_get(r_dspin_clack_flit.read(),6431 Dspin DhccpParam::CLACK_TYPE);6432 6433 size_t clack_way = Dspin DhccpParam::dspin_get(r_dspin_clack_flit.read(),6434 Dspin DhccpParam::CLACK_WAY);6435 6436 size_t clack_set = Dspin DhccpParam::dspin_get(r_dspin_clack_flit.read(),6437 Dspin DhccpParam::CLACK_SET);6426 uint64_t clack_type = DspinHmesiParam::dspin_get(r_dspin_clack_flit.read(), 6427 DspinHmesiParam::CLACK_TYPE); 6428 6429 size_t clack_way = DspinHmesiParam::dspin_get(r_dspin_clack_flit.read(), 6430 DspinHmesiParam::CLACK_WAY); 6431 6432 size_t clack_set = DspinHmesiParam::dspin_get(r_dspin_clack_flit.read(), 6433 DspinHmesiParam::CLACK_SET); 6438 6434 6439 6435 bool dspin_clack_get = false; 6440 bool dcache_clack_request = (clack_type == Dspin DhccpParam::TYPE_CLACK_DATA);6441 bool icache_clack_request = (clack_type == Dspin DhccpParam::TYPE_CLACK_INST);6436 bool dcache_clack_request = (clack_type == DspinHmesiParam::TYPE_CLACK_DATA); 6437 bool icache_clack_request = (clack_type == DspinHmesiParam::TYPE_CLACK_INST); 6442 6438 6443 6439 if (r_dspin_clack_req.read()) … … 6676 6672 { 6677 6673 // initialize dspin send data 6678 // DspinDhccpParam::dspin_set(dspin_send_data, 6679 // 0, 6680 // DspinDhccpParam::P2M_EOP); 6681 DspinDhccpParam::dspin_set(dspin_send_data, 6674 DspinHmesiParam::dspin_set(dspin_send_data, 6682 6675 m_cc_global_id, 6683 Dspin DhccpParam::CLEANUP_SRCID);6684 Dspin DhccpParam::dspin_set(dspin_send_data,6676 DspinHmesiParam::CLEANUP_SRCID); 6677 DspinHmesiParam::dspin_set(dspin_send_data, 6685 6678 0, 6686 Dspin DhccpParam::P2M_BC);6679 DspinHmesiParam::P2M_BC); 6687 6680 6688 6681 if(r_cc_send_last_client.read() == 0) // dcache active request … … 6690 6683 uint64_t dest = (uint64_t) r_dcache_cc_send_nline.read() 6691 6684 >> (m_nline_width - m_x_width - m_y_width) 6692 << (Dspin DhccpParam::GLOBALID_WIDTH - m_x_width - m_y_width);6693 Dspin DhccpParam::dspin_set(dspin_send_data,6685 << (DspinHmesiParam::GLOBALID_WIDTH - m_x_width - m_y_width); 6686 DspinHmesiParam::dspin_set(dspin_send_data, 6694 6687 dest, 6695 Dspin DhccpParam::CLEANUP_DEST);6696 6697 Dspin DhccpParam::dspin_set(dspin_send_data,6688 DspinHmesiParam::CLEANUP_DEST); 6689 6690 DspinHmesiParam::dspin_set(dspin_send_data, 6698 6691 (r_dcache_cc_send_nline.read() & 0x300000000ULL)>>32, 6699 Dspin DhccpParam::CLEANUP_NLINE_MSB);6700 6701 Dspin DhccpParam::dspin_set(dspin_send_data,6692 DspinHmesiParam::CLEANUP_NLINE_MSB); 6693 6694 DspinHmesiParam::dspin_set(dspin_send_data, 6702 6695 r_dcache_cc_send_way.read(), 6703 Dspin DhccpParam::CLEANUP_WAY_INDEX);6704 6705 Dspin DhccpParam::dspin_set(dspin_send_data,6706 Dspin DhccpParam::TYPE_CLEANUP_DATA,6707 Dspin DhccpParam::P2M_TYPE);6708 6709 Dspin DhccpParam::dspin_set(dspin_send_data,6696 DspinHmesiParam::CLEANUP_WAY_INDEX); 6697 6698 DspinHmesiParam::dspin_set(dspin_send_data, 6699 DspinHmesiParam::TYPE_CLEANUP_DATA, 6700 DspinHmesiParam::P2M_TYPE); 6701 6702 DspinHmesiParam::dspin_set(dspin_send_data, 6710 6703 (r_dcache_cc_line_no_shared.read() and (r_cc_send_last_client.read() == 0) and not r_dcache_cc_send_inval_is_config.read()), 6711 Dspin DhccpParam::DATA_NO_SHARED);6704 DspinHmesiParam::DATA_NO_SHARED); 6712 6705 } 6713 6706 else // icache active request … … 6715 6708 uint64_t dest = (uint64_t) r_icache_cc_send_nline.read() 6716 6709 >> (m_nline_width - m_x_width - m_y_width) 6717 << (Dspin DhccpParam::GLOBALID_WIDTH - m_x_width - m_y_width);6718 6719 Dspin DhccpParam::dspin_set(dspin_send_data,6710 << (DspinHmesiParam::GLOBALID_WIDTH - m_x_width - m_y_width); 6711 6712 DspinHmesiParam::dspin_set(dspin_send_data, 6720 6713 dest, 6721 Dspin DhccpParam::CLEANUP_DEST);6722 6723 Dspin DhccpParam::dspin_set(dspin_send_data,6714 DspinHmesiParam::CLEANUP_DEST); 6715 6716 DspinHmesiParam::dspin_set(dspin_send_data, 6724 6717 (r_icache_cc_send_nline.read() & 0x300000000ULL)>>32, 6725 Dspin DhccpParam::CLEANUP_NLINE_MSB);6726 6727 Dspin DhccpParam::dspin_set(dspin_send_data,6718 DspinHmesiParam::CLEANUP_NLINE_MSB); 6719 6720 DspinHmesiParam::dspin_set(dspin_send_data, 6728 6721 r_icache_cc_send_way.read(), 6729 Dspin DhccpParam::CLEANUP_WAY_INDEX);6730 6731 Dspin DhccpParam::dspin_set(dspin_send_data,6732 Dspin DhccpParam::TYPE_CLEANUP_INST,6733 Dspin DhccpParam::P2M_TYPE);6734 6735 Dspin DhccpParam::dspin_set(dspin_send_data,6722 DspinHmesiParam::CLEANUP_WAY_INDEX); 6723 6724 DspinHmesiParam::dspin_set(dspin_send_data, 6725 DspinHmesiParam::TYPE_CLEANUP_INST, 6726 DspinHmesiParam::P2M_TYPE); 6727 6728 DspinHmesiParam::dspin_set(dspin_send_data, 6736 6729 0, 6737 Dspin DhccpParam::DATA_NO_SHARED);6730 DspinHmesiParam::DATA_NO_SHARED); 6738 6731 6739 6732 … … 6751 6744 if(r_cc_send_last_client.read() == 0) // dcache active request 6752 6745 { 6753 Dspin DhccpParam::dspin_set(dspin_send_data,6746 DspinHmesiParam::dspin_set(dspin_send_data, 6754 6747 r_dcache_cc_send_nline.read() & 0xFFFFFFFFULL, 6755 Dspin DhccpParam::CLEANUP_NLINE_LSB);6748 DspinHmesiParam::CLEANUP_NLINE_LSB); 6756 6749 } 6757 6750 else // icache active request 6758 6751 { 6759 Dspin DhccpParam::dspin_set(dspin_send_data,6752 DspinHmesiParam::dspin_set(dspin_send_data, 6760 6753 r_icache_cc_send_nline.read() & 0xFFFFFFFFULL, 6761 Dspin DhccpParam::CLEANUP_NLINE_LSB);6754 DspinHmesiParam::CLEANUP_NLINE_LSB); 6762 6755 } 6763 6756 // send flit … … 6770 6763 case CC_SEND_DATA_UPDT: 6771 6764 { 6772 Dspin DhccpParam::dspin_set(dspin_send_data,6765 DspinHmesiParam::dspin_set(dspin_send_data, 6773 6766 r_cc_send_data_fifo.read(), 6774 Dspin DhccpParam::CLEANUP_DATA_UPDT);6767 DspinHmesiParam::CLEANUP_DATA_UPDT); 6775 6768 6776 6769 p_dspin_p2m.data = dspin_send_data; … … 6784 6777 { 6785 6778 // initialize dspin send data 6786 Dspin DhccpParam::dspin_set(dspin_send_data,6779 DspinHmesiParam::dspin_set(dspin_send_data, 6787 6780 0, 6788 Dspin DhccpParam::P2M_BC);6789 Dspin DhccpParam::dspin_set(dspin_send_data,6790 Dspin DhccpParam::TYPE_MULTI_ACK,6791 Dspin DhccpParam::P2M_TYPE);6781 DspinHmesiParam::P2M_BC); 6782 DspinHmesiParam::dspin_set(dspin_send_data, 6783 DspinHmesiParam::TYPE_MULTI_ACK, 6784 DspinHmesiParam::P2M_TYPE); 6792 6785 6793 6786 if(r_cc_send_last_client.read() == 0) // dcache active request … … 6795 6788 uint64_t dest = (uint64_t) r_dcache_cc_send_nline.read() 6796 6789 >> (m_nline_width - m_x_width - m_y_width) 6797 << (Dspin DhccpParam::GLOBALID_WIDTH - m_x_width - m_y_width);6790 << (DspinHmesiParam::GLOBALID_WIDTH - m_x_width - m_y_width); 6798 6791 6799 Dspin DhccpParam::dspin_set(dspin_send_data,6792 DspinHmesiParam::dspin_set(dspin_send_data, 6800 6793 dest, 6801 Dspin DhccpParam::MULTI_ACK_DEST);6802 6803 Dspin DhccpParam::dspin_set(dspin_send_data,6794 DspinHmesiParam::MULTI_ACK_DEST); 6795 6796 DspinHmesiParam::dspin_set(dspin_send_data, 6804 6797 r_dcache_cc_send_multi_ack_miss.read(), 6805 Dspin DhccpParam::MULTI_ACK_UPDT_MISS);6806 6807 Dspin DhccpParam::dspin_set(dspin_send_data,6798 DspinHmesiParam::MULTI_ACK_UPDT_MISS); 6799 6800 DspinHmesiParam::dspin_set(dspin_send_data, 6808 6801 r_dcache_cc_send_updt_tab_idx.read(), 6809 Dspin DhccpParam::MULTI_ACK_UPDT_INDEX);6802 DspinHmesiParam::MULTI_ACK_UPDT_INDEX); 6810 6803 } 6811 6804 else // icache active request … … 6813 6806 uint64_t dest = (uint64_t) r_icache_cc_send_nline.read() 6814 6807 >> (m_nline_width - m_x_width - m_y_width) 6815 << (Dspin DhccpParam::GLOBALID_WIDTH - m_x_width - m_y_width);6808 << (DspinHmesiParam::GLOBALID_WIDTH - m_x_width - m_y_width); 6816 6809 6817 Dspin DhccpParam::dspin_set(dspin_send_data,6810 DspinHmesiParam::dspin_set(dspin_send_data, 6818 6811 dest, 6819 Dspin DhccpParam::MULTI_ACK_DEST);6820 6821 Dspin DhccpParam::dspin_set(dspin_send_data,6812 DspinHmesiParam::MULTI_ACK_DEST); 6813 6814 DspinHmesiParam::dspin_set(dspin_send_data, 6822 6815 r_icache_cc_send_updt_tab_idx.read(), 6823 Dspin DhccpParam::MULTI_ACK_UPDT_INDEX);6816 DspinHmesiParam::MULTI_ACK_UPDT_INDEX); 6824 6817 } 6825 6818 // send flit … … 6913 6906 6914 6907 6915 int clack_type = Dspin DhccpParam::dspin_get(r_dspin_clack_flit.read(),6916 Dspin DhccpParam::CLACK_TYPE);6908 int clack_type = DspinHmesiParam::dspin_get(r_dspin_clack_flit.read(), 6909 DspinHmesiParam::CLACK_TYPE); 6917 6910 6918 6911 bool dspin_clack_get = false; 6919 bool dcache_clack_request = (clack_type == Dspin DhccpParam::TYPE_CLACK_DATA);6920 bool icache_clack_request = (clack_type == Dspin DhccpParam::TYPE_CLACK_INST);6912 bool dcache_clack_request = (clack_type == DspinHmesiParam::TYPE_CLACK_DATA); 6913 bool icache_clack_request = (clack_type == DspinHmesiParam::TYPE_CLACK_INST); 6921 6914 6922 6915 if (r_dspin_clack_req.read())
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