Changeset 792
- Timestamp:
- Sep 9, 2014, 11:14:21 AM (10 years ago)
- File:
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- 1 edited
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trunk/platforms/tsar_generic_leti/top.cpp
r708 r792 1 1 ///////////////////////////////////////////////////////////////////////// 2 2 // File: top.cpp (for tsar_generic_leti) 3 // Author: Alain Greiner 3 // Author: Alain Greiner 4 4 // Copyright: UPMC/LIP6 5 5 // Date : february 2014 … … 9 9 // with the VLSI Hardware prototype developped by CEA-LETI and LIP6 10 10 // in the framework of the SHARP project. 11 // 11 // 12 12 // The processor is a MIPS32 processor wrapped in a GDB server 13 13 // (this is defined in the tsar_xbar_cluster). 14 // 14 // 15 15 // It does not use an external ROM, as the boot code is (pre)loaded 16 16 // in cluster (0,0) memory at address 0x0. … … 23 23 // The number of clusters cannot be larger than 128. 24 24 // The number of processors per cluster cannot be larger than 4. 25 // 25 // 26 26 // Each cluster contains: 27 27 // - 5 dspin_local_crossbar (local interconnect) … … 43 43 // that must be considered as an extension of this top.cpp file. 44 44 // 45 // Besides the hardware components in clusters, "external" peripherals 45 // Besides the hardware components in clusters, "external" peripherals 46 46 // are connected to an external IO bus (implemented as a vci_local_crossbar): 47 // - one disk controller 48 // - one multi-channel ethernet controller 47 // - one disk controller 48 // - one multi-channel ethernet controller 49 49 // - one multi-channel chained buffer dma controller 50 // - one multi-channel tty controller 51 // - one frame buffer controller 50 // - one multi-channel tty controller 51 // - one frame buffer controller 52 52 // - one 32 channels iopic controller 53 53 // 54 // This IOBUS is connected to the north port of the DIR_CMD 54 // This IOBUS is connected to the north port of the DIR_CMD 55 55 // and DIR_RSP routers, in cluster(X_SIZE-1, Y_SIZE-1). 56 56 // For all external peripherals, the hardware interrupts (HWI) are 57 57 // translated to write interrupts (WTI) by the iopic component: 58 58 // - IOPIC HWI[1:0] connected to IRQ_NIC_RX[1:0] 59 // - IOPIC HWI[3:2] connected to IRQ_NIC_TX[1:0] 59 // - IOPIC HWI[3:2] connected to IRQ_NIC_TX[1:0] 60 60 // - IOPIC HWI[7:4] connected to IRQ_CMA_TX[3:0]] 61 61 // - IOPIC HWI[8] connected to IRQ_BDEV … … 73 73 // - NB_TTY_CHANNELS : number of TTY channels in I/O cluster (8 max) 74 74 // - NB_NIC_CHANNELS : number of NIC channels in I/O cluster (2 max) 75 // 75 // 76 76 // Some other hardware parameters are not used when compiling the OS, 77 77 // and are only defined in this top.cpp file: 78 // - XRAM_LATENCY : external ram latency 78 // - XRAM_LATENCY : external ram latency 79 79 // - MEMC_WAYS : L2 cache number of ways 80 80 // - MEMC_SETS : L2 cache number of sets … … 85 85 // - FBUF_X_SIZE : width of frame buffer (pixels) 86 86 // - FBUF_Y_SIZE : heigth of frame buffer (lines) 87 // - BDEV_IMAGE_NAME : file pathname for block device 87 // - BDEV_IMAGE_NAME : file pathname for block device 88 88 // - NIC_RX_NAME : file pathname for NIC received packets 89 89 // - NIC_TX_NAME : file pathname for NIC transmited packets … … 93 93 // General policy for 40 bits physical address decoding: 94 94 // All physical segments base addresses are multiple of 1 Mbytes 95 // (=> the 24 LSB bits = 0, and the 16 MSB bits define the target) 95 // (=> the 24 LSB bits = 0, and the 16 MSB bits define the target) 96 96 // The (X_WIDTH + Y_WIDTH) MSB bits (left aligned) define 97 97 // the cluster index, and the LADR bits define the local index: … … 127 127 #include "alloc_elems.h" 128 128 129 ////////////////////////////////////////////////////////////////////////////////////////// 130 // Parameters depending on the OS and software application 131 // - path to hard_config file 132 // - path to binary code for the RAM loader 133 // - path to disk image for RAMDISK loader 134 // - path to disk image for IOC device 135 ////////////////////////////////////////////////////////////////////////////////////////// 136 137 #define USE_GIET_VM 1 138 #define USE_GIET_TSAR 0 139 140 #if ( USE_GIET_VM and USE_GIET_TSAR ) 141 #error "Can't use Two different OS" 142 #endif 143 144 #if ( (not USE_GIET_VM) and (not USE_GIET_TSAR) ) 145 #error "You need to specify one OS" 146 #endif 147 148 #if USE_GIET_TSAR 149 #include "hard_config.h" 150 #define BINARY_PATH_FOR_LOADER "../../softs/soft_transpose_giet/bin.soft" 151 #define DISK_IMAGE_PATH_FOR_IOC "../../softs/soft_transpose_giet/images.raw" 152 #define RAMDISK_PATH_FOR_LOADER DISK_IMAGE_PATH_FOR_IOC "@0x00800000:" 153 #endif 154 155 #if USE_GIET_VM 156 #include "hard_config.h" 157 #define BINARY_PATH_FOR_LOADER "../../softs/tsar_boot/preloader.elf" 158 #define DISK_IMAGE_PATH_FOR_IOC "../../../giet_vm/hdd/virt_hdd.dmg" 159 #define RAMDISK_PATH_FOR_LOADER DISK_IMAGE_PATH_FOR_IOC "@0x02000000:" 160 #endif 129 #include "hard_config.h" 161 130 162 131 /////////////////////////////////////////////////// … … 176 145 177 146 /////////////////////////////////////////////////////////// 178 // DSPIN parameters 147 // DSPIN parameters 179 148 /////////////////////////////////////////////////////////// 180 149 … … 183 152 184 153 /////////////////////////////////////////////////////////// 185 // VCI parameters 154 // VCI parameters 186 155 /////////////////////////////////////////////////////////// 187 156 … … 200 169 201 170 ///////////////////////////////////////////////////////////////////////////////////////// 202 // Secondary Hardware Parameters 171 // Secondary Hardware Parameters 203 172 ///////////////////////////////////////////////////////////////////////////////////////// 204 205 #define RESET_ADDRESS 0x0206 173 207 174 #define MAX_TTY_CHANNELS 8 … … 210 177 211 178 #define XRAM_LATENCY 0 212 #define XRAM_SIZE 0x04000000 // 64 Mbytes per cluster213 179 214 180 #define MEMC_WAYS 16 … … 220 186 #define L1_DWAYS 4 221 187 #define L1_DSETS 64 222 223 #define FBUF_X_SIZE 128224 #define FBUF_Y_SIZE 128225 188 226 189 #define NIC_MAC4 0XBABEF00D … … 235 198 236 199 /////////////////////////////////////////////////////////////////////////////////////// 237 // DEBUG Parameters default values 200 // DEBUG Parameters default values 238 201 /////////////////////////////////////////////////////////////////////////////////////// 239 202 … … 241 204 242 205 /////////////////////////////////////////////////////////////////////////////////////// 243 // LOCAL TGTID & SRCID definition 206 // LOCAL TGTID & SRCID definition 244 207 // For all components: global TGTID = global SRCID = cluster_index 245 208 /////////////////////////////////////////////////////////////////////////////////////// … … 258 221 #define IOPI_SRCID NB_PROCS_MAX + 2 259 222 260 //////////////////////////////////////////////////////////////////////////////////////261 // Physical segments definition262 //////////////////////////////////////////////////////////////////////////////////////263 // - 3 segments are replicated in all clusters264 // - 2 segments are only in cluster[0,0]265 // - 4 segments are only in cluster [X_SIZE-1,Y_SIZE]266 // The following values are for segments in cluster 0,267 // and these 32 bits values must be concatenate with the cluster268 // index (on 8 bits) to obtain the 40 bits address.269 //////////////////////////////////////////////////////////////////////////////////////270 271 // in cluster [0,0] & [X_SIZE-1,Y_SIZE]272 273 #define MTTY_BASE 0xF4000000274 #define MTTY_SIZE 0x00001000 // 4 Kbytes275 276 #define BDEV_BASE 0xF2000000277 #define BDEV_SIZE 0x00001000 // 4 Kbytes278 279 // in cluster [X_SIZE-1,Y_SIZE]280 281 #define FBUF_BASE 0xF3000000282 #define FBUF_SIZE (FBUF_X_SIZE * FBUF_Y_SIZE * 2)283 284 #define MNIC_BASE 0xF7000000285 #define MNIC_SIZE 0x00800000 // 512 Kbytes (for 8 channels)286 287 #define CDMA_BASE 0xF8000000288 #define CDMA_SIZE 0x00004000 * NB_CMA_CHANNELS289 290 #define IOPI_BASE 0xF9000000291 #define IOPI_SIZE 0x00001000 // 4 Kbytes292 293 // replicated segments : address is extended to 40 bits by cluster_xy294 295 #define MEMC_BASE 0x00000000296 #define MEMC_SIZE XRAM_SIZE297 298 #define MCFG_BASE 0xE0000000299 #define MCFG_SIZE 0x00001000 // 4 Kbytes300 301 #define XICU_BASE 0xF0000000302 #define XICU_SIZE 0x00001000 // 4 Kbytes303 304 223 bool stop_called = false; 305 224 … … 317 236 bool trace_proc_ok = false; // detailed proc trace activated 318 237 size_t trace_memc_ok = false; // detailed memc trace activated 319 size_t trace_memc_id = 0; // index of memc to be traced 238 size_t trace_memc_id = 0; // index of memc to be traced 320 239 size_t trace_proc_id = 0; // index of proc to be traced 321 240 uint32_t frozen_cycles = MAX_FROZEN_CYCLES; 322 char soft_name[256] = BINARY_PATH_FOR_LOADER;323 char disk_name[256] = DISK_IMAGE_PATH_FOR_IOC;324 char ramdisk_name[256] = RAMDISK_PATH_FOR_LOADER;241 char soft_name[256] = "soft.elf"; 242 char disk_name[256] = "disk.img"; 243 char ramdisk_name[256] = "disk.img@0x02000000:"; 325 244 struct timeval t1,t2; 326 245 uint64_t ms1,ms2; … … 364 283 else if ((strcmp(argv[n], "-SOFT") == 0) && ((n + 1) < argc)) 365 284 { 366 strcpy(soft_name, argv[n + 1]); 285 strcpy(soft_name, argv[n + 1]); 367 286 } 368 287 else if ((strcmp(argv[n], "-DISK") == 0) && ((n + 1) < argc)) … … 372 291 else if ((strcmp(argv[n], "-RAMDISK") == 0) && ((n + 1) < argc)) 373 292 { 374 strcpy(ramdisk_name, argv[n + 1]); 293 strcpy(ramdisk_name, argv[n + 1]); 375 294 } 376 295 else if ((strcmp(argv[n], "-THREADS") == 0) && ((n + 1) < argc)) … … 404 323 405 324 // checking hardware parameters 406 assert( ((X_SIZE==1) or (X_SIZE==2) or (X_SIZE==4) or (X_SIZE==8) or (X_SIZE==16)) and 325 assert( ((X_SIZE==1) or (X_SIZE==2) or (X_SIZE==4) or (X_SIZE==8) or 326 (X_SIZE==16)) and 407 327 "Illegal X_SIZE parameter" ); 408 328 409 assert( ((Y_SIZE==1) or (Y_SIZE==2) or (Y_SIZE==4) or (Y_SIZE==8)) and 329 assert( ((Y_SIZE==1) or (Y_SIZE==2) or (Y_SIZE==4) or (Y_SIZE==8)) and 410 330 "Illegal Y_SIZE parameter" ); 411 331 … … 427 347 assert( (X_WIDTH == 4) and (Y_WIDTH == 4) and 428 348 "ERROR: you must have X_WIDTH == Y_WIDTH == 4"); 429 349 430 350 std::cout << std::endl; 431 351 … … 483 403 /////////////////////////////////////// 484 404 485 MappingTable maptabd(vci_address_width, 486 IntTab(X_WIDTH + Y_WIDTH, 16 - X_WIDTH - Y_WIDTH), 487 IntTab(X_WIDTH + Y_WIDTH, vci_srcid_width - X_WIDTH - Y_WIDTH), 405 MappingTable maptabd(vci_address_width, 406 IntTab(X_WIDTH + Y_WIDTH, 16 - X_WIDTH - Y_WIDTH), 407 IntTab(X_WIDTH + Y_WIDTH, vci_srcid_width - X_WIDTH - Y_WIDTH), 488 408 0x00FF000000ULL); 489 409 … … 498 418 std::ostringstream si; 499 419 si << "seg_xicu_" << x << "_" << y; 500 maptabd.add(Segment(si.str(), XICU_BASE + offset, XICU_SIZE,420 maptabd.add(Segment(si.str(), SEG_XCU_BASE + offset, SEG_XCU_SIZE, 501 421 IntTab(cluster(x,y),XICU_TGTID), false)); 502 422 503 423 std::ostringstream sd; 504 424 sd << "seg_mcfg_" << x << "_" << y; 505 maptabd.add(Segment(sd.str(), MCFG_BASE + offset, MCFG_SIZE,425 maptabd.add(Segment(sd.str(), SEG_MMC_BASE + offset, SEG_MMC_SIZE, 506 426 IntTab(cluster(x,y),MEMC_TGTID), false)); 507 427 508 428 std::ostringstream sh; 509 429 sh << "seg_memc_" << x << "_" << y; 510 maptabd.add(Segment(sh.str(), MEMC_BASE + offset, MEMC_SIZE,430 maptabd.add(Segment(sh.str(), SEG_RAM_BASE + offset, SEG_RAM_SIZE, 511 431 IntTab(cluster(x,y),MEMC_TGTID), true)); 512 432 } … … 514 434 515 435 // segments for peripherals in cluster(0,0) 516 maptabd.add(Segment("seg_tty0", MTTY_BASE, MTTY_SIZE,436 maptabd.add(Segment("seg_tty0", SEG_TTY_BASE, SEG_TTY_SIZE, 517 437 IntTab(cluster(0,0),MTTY_TGTID), false)); 518 438 519 maptabd.add(Segment("seg_ioc0", BDEV_BASE, BDEV_SIZE,439 maptabd.add(Segment("seg_ioc0", SEG_IOC_BASE, SEG_IOC_SIZE, 520 440 IntTab(cluster(0,0),BDEV_TGTID), false)); 521 441 … … 524 444 offset = ((sc_uint<vci_address_width>)cluster(X_SIZE-1,Y_SIZE)) << 32; 525 445 526 maptabd.add(Segment("seg_mtty", MTTY_BASE + offset, MTTY_SIZE,446 maptabd.add(Segment("seg_mtty", SEG_TTY_BASE + offset, SEG_TTY_SIZE, 527 447 IntTab(cluster(X_SIZE-1, Y_SIZE),MTTY_TGTID), false)); 528 448 529 maptabd.add(Segment("seg_fbuf", FBUF_BASE + offset, FBUF_SIZE,449 maptabd.add(Segment("seg_fbuf", SEG_FBF_BASE + offset, SEG_FBF_SIZE, 530 450 IntTab(cluster(X_SIZE-1, Y_SIZE),FBUF_TGTID), false)); 531 451 532 maptabd.add(Segment("seg_bdev", BDEV_BASE + offset, BDEV_SIZE,452 maptabd.add(Segment("seg_bdev", SEG_IOC_BASE + offset, SEG_IOC_SIZE, 533 453 IntTab(cluster(X_SIZE-1, Y_SIZE),BDEV_TGTID), false)); 534 454 535 maptabd.add(Segment("seg_mnic", MNIC_BASE + offset, MNIC_SIZE,455 maptabd.add(Segment("seg_mnic", SEG_NIC_BASE + offset, SEG_NIC_SIZE, 536 456 IntTab(cluster(X_SIZE-1, Y_SIZE),MNIC_TGTID), false)); 537 457 538 maptabd.add(Segment("seg_cdma", CDMA_BASE + offset, CDMA_SIZE,458 maptabd.add(Segment("seg_cdma", SEG_CMA_BASE + offset, SEG_CMA_SIZE, 539 459 IntTab(cluster(X_SIZE-1, Y_SIZE),CDMA_TGTID), false)); 540 460 541 maptabd.add(Segment("seg_iopi", IOPI_BASE + offset, IOPI_SIZE,461 maptabd.add(Segment("seg_iopi", SEG_PIC_BASE + offset, SEG_PIC_SIZE, 542 462 IntTab(cluster(X_SIZE-1, Y_SIZE),IOPI_TGTID), false)); 543 463 … … 548 468 ///////////////////////////////////////////////// 549 469 550 MappingTable maptabx(vci_address_width, 551 IntTab(X_WIDTH+Y_WIDTH), 552 IntTab(X_WIDTH+Y_WIDTH), 470 MappingTable maptabx(vci_address_width, 471 IntTab(X_WIDTH+Y_WIDTH), 472 IntTab(X_WIDTH+Y_WIDTH), 553 473 0x00FF000000ULL); 554 474 … … 556 476 { 557 477 for (size_t y = 0; y < (Y_SIZE) ; y++) 558 { 478 { 559 479 sc_uint<vci_address_width> offset; 560 offset = (sc_uint<vci_address_width>)cluster(x,y) 480 offset = (sc_uint<vci_address_width>)cluster(x,y) 561 481 << (vci_address_width-X_WIDTH-Y_WIDTH); 562 482 … … 564 484 sh << "x_seg_memc_" << x << "_" << y; 565 485 566 maptabx.add(Segment(sh.str(), MEMC_BASE + offset,567 MEMC_SIZE, IntTab(cluster(x,y)), false));486 maptabx.add(Segment(sh.str(), SEG_RAM_BASE + offset, 487 SEG_RAM_SIZE, IntTab(cluster(x,y)), false)); 568 488 } 569 489 } … … 669 589 VciSignals<vci_param_int> signal_vci_ini_iopi("signal_vci_ini_iopi"); 670 590 671 VciSignals<vci_param_int>* signal_vci_ini_proc = 591 VciSignals<vci_param_int>* signal_vci_ini_proc = 672 592 alloc_elems<VciSignals<vci_param_int> >("signal_vci_ini_proc", NB_PROCS_MAX ); 673 593 … … 683 603 VciSignals<vci_param_int> signal_vci_cmd_to_noc("signal_vci_cmd_to_noc"); 684 604 VciSignals<vci_param_int> signal_vci_cmd_from_noc("signal_vci_cmd_from_noc"); 685 605 686 606 //////////////////////////// 687 // Loader 607 // Loader 688 608 //////////////////////////// 689 609 690 #if USE_ IOC_RDK610 #if USE_RAMDISK 691 611 soclib::common::Loader loader( soft_name, ramdisk_name ); 692 612 #else … … 726 646 #endif 727 647 std::cout << std::endl; 728 std::cout << "Cluster_" << std::dec << x << "_" << y 648 std::cout << "Cluster_" << std::dec << x << "_" << y 729 649 << " with cluster_xy = " << std::hex << cluster(x,y) << std::endl; 730 650 std::cout << std::endl; … … 764 684 frozen_cycles, 765 685 trace_from, 766 trace_proc_ok, 686 trace_proc_ok, 767 687 trace_proc_id, 768 trace_memc_ok, 688 trace_memc_ok, 769 689 trace_memc_id 770 690 ); … … 785 705 // but the crossbar has (NB_PROCS_MAX + 3) intiators and 786 706 // 8 targets, in order to use the same SRCID and TGTID space 787 // (same mapping table for the internal components, 788 // and for the external peripherals) 707 // (same mapping table for the internal components, 708 // and for the external peripherals) 789 709 ////////////////////////////////////////////////////////////////// 790 710 … … 792 712 std::cout << " Building IO cluster (external peripherals)" << std::endl; 793 713 std::cout << std::endl; 794 714 795 715 size_t cluster_io = cluster(X_SIZE-1, Y_SIZE); 796 716 797 //////////// vci_local_crossbar 717 //////////// vci_local_crossbar 798 718 VciLocalCrossbar<vci_param_int>* 799 719 iobus = new VciLocalCrossbar<vci_param_int>( … … 805 725 BDEV_TGTID ); // default target index 806 726 807 //////////// vci_framebuffer 727 //////////// vci_framebuffer 808 728 VciFrameBuffer<vci_param_int>* 809 729 fbuf = new VciFrameBuffer<vci_param_int>( … … 813 733 FBUF_X_SIZE, FBUF_Y_SIZE ); 814 734 815 //////////// vci_block_device 735 //////////// vci_block_device 816 736 VciBlockDeviceTsar<vci_param_int>* 817 737 bdev = new VciBlockDeviceTsar<vci_param_int>( … … 824 744 64 ); // burst size 825 745 826 //////////// vci_multi_nic 746 //////////// vci_multi_nic 827 747 VciMultiNic<vci_param_int>* 828 748 mnic = new VciMultiNic<vci_param_int>( … … 836 756 NIC_TX_NAME ); 837 757 838 ///////////// vci_chbuf_dma 758 ///////////// vci_chbuf_dma 839 759 VciChbufDma<vci_param_int>* 840 760 cdma = new VciChbufDma<vci_param_int>( … … 844 764 IntTab(cluster_io, CDMA_TGTID), 845 765 64, // burst size 846 NB_CMA_CHANNELS ); 766 NB_CMA_CHANNELS ); 847 767 848 768 ////////////// vci_multi_tty … … 855 775 } 856 776 857 VciMultiTty<vci_param_int>* 777 VciMultiTty<vci_param_int>* 858 778 mtty = new VciMultiTty<vci_param_int>( 859 779 "mtty", … … 869 789 IntTab(cluster_io, IOPI_SRCID), 870 790 IntTab(cluster_io, IOPI_TGTID), 871 32, 872 5000 ); 873 874 ////////////// vci_dspin wrappers 791 32 ); 792 793 ////////////// vci_dspin wrappers 875 794 VciDspinTargetWrapper<vci_param_int, dspin_cmd_width, dspin_rsp_width>* 876 795 wt_iobus = new VciDspinTargetWrapper<vci_param_int, dspin_cmd_width, dspin_rsp_width>( … … 884 803 885 804 /////////////////////////////////////////////////////////////// 886 // Net-list 805 // Net-list 887 806 /////////////////////////////////////////////////////////////// 888 807 889 // iobus 890 iobus->p_clk (signal_clk); 808 // iobus 809 iobus->p_clk (signal_clk); 891 810 iobus->p_resetn (signal_resetn); 892 811 … … 1049 968 } 1050 969 } 1051 std::cout << std::endl << "Horizontal connections done" << std::endl; 970 std::cout << std::endl << "Horizontal connections done" << std::endl; 1052 971 1053 972 // Inter Clusters vertical connections 1054 if (Y_SIZE > 1) 973 if (Y_SIZE > 1) 1055 974 { 1056 975 for (size_t y = 0; y < (Y_SIZE-1); y++) … … 1198 1117 } 1199 1118 1200 // set default values for VCI signals connected to unused ports on iobus 1119 // set default values for VCI signals connected to unused ports on iobus 1201 1120 signal_vci_tgt_memc.rspval = false; 1202 1121 signal_vci_tgt_xicu.rspval = false; … … 1206 1125 signal_resetn = true; 1207 1126 1208 if (gettimeofday(&t1, NULL) != 0) 1127 if (gettimeofday(&t1, NULL) != 0) 1209 1128 { 1210 1129 perror("gettimeofday"); … … 1233 1152 { 1234 1153 1235 if (gettimeofday(&t2, NULL) != 0) 1154 if (gettimeofday(&t2, NULL) != 0) 1236 1155 { 1237 1156 perror("gettimeofday"); … … 1241 1160 ms1 = (uint64_t) t1.tv_sec * 1000ULL + (uint64_t) t1.tv_usec / 1000; 1242 1161 ms2 = (uint64_t) t2.tv_sec * 1000ULL + (uint64_t) t2.tv_usec / 1000; 1243 std::cerr << "platform clock frequency " 1162 std::cerr << "platform clock frequency " 1244 1163 << (double) 5000000 / (double) (ms2 - ms1) << "Khz" << std::endl; 1245 1164 1246 if (gettimeofday(&t1, NULL) != 0) 1165 if (gettimeofday(&t1, NULL) != 0) 1247 1166 { 1248 1167 perror("gettimeofday"); … … 1291 1210 clusters[x][y]->signal_vci_tgt_memc.print_trace(smemc.str()); 1292 1211 clusters[x][y]->signal_vci_xram.print_trace(sxram.str()); 1293 } 1212 } 1294 1213 1295 1214 // trace coherence signals … … 1309 1228 // clusters[0][1]->xbar_m2p->print_trace(); 1310 1229 // clusters[1][1]->xbar_m2p->print_trace(); 1311 1230 1312 1231 // trace router(s) m2p 1313 1232 // clusters[0][0]->router_m2p->print_trace(); … … 1315 1234 // clusters[0][1]->router_m2p->print_trace(); 1316 1235 // clusters[1][1]->router_m2p->print_trace(); 1317 1236 1318 1237 // trace external ioc 1319 1238 bdev->print_trace(); … … 1335 1254 { 1336 1255 // trace BDV interrupts events 1337 if ( signal_irq_bdev.read() != prev_irq_bdev ) 1256 if ( signal_irq_bdev.read() != prev_irq_bdev ) 1338 1257 { 1339 1258 prev_irq_bdev = signal_irq_bdev.read(); … … 1341 1260 << " at cycle " << n << std::endl; 1342 1261 } 1343 1262 1344 1263 // trace TTY interrupts events 1345 1264 for ( size_t x = 0 ; x < 8 ; x++ ) 1346 1265 { 1347 if ( signal_irq_mtty_rx[x].read() != prev_irq_mtty_rx[x] ) 1266 if ( signal_irq_mtty_rx[x].read() != prev_irq_mtty_rx[x] ) 1348 1267 { 1349 1268 prev_irq_mtty_rx[x] = signal_irq_mtty_rx[x].read(); 1350 std::cout << std::dec << "@@@ IRQ_MTTY["<<x<<"] = " 1269 std::cout << std::dec << "@@@ IRQ_MTTY["<<x<<"] = " 1351 1270 << signal_irq_mtty_rx[x].read() 1352 1271 << " at cycle " << n << std::endl; … … 1360 1279 { 1361 1280 if ( clusters[x][y]->signal_proc_irq[i] != prev_irq_proc[x][y][i] ) 1362 { 1281 { 1363 1282 prev_irq_proc[x][y][i] = clusters[x][y]->signal_proc_irq[i]; 1364 1283 std::cout << std::dec << "@@@ IRQ_PROC["<<x<<","<<y<<","<<i<<"] = " … … 1387 1306 } 1388 1307 1389 1390 void handler(int dummy = 0) 1308 void handler(int dummy = 0) 1391 1309 { 1392 1310 stop_called = true;
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