Index: /trunk/platforms/tsar_generic_iob/arch.py =================================================================== --- /trunk/platforms/tsar_generic_iob/arch.py (revision 801) +++ /trunk/platforms/tsar_generic_iob/arch.py (revision 802) @@ -1,4 +1,5 @@ #!/usr/bin/env python +from math import log, ceil from mapping import * @@ -8,5 +9,5 @@ # author : Alain Greiner ####################################################################################### -# This file contains a mapping generator for the "tsar_generic_iob" platform. +# This file contains a mapping generator for the "tsar_generic_iob" platform. # This includes both the hardware architecture (clusters, processors, peripherals, # physical space segmentation) and the mapping of all kernel objects (global vsegs). @@ -42,5 +43,5 @@ nb_ttys = 1 - nb_nics = 2 + nb_nics = 2 fbf_width = 128 x_io = 0 @@ -48,4 +49,5 @@ x_width = 4 y_width = 4 + p_width = int(ceil(log(nb_procs, 2))) paddr_width = 40 irq_per_proc = 4 @@ -53,13 +55,13 @@ peri_increment = 0x10000 distributed_ptabs = True - + ### parameters checking - assert( nb_procs <= 4 ) - - assert( (x_size == 1) or (x_size == 2) or (x_size == 4) + assert( nb_procs <= (1 << p_width) ) + + assert( (x_size == 1) or (x_size == 2) or (x_size == 4) or (x_size == 8) or (x_size == 16) ) - assert( (y_size == 1) or (y_size == 2) or (y_size == 4) + assert( (y_size == 1) or (y_size == 2) or (y_size == 4) or (y_size == 8) or (y_size == 16) ) @@ -70,5 +72,5 @@ platform_name = 'tsar_iob_%d_%d_%d' % ( x_size, y_size, nb_procs ) - + ### define physical segments @@ -76,11 +78,11 @@ ram_size = 0x4000000 # 64 Mbytes - xcu_base = 0x00B0000000 - xcu_size = 0x1000 # 4 Kbytes + xcu_base = 0x00B0000000 + xcu_size = 0x1000 # 4 Kbytes dma_base = 0x00B1000000 dma_size = 0x1000 * nb_procs # 4 Kbytes * nb_procs - mmc_base = 0x00B2000000 + mmc_base = 0x00B2000000 mmc_size = 0x1000 # 4 Kbytes @@ -117,6 +119,6 @@ boot_code_vbase = 0x00080000 # ident - boot_code_size = 0x00040000 # 256 Kbytes - + boot_code_size = 0x00040000 # 256 Kbytes + boot_data_vbase = 0x000C0000 # ident boot_data_size = 0x00080000 # 512 Kbytes @@ -127,5 +129,5 @@ ### define kernel vsegs base addresses and sizes - kernel_code_vbase = 0x80000000 + kernel_code_vbase = 0x80000000 kernel_code_size = 0x00020000 # 128 Kbytes @@ -144,19 +146,20 @@ ### create mapping - mapping = Mapping( name = platform_name, - x_size = x_size, - y_size = y_size, - procs_max = nb_procs, - x_width = x_width, - y_width = y_width, - paddr_width = paddr_width, - coherence = True, - irq_per_proc = irq_per_proc, - use_ramdisk = use_ramdisk, - x_io = x_io, + mapping = Mapping( name = platform_name, + x_size = x_size, + y_size = y_size, + procs_max = nb_procs, + x_width = x_width, + y_width = y_width, + p_width = p_width, + paddr_width = paddr_width, + coherence = True, + irq_per_proc = irq_per_proc, + use_ramdisk = use_ramdisk, + x_io = x_io, y_io = y_io, - peri_increment = peri_increment, - ram_base = ram_base, - ram_size = ram_size ) + peri_increment = peri_increment, + ram_base = ram_base, + ram_size = ram_size ) ### external peripherals (accessible in cluster[0,0] only for this mapping) @@ -168,5 +171,5 @@ tty = mapping.addPeriph( 'TTY', base = tty_base, size = tty_size, ptype = 'TTY', channels = nb_ttys ) - nic = mapping.addPeriph( 'NIC', base = nic_base, size = nic_size, ptype = 'NIC', channels = nb_nics ) + nic = mapping.addPeriph( 'NIC', base = nic_base, size = nic_size, ptype = 'NIC', channels = nb_nics ) cma = mapping.addPeriph( 'CMA', base = cma_base, size = cma_size, ptype = 'CMA', channels = 2*nb_nics ) @@ -193,5 +196,5 @@ mapping.addIrq( pic, index = 9, isrtype = 'ISR_TTY_RX', channel = 0 ) - ### hardware components replicated in all clusters + ### hardware components replicated in all clusters for x in xrange( x_size ): @@ -202,11 +205,11 @@ ram = mapping.addRam( 'RAM', base = ram_base + offset, size = ram_size ) - mmc = mapping.addPeriph( 'MMC', base = mmc_base + offset, size = mmc_size, + mmc = mapping.addPeriph( 'MMC', base = mmc_base + offset, size = mmc_size, ptype = 'MMC' ) - dma = mapping.addPeriph( 'DMA', base = dma_base + offset, size = dma_size, - ptype = 'DMA', channels = nb_procs ) - - xcu = mapping.addPeriph( 'XCU', base = xcu_base + offset, size = xcu_size, + dma = mapping.addPeriph( 'DMA', base = dma_base + offset, size = dma_size, + ptype = 'DMA', channels = nb_procs ) + + xcu = mapping.addPeriph( 'XCU', base = xcu_base + offset, size = xcu_size, ptype = 'XCU', channels = nb_procs * irq_per_proc, arg = 16 ) @@ -223,5 +226,5 @@ mapping.addProc( x, y, p ) - ### global vsegs for boot_loader / identity mapping + ### global vsegs for boot_loader / identity mapping mapping.addGlobal( 'seg_boot_mapping', boot_mapping_vbase, boot_mapping_size, @@ -241,5 +244,5 @@ identity = True ) - ### the code global vsegs for kernel can be replicated in all clusters + ### the code global vsegs for kernel can be replicated in all clusters ### if the page tables are distributed in all clusters. @@ -267,47 +270,47 @@ ### shared global vsegs for kernel - mapping.addGlobal( 'seg_kernel_data', kernel_data_vbase, kernel_data_size, - 'C_W_', vtype = 'ELF', x = 0, y = 0, pseg = 'RAM', + mapping.addGlobal( 'seg_kernel_data', kernel_data_vbase, kernel_data_size, + 'C_W_', vtype = 'ELF', x = 0, y = 0, pseg = 'RAM', binpath = 'build/kernel/kernel.elf', local = False ) mapping.addGlobal( 'seg_kernel_uncdata', kernel_uncdata_vbase, kernel_uncdata_size, - '__W_', vtype = 'ELF', x = 0, y = 0, pseg = 'RAM', + '__W_', vtype = 'ELF', x = 0, y = 0, pseg = 'RAM', binpath = 'build/kernel/kernel.elf', local = False ) ### global vsegs for external peripherals / identity mapping - mapping.addGlobal( 'seg_iob', iob_base, iob_size, '__W_', - vtype = 'PERI', x = 0, y = 0, pseg = 'IOB', - identity = True ) - - mapping.addGlobal( 'seg_bdv', bdv_base, bdv_size, '__W_', + mapping.addGlobal( 'seg_iob', iob_base, iob_size, '__W_', + vtype = 'PERI', x = 0, y = 0, pseg = 'IOB', + identity = True ) + + mapping.addGlobal( 'seg_bdv', bdv_base, bdv_size, '__W_', vtype = 'PERI', x = 0, y = 0, pseg = 'BDV', identity = True ) - mapping.addGlobal( 'seg_tty', tty_base, tty_size, '__W_', + mapping.addGlobal( 'seg_tty', tty_base, tty_size, '__W_', vtype = 'PERI', x = 0, y = 0, pseg = 'TTY', identity = True ) - mapping.addGlobal( 'seg_nic', nic_base, nic_size, '__W_', + mapping.addGlobal( 'seg_nic', nic_base, nic_size, '__W_', vtype = 'PERI', x = 0, y = 0, pseg = 'NIC', identity = True ) - mapping.addGlobal( 'seg_cma', cma_base, cma_size, '__W_', + mapping.addGlobal( 'seg_cma', cma_base, cma_size, '__W_', vtype = 'PERI', x = 0, y = 0, pseg = 'CMA', identity = True ) - mapping.addGlobal( 'seg_fbf', fbf_base, fbf_size, '__W_', + mapping.addGlobal( 'seg_fbf', fbf_base, fbf_size, '__W_', vtype = 'PERI', x = 0, y = 0, pseg = 'FBF', identity = True ) - mapping.addGlobal( 'seg_pic', pic_base, pic_size, '__W_', + mapping.addGlobal( 'seg_pic', pic_base, pic_size, '__W_', vtype = 'PERI', x = 0, y = 0, pseg = 'PIC', identity = True ) - mapping.addGlobal( 'seg_rom', rom_base, rom_size, 'CXW_', + mapping.addGlobal( 'seg_rom', rom_base, rom_size, 'CXW_', vtype = 'PERI', x = 0, y = 0, pseg = 'ROM', identity = True ) - ### global vsegs for internal peripherals, and for schedulers + ### global vsegs for internal peripherals, and for schedulers ### name is indexed by (x,y) / vbase address is incremented by (cluster_xy * peri_increment) @@ -346,5 +349,5 @@ # print mapping.giet_vsegs() - + # Local Variables: Index: /trunk/platforms/tsar_generic_iob/non_distributed_arch.py =================================================================== --- /trunk/platforms/tsar_generic_iob/non_distributed_arch.py (revision 801) +++ /trunk/platforms/tsar_generic_iob/non_distributed_arch.py (revision 802) @@ -1,4 +1,5 @@ #!/usr/bin/env python +from math import log, ceil from mapping import * @@ -8,5 +9,5 @@ # author : Alain Greiner ####################################################################################### -# This file contains a mapping generator for the "tsar_generic_iob" platform. +# This file contains a mapping generator for the "tsar_generic_iob" platform. # This includes both the hardware architecture (clusters, processors, peripherals, # physical space segmentation) and the mapping of all kernel objects (global vsegs). @@ -42,8 +43,9 @@ nb_ttys = 1 - nb_nics = 2 + nb_nics = 2 fbf_width = 1024 x_io = 0 y_io = 0 + p_width = int(ceil(log(nb_procs, 2))) x_width = 4 y_width = 4 @@ -52,13 +54,13 @@ use_ramdisk = False peri_increment = 0x10000 - + ### parameters checking - assert( nb_procs <= 4 ) - - assert( (x_size == 1) or (x_size == 2) or (x_size == 4) + assert( nb_procs <= (1 << p_width) ) + + assert( (x_size == 1) or (x_size == 2) or (x_size == 4) or (y_size == 8) or (x_size == 16) ) - assert( (y_size == 1) or (y_size == 2) or (y_size == 4) + assert( (y_size == 1) or (y_size == 2) or (y_size == 4) or (y_size == 8) or (y_size == 16) ) @@ -69,5 +71,5 @@ platform_name = 'tsar_iob_%d_%d_%d' % ( x_size, y_size, nb_procs ) - + ### define physical segments @@ -75,11 +77,11 @@ ram_size = 0x4000000 # 64 Mbytes - xcu_base = 0x00B0000000 - xcu_size = 0x1000 # 4 Kbytes + xcu_base = 0x00B0000000 + xcu_size = 0x1000 # 4 Kbytes dma_base = 0x00B1000000 dma_size = 0x1000 * nb_procs # 4 Kbytes * nb_procs - mmc_base = 0x00B2000000 + mmc_base = 0x00B2000000 mmc_size = 0x1000 # 4 Kbytes @@ -116,6 +118,6 @@ boot_code_vbase = 0x00010000 # ident - boot_code_size = 0x00020000 # 128 Kbytes - + boot_code_size = 0x00020000 # 128 Kbytes + boot_data_vbase = 0x00030000 # ident boot_data_size = 0x00010000 # 64 Kbytes @@ -129,5 +131,5 @@ ### define kernel vsegs base addresses - kernel_code_vbase = 0x80000000 + kernel_code_vbase = 0x80000000 kernel_code_size = 0x00020000 # 128 Kbytes @@ -146,17 +148,18 @@ ### create mapping - mapping = Mapping( name = platform_name, - x_size = x_size, - y_size = y_size, - procs_max = nb_procs, - x_width = x_width, - y_width = y_width, - paddr_width = paddr_width, - coherence = True, - irq_per_proc = irq_per_proc, - use_ramdisk = use_ramdisk, - x_io = x_io, + mapping = Mapping( name = platform_name, + x_size = x_size, + y_size = y_size, + procs_max = nb_procs, + x_width = x_width, + y_width = y_width, + p_width = p_width, + paddr_width = paddr_width, + coherence = True, + irq_per_proc = irq_per_proc, + use_ramdisk = use_ramdisk, + x_io = x_io, y_io = y_io, - peri_increment = peri_increment ) + peri_increment = peri_increment ) ### external peripherals (accessible in cluster[0,0] only for this mapping) @@ -168,5 +171,5 @@ tty = mapping.addPeriph( 'TTY', base = tty_base, size = tty_size, ptype = 'TTY', channels = nb_ttys ) - nic = mapping.addPeriph( 'NIC', base = nic_base, size = nic_size, ptype = 'NIC', channels = nb_nics ) + nic = mapping.addPeriph( 'NIC', base = nic_base, size = nic_size, ptype = 'NIC', channels = nb_nics ) cma = mapping.addPeriph( 'CMA', base = cma_base, size = cma_size, ptype = 'CMA', channels = 2*nb_nics ) @@ -193,5 +196,5 @@ mapping.addIrq( pic, index = 9, isrtype = 'ISR_TTY_RX', channel = 0 ) - ### hardware components replicated in all clusters + ### hardware components replicated in all clusters for x in xrange( x_size ): @@ -202,11 +205,11 @@ ram = mapping.addRam( 'RAM', base = ram_base + offset, size = ram_size ) - mmc = mapping.addPeriph( 'MMC', base = mmc_base + offset, size = mmc_size, + mmc = mapping.addPeriph( 'MMC', base = mmc_base + offset, size = mmc_size, ptype = 'MMC' ) - dma = mapping.addPeriph( 'DMA', base = dma_base + offset, size = dma_size, - ptype = 'DMA', channels = nb_procs ) - - xcu = mapping.addPeriph( 'XCU', base = xcu_base + offset, size = xcu_size, + dma = mapping.addPeriph( 'DMA', base = dma_base + offset, size = dma_size, + ptype = 'DMA', channels = nb_procs ) + + xcu = mapping.addPeriph( 'XCU', base = xcu_base + offset, size = xcu_size, ptype = 'XCU', channels = nb_procs * irq_per_proc, arg = 16 ) @@ -220,60 +223,60 @@ ### global vsegs for boot_loader / identity mapping - mapping.addGlobal( 'seg_boot_mapping' , boot_mapping_vbase , boot_mapping_size , 'C_W_', + mapping.addGlobal( 'seg_boot_mapping' , boot_mapping_vbase , boot_mapping_size , 'C_W_', vtype = 'BLOB' , x = 0, y = 0, pseg = 'RAM', identity = True ) - mapping.addGlobal( 'seg_boot_code' , boot_code_vbase , boot_code_size , 'CXW_', + mapping.addGlobal( 'seg_boot_code' , boot_code_vbase , boot_code_size , 'CXW_', vtype = 'BUFFER', x = 0, y = 0, pseg = 'RAM', identity = True ) - mapping.addGlobal( 'seg_boot_data' , boot_data_vbase , boot_data_size , 'C_W_', + mapping.addGlobal( 'seg_boot_data' , boot_data_vbase , boot_data_size , 'C_W_', vtype = 'BUFFER', x = 0, y = 0, pseg = 'RAM', identity = True ) - mapping.addGlobal( 'seg_boot_buffer' , boot_buffer_vbase , boot_buffer_size , 'C_W_', + mapping.addGlobal( 'seg_boot_buffer' , boot_buffer_vbase , boot_buffer_size , 'C_W_', vtype = 'BUFFER', x = 0, y = 0, pseg = 'RAM', identity = True ) - mapping.addGlobal( 'seg_boot_stack' , boot_stack_vbase , boot_stack_size , 'C_W_', + mapping.addGlobal( 'seg_boot_stack' , boot_stack_vbase , boot_stack_size , 'C_W_', vtype = 'BUFFER', x = 0, y = 0, pseg = 'RAM', identity = True ) - ### global vsegs for kernel - - mapping.addGlobal( 'seg_kernel_code' , kernel_code_vbase , kernel_code_size , 'CXW_', + ### global vsegs for kernel + + mapping.addGlobal( 'seg_kernel_code' , kernel_code_vbase , kernel_code_size , 'CXW_', vtype = 'ELF' , x = 0, y = 0, pseg = 'RAM', binpath = 'build/kernel/kernel.elf' ) - mapping.addGlobal( 'seg_kernel_data' , kernel_data_vbase , kernel_data_size , 'C_W_', + mapping.addGlobal( 'seg_kernel_data' , kernel_data_vbase , kernel_data_size , 'C_W_', vtype = 'ELF' , x = 0, y = 0, pseg = 'RAM', binpath = 'build/kernel/kernel.elf' ) - mapping.addGlobal( 'seg_kernel_uncdata', kernel_uncdata_vbase, kernel_uncdata_size, '__W_', + mapping.addGlobal( 'seg_kernel_uncdata', kernel_uncdata_vbase, kernel_uncdata_size, '__W_', vtype = 'ELF' , x = 0, y = 0, pseg = 'RAM', binpath = 'build/kernel/kernel.elf' ) - mapping.addGlobal( 'seg_kernel_init' , kernel_init_vbase , kernel_init_size , 'CXW_', + mapping.addGlobal( 'seg_kernel_init' , kernel_init_vbase , kernel_init_size , 'CXW_', vtype = 'ELF' , x = 0, y = 0, pseg = 'RAM', binpath = 'build/kernel/kernel.elf' ) ### global vsegs for external peripherals / identity mapping - mapping.addGlobal( 'seg_iob', iob_base, iob_size, '__W_', + mapping.addGlobal( 'seg_iob', iob_base, iob_size, '__W_', vtype = 'PERI', x = 0, y = 0, pseg = 'IOB', identity = True ) - mapping.addGlobal( 'seg_bdv', bdv_base, bdv_size, '__W_', + mapping.addGlobal( 'seg_bdv', bdv_base, bdv_size, '__W_', vtype = 'PERI', x = 0, y = 0, pseg = 'BDV', identity = True ) - mapping.addGlobal( 'seg_tty', tty_base, tty_size, '__W_', + mapping.addGlobal( 'seg_tty', tty_base, tty_size, '__W_', vtype = 'PERI', x = 0, y = 0, pseg = 'TTY', identity = True ) - mapping.addGlobal( 'seg_nic', nic_base, nic_size, '__W_', + mapping.addGlobal( 'seg_nic', nic_base, nic_size, '__W_', vtype = 'PERI', x = 0, y = 0, pseg = 'NIC', identity = True ) - mapping.addGlobal( 'seg_cma', cma_base, cma_size, '__W_', + mapping.addGlobal( 'seg_cma', cma_base, cma_size, '__W_', vtype = 'PERI', x = 0, y = 0, pseg = 'CMA', identity = True ) - mapping.addGlobal( 'seg_fbf', fbf_base, fbf_size, '__W_', + mapping.addGlobal( 'seg_fbf', fbf_base, fbf_size, '__W_', vtype = 'PERI', x = 0, y = 0, pseg = 'FBF', identity = True ) - mapping.addGlobal( 'seg_pic', pic_base, pic_size, '__W_', + mapping.addGlobal( 'seg_pic', pic_base, pic_size, '__W_', vtype = 'PERI', x = 0, y = 0, pseg = 'PIC', identity = True ) - mapping.addGlobal( 'seg_rom', rom_base, rom_size, 'CXW_', + mapping.addGlobal( 'seg_rom', rom_base, rom_size, 'CXW_', vtype = 'PERI', x = 0, y = 0, pseg = 'ROM', identity = True ) - ### Global vsegs for replicated peripherals, and for schedulers + ### Global vsegs for replicated peripherals, and for schedulers ### name is indexed by (x,y), base address is incremented by (cluster_xy * peri_increment) @@ -303,12 +306,7 @@ if __name__ == '__main__': - mapping = genmap( x_size = 2, - y_size = 2, - nb_procs = 2, - nb_ttys = 1, - nb_nics = 2, - fbf_width = 128, - x_io = 0, - y_io = 0 ) + mapping = arch( x_size = 2, + y_size = 2, + nb_procs = 2 ) # print mapping.netbsd_dts() @@ -317,5 +315,5 @@ # print mapping.giet_vsegs() - + # Local Variables: Index: /trunk/platforms/tsar_generic_iob/top.cpp =================================================================== --- /trunk/platforms/tsar_generic_iob/top.cpp (revision 801) +++ /trunk/platforms/tsar_generic_iob/top.cpp (revision 802) @@ -186,5 +186,5 @@ //////////////////////i///////////////////////////////////// -#include "../../../giet_vm/hard_config.h" +#include "hard_config.h" //////////////////////////////////////////////////////////// @@ -336,6 +336,7 @@ size_t cluster_iob0 = cluster(0,0); // cluster containing IOB0 size_t cluster_iob1 = cluster(XMAX-1,YMAX-1); // cluster containing IOB1 - size_t x_width = 4; // at most 256 clusters - size_t y_width = 4; // at most 256 clusters + size_t x_width = X_WIDTH; // # of bits for x + size_t y_width = Y_WIDTH; // # of bits for y + size_t p_width = P_WIDTH; // # of bits for lpid #if USING_OPENMP @@ -347,4 +348,7 @@ assert( (X_WIDTH == 4) and (Y_WIDTH == 4) and "ERROR: we must have X_WIDTH == Y_WIDTH == 4"); + + assert( P_WIDTH <= 3 and + "ERROR: we must have P_WIDTH <= 3"); ////////////// command line arguments ////////////////////// @@ -399,5 +403,5 @@ { debug_proc_id = atoi(argv[n+1]); - size_t cluster_xy = debug_proc_id / NB_PROCS_MAX ; + size_t cluster_xy = debug_proc_id >> P_WIDTH ; size_t x = cluster_xy >> 4; size_t y = cluster_xy & 0xF; @@ -444,6 +448,6 @@ "The YMAX parameter cannot be larger than 16" ); - assert( (NB_PROCS_MAX <= 8) and - "The NB_PROCS_MAX parameter cannot be larger than 8" ); + assert( (NB_PROCS_MAX <= (1 << P_WIDTH)) and + "NB_PROCS_MAX parameter cannot be larger than 2^P_WIDTH" ); assert( (NB_DMA_CHANNELS <= 4) and @@ -459,5 +463,5 @@ << " - XMAX = " << XMAX << std::endl << " - YMAX = " << YMAX << std::endl - << " - NB_PROCS_MAX = " << NB_PROCS_MAX << std::endl + << " - NB_PROCS_MAX = " << NB_PROCS_MAX << std::endl << " - NB_TTY_CHANNELS = " << NB_TTY_CHANNELS << std::endl << " - NB_DMA_CHANNELS = " << NB_DMA_CHANNELS << std::endl @@ -602,5 +606,5 @@ IntTab( cluster(x,y), INT_IOBX_INI_ID ) ); - for ( size_t p = 0 ; p < NB_PROCS_MAX ; p++ ) + for ( size_t p = 0 ; p < NB_PROCS_MAX; p++ ) maptab_int.srcid_map( IntTab( cluster(x,y), PROC_LOCAL_SRCID+p ), IntTab( cluster(x,y), INT_PROC_INI_ID+p ) ); @@ -1038,4 +1042,5 @@ y_width, vci_srcid_width - x_width - y_width, // l_id width, + p_width, INT_MEMC_TGT_ID, @@ -1438,6 +1443,6 @@ if ( debug_proc_id != 0xFFFFFFFF ) { - size_t l = debug_proc_id % NB_PROCS_MAX ; - size_t cluster_xy = debug_proc_id / NB_PROCS_MAX ; + size_t l = debug_proc_id & ((1<> P_WIDTH ; size_t x = cluster_xy >> 4; size_t y = cluster_xy & 0xF; @@ -1460,5 +1465,5 @@ // local interrupts in cluster(x,y) if( clusters[x][y]->signal_irq_memc.read() ) - std::cout << "### IRQ_MMC_" << std::dec << x << "_" << y + std::cout << "### IRQ_MMC_" << std::dec << x << "_" << y << " ACTIVE" << std::endl; @@ -1466,12 +1471,12 @@ { if( clusters[x][y]->signal_irq_mdma[c].read() ) - std::cout << "### IRQ_DMA_" << std::dec << x << "_" << y << "_" << c + std::cout << "### IRQ_DMA_" << std::dec << x << "_" << y << "_" << c << " ACTIVE" << std::endl; } - + for ( size_t c = 0 ; c < NB_PROCS_MAX ; c++ ) { if( clusters[x][y]->signal_proc_it[c].read() ) - std::cout << "### IRQ_PROC_" << std::dec << x << "_" << y << "_" << c + std::cout << "### IRQ_PROC_" << std::dec << x << "_" << y << "_" << c << " ACTIVE" << std::endl; } Index: /trunk/platforms/tsar_generic_iob/tsar_iob_cluster/caba/source/include/tsar_iob_cluster.h =================================================================== --- /trunk/platforms/tsar_generic_iob/tsar_iob_cluster/caba/source/include/tsar_iob_cluster.h (revision 801) +++ /trunk/platforms/tsar_generic_iob/tsar_iob_cluster/caba/source/include/tsar_iob_cluster.h (revision 802) @@ -201,4 +201,5 @@ size_t y_width, // y field bits size_t l_width, // l field bits + size_t p_width, // p field bits size_t int_memc_tgt_id, Index: /trunk/platforms/tsar_generic_iob/tsar_iob_cluster/caba/source/src/tsar_iob_cluster.cpp =================================================================== --- /trunk/platforms/tsar_generic_iob/tsar_iob_cluster/caba/source/src/tsar_iob_cluster.cpp (revision 801) +++ /trunk/platforms/tsar_generic_iob/tsar_iob_cluster/caba/source/src/tsar_iob_cluster.cpp (revision 802) @@ -1,5 +1,5 @@ ////////////////////////////////////////////////////////////////////////////// // File: tsar_iob_cluster.cpp -// Author: Alain Greiner +// Author: Alain Greiner // Copyright: UPMC/LIP6 // Date : april 2013 @@ -10,5 +10,5 @@ // - 1 vci_io_bridge (connected to the 3 networks. // - 3 vci_dspin_wrapper for the IOB. -// - 2 dspin_local_crossbar for commands and responses. +// - 2 dspin_local_crossbar for commands and responses. ////////////////////////////////////////////////////////////////////////////// @@ -40,10 +40,11 @@ const soclib::common::MappingTable &mt_int, - const soclib::common::MappingTable &mt_ram, - const soclib::common::MappingTable &mt_iox, + const soclib::common::MappingTable &mt_ram, + const soclib::common::MappingTable &mt_iox, size_t x_width, size_t y_width, size_t l_width, + size_t p_width, size_t int_memc_tgt_id, // local index @@ -103,5 +104,5 @@ { p_vci_iob_iox_ini = new soclib::caba::VciInitiator; - p_vci_iob_iox_tgt = new soclib::caba::VciTarget; + p_vci_iob_iox_tgt = new soclib::caba::VciTarget; } @@ -112,5 +113,5 @@ //////////// PROCS for (size_t p = 0; p < nb_procs; p++) - { + { std::ostringstream s_proc; s_proc << "proc_" << x_id << "_" << y_id << "_" << p; @@ -120,5 +121,5 @@ GdbServer >( s_proc.str().c_str(), - cluster_id*nb_procs + p, // GLOBAL PROC_ID + (cluster_id << p_width) + p, // GLOBAL PROC_ID mt_int, // Mapping Table INT network IntTab(cluster_id,p), // SRCID @@ -139,5 +140,5 @@ } - /////////// MEMC + /////////// MEMC std::ostringstream s_memc; s_memc << "memc_" << x_id << "_" << y_id; @@ -204,5 +205,5 @@ cluster_id, // cluster id nb_direct_initiators, // number of local initiators - nb_direct_targets, // number of local targets + nb_direct_targets, // number of local targets 0 ); // default target @@ -234,6 +235,6 @@ x_width, y_width, l_width, // several dests 1, // number of local sources - nb_procs, // number of local dests - 2, 2, // fifo depths + nb_procs, // number of local dests + 2, 2, // fifo depths true, // pseudo CMD false, // no routing table @@ -249,8 +250,8 @@ nb_procs, // number of local sources 1, // number of local dests - 2, 2, // fifo depths + 2, 2, // fifo depths false, // pseudo RSP false, // no routing table - false ); // no broacast + false ); // no broacast std::ostringstream s_int_xbar_clack_c; @@ -262,5 +263,5 @@ x_width, y_width, l_width, 1, // number of local sources - nb_procs, // number of local targets + nb_procs, // number of local targets 1, 1, // fifo depths true, // CMD @@ -330,7 +331,7 @@ /////////// IO_BRIDGE std::ostringstream s_iob; - s_iob << "iob_" << x_id << "_" << y_id; + s_iob << "iob_" << x_id << "_" << y_id; iob = new VciIoBridge( + vci_param_ext>( s_iob.str().c_str(), mt_ram, // EXT network maptab @@ -346,7 +347,7 @@ debug_start_cycle, iob_debug_ok ); - + std::ostringstream s_iob_ram_wi; - s_iob_ram_wi << "iob_ram_wi_" << x_id << "_" << y_id; + s_iob_ram_wi << "iob_ram_wi_" << x_id << "_" << y_id; iob_ram_wi = new VciDspinInitiatorWrapperp_clk (this->p_clk); @@ -417,5 +418,5 @@ int_router_cmd->p_in[4][1] (signal_int_dspin_m2p_l2g_c); int_router_cmd->p_in[4][2] (signal_int_dspin_clack_l2g_c); - + int_router_rsp->p_out[4][0] (signal_int_dspin_rsp_g2l_d); int_router_rsp->p_out[4][1] (signal_int_dspin_p2m_g2l_c); @@ -453,5 +454,5 @@ int_wt_gate_d->p_dspin_cmd (signal_int_dspin_cmd_g2l_d); int_wt_gate_d->p_dspin_rsp (signal_int_dspin_rsp_l2g_d); - + ////////////////////// M2P DSPIN local crossbar coherence int_xbar_m2p_c->p_clk (this->p_clk); @@ -460,5 +461,5 @@ int_xbar_m2p_c->p_global_in (signal_int_dspin_m2p_g2l_c); int_xbar_m2p_c->p_local_in[0] (signal_int_dspin_m2p_memc); - for (size_t p = 0; p < nb_procs; p++) + for (size_t p = 0; p < nb_procs; p++) int_xbar_m2p_c->p_local_out[p] (signal_int_dspin_m2p_proc[p]); @@ -469,5 +470,5 @@ int_xbar_p2m_c->p_global_in (signal_int_dspin_p2m_g2l_c); int_xbar_p2m_c->p_local_out[0] (signal_int_dspin_p2m_memc); - for (size_t p = 0; p < nb_procs; p++) + for (size_t p = 0; p < nb_procs; p++) int_xbar_p2m_c->p_local_in[p] (signal_int_dspin_p2m_proc[p]); @@ -511,5 +512,5 @@ else if ( i <= nb_dmas ) xicu->p_hwi[i] (signal_irq_mdma[i-1]); else xicu->p_hwi[i] (signal_false); - } + } ///////////////////////////////////// MEMC @@ -576,6 +577,6 @@ ram_router_rsp->p_out[4] (signal_ram_dspin_rsp_memc_i); } - - ///////////////////////// IOB exists only in cluster_iob0 & cluster_iob1. + + ///////////////////////// IOB exists only in cluster_iob0 & cluster_iob1. if ( is_io ) {