Index: /trunk/platforms/tsar_generic_leti/Makefile =================================================================== --- /trunk/platforms/tsar_generic_leti/Makefile (revision 818) +++ /trunk/platforms/tsar_generic_leti/Makefile (revision 819) @@ -1,3 +1,3 @@ -simul.x: top.cpp top.desc +simul.x: top.cpp top.desc hard_config.h soclib-cc -P -p top.desc -I. -o simul.x Index: /trunk/platforms/tsar_generic_leti/arch.py =================================================================== --- /trunk/platforms/tsar_generic_leti/arch.py (revision 818) +++ /trunk/platforms/tsar_generic_leti/arch.py (revision 819) @@ -34,7 +34,8 @@ ######################## -def arch( x_size = 2, - y_size = 2, - nb_procs = 2 ): +def arch( x_size = 2, + y_size = 2, + nb_procs = 2, + fbf_width = 128 ): ### define architecture constants @@ -42,14 +43,15 @@ nb_ttys = 1 nb_nics = 2 - fbf_width = 128 x_io = 0 y_io = 0 x_width = 4 y_width = 4 - p_width = int(ceil(log(nb_procs, 2))) + p_width = 4 paddr_width = 40 irq_per_proc = 4 use_ramdisk = True - peri_increment = 0x10000 + peri_increment = 0x10000 # distributed peripherals vbase address increment + sched_increment = 0x10000 # distributed schedulers vbase address increment + ptab_increment = 0x200000 # distributed page tables vbase address increment reset_address = 0x00000000 distributed_ptabs = False @@ -106,11 +108,10 @@ rdk_size = 0x02000000 # 32 Mbytes - ### define preloader vseg base address and size + ### define preloader & bootloader vsegs base addresses and sizes + ### we want to pack these 5 vsegs in the same big page preloader_vbase = 0x00000000 # ident preloader_size = 0x00010000 # 64 Kbytes - ### define bootloader vsegs base addresses and sizes - boot_mapping_vbase = 0x00010000 # ident boot_mapping_size = 0x00080000 # 512 Kbytes @@ -126,19 +127,25 @@ ### define kernel vsegs base addresses and sizes - + ### we want to pack code, init and data vsegs in one big page + ### we want to map the ptab vseg in one big page per cluster + ### we want to map the sched vseg in small pages + kernel_code_vbase = 0x80000000 - kernel_code_size = 0x00020000 # 128 Kbytes - - kernel_data_vbase = 0x80020000 - kernel_data_size = 0x00020000 # 128 Kbytes - - kernel_uncdata_vbase = 0x80040000 - kernel_uncdata_size = 0x00010000 # 64 Kbytes - - kernel_init_vbase = 0x80050000 - kernel_init_size = 0x00010000 # 64 Kbytes - - kernel_sched_vbase = 0x80060000 # distributed in all clusters - kernel_sched_size = 0x2000 * nb_procs # 8 kbytes per processor + kernel_code_size = 0x00080000 # 512 Kbytes per cluster + + kernel_init_vbase = 0x80080000 + kernel_init_size = 0x00080000 # 512 Kbytes per cluster + + kernel_data_vbase = 0x80100000 + kernel_data_size = 0x00100000 # 1 Mbytes in cluster [0,0] + + kernel_ptab_vbase = 0xB0000000 + kernel_ptab_size = 0x00200000 # 2 Mbytes per cluster + + kernel_uncdata_vbase = 0x90000000 + kernel_uncdata_size = 0x00001000 # 4 Kbytes + + kernel_sched_vbase = 0xA0000000 # distributed in all clusters + kernel_sched_size = 0x00002000 * nb_procs # 8 kbytes per processor ### create mapping @@ -147,5 +154,5 @@ x_size = x_size, y_size = y_size, - procs_max = nb_procs, + nprocs = nb_procs, x_width = x_width, y_width = y_width, @@ -225,8 +232,4 @@ ### global vseg for preloader - mapping.addGlobal( 'seg_preloader', preloader_vbase, preloader_size, '__W_', - vtype = 'BUFFER', x = 0, y = 0, pseg = 'RAM', - identity = True ) - ### global vseg for ram disk @@ -279,48 +282,43 @@ 'C_W_', vtype = 'SCHED', x = x , y = y , pseg = 'RAM' ) - ### GIET-VM specifics - ### global vsegs for boot_loader / identity mapping + ### global vsegs for preloader and boot_loader + ### identity mapping / non local / big page + + mapping.addGlobal( 'seg_preloader', preloader_vbase, preloader_size, + 'CXW_', vtype = 'BUFFER', x = 0, y = 0, pseg = 'RAM', + identity = True, local = False, big = True ) mapping.addGlobal( 'seg_boot_mapping', boot_mapping_vbase, boot_mapping_size, - 'C_W_', vtype = 'BLOB' , x = 0, y = 0, pseg = 'RAM', - identity = True ) + 'CXW_', vtype = 'BLOB' , x = 0, y = 0, pseg = 'RAM', + identity = True, local = False, big = True ) mapping.addGlobal( 'seg_boot_code', boot_code_vbase, boot_code_size, 'CXW_', vtype = 'BUFFER', x = 0, y = 0, pseg = 'RAM', - identity = True ) + identity = True, local = False, big = True ) mapping.addGlobal( 'seg_boot_data', boot_data_vbase, boot_data_size, - 'C_W_', vtype = 'BUFFER', x = 0, y = 0, pseg = 'RAM', - identity = True ) + 'CXW_', vtype = 'BUFFER', x = 0, y = 0, pseg = 'RAM', + identity = True, local = False, big = True ) mapping.addGlobal( 'seg_boot_stack', boot_stack_vbase, boot_stack_size, - 'C_W_', vtype = 'BUFFER', x = 0, y = 0, pseg = 'RAM', - identity = True ) - - ### the code global vsegs for kernel can be replicated in all clusters - ### if the page tables are distributed in all clusters. - - if distributed_ptabs: - for x in xrange( x_size ): - for y in xrange( y_size ): - cluster_xy = (x << y_width) + y; - - mapping.addGlobal( 'seg_kernel_code', kernel_code_vbase, kernel_code_size, - 'CXW_', vtype = 'ELF', x = x , y = y , pseg = 'RAM', - binpath = 'build/kernel/kernel.elf', local = True ) - - mapping.addGlobal( 'seg_kernel_init', kernel_init_vbase, kernel_init_size, - 'CXW_', vtype = 'ELF', x = x , y = y , pseg = 'RAM', - binpath = 'build/kernel/kernel.elf', local = True ) - else: - mapping.addGlobal( 'seg_kernel_code', kernel_code_vbase, kernel_code_size, - 'CXW_', vtype = 'ELF', x = 0 , y = 0 , pseg = 'RAM', - binpath = 'build/kernel/kernel.elf', local = False ) - - mapping.addGlobal( 'seg_kernel_init', kernel_init_vbase, kernel_init_size, - 'CXW_', vtype = 'ELF', x = 0 , y = 0 , pseg = 'RAM', - binpath = 'build/kernel/kernel.elf', local = False ) - - ### shared global vsegs for kernel + 'CXW_', vtype = 'BUFFER', x = 0, y = 0, pseg = 'RAM', + identity = True, local = False, big = True ) + + ### global vsegs kernel_code, kernel_init + for x in xrange( x_size ): + for y in xrange( y_size ): + cluster_xy = (x << y_width) + y; + + mapping.addGlobal( 'seg_kernel_code', kernel_code_vbase, kernel_code_size, + 'CXW_', vtype = 'ELF', x = x , y = y , pseg = 'RAM', + binpath = 'build/kernel/kernel.elf', + local = True, big = True ) + + mapping.addGlobal( 'seg_kernel_init', kernel_init_vbase, kernel_init_size, + 'CXW_', vtype = 'ELF', x = x , y = y , pseg = 'RAM', + binpath = 'build/kernel/kernel.elf', + local = True, big = True ) + + mapping.addGlobal( 'seg_kernel_data', kernel_data_vbase, kernel_data_size,