- Timestamp:
- Oct 1, 2014, 11:30:42 AM (10 years ago)
- Location:
- trunk/platforms/tsar_generic_leti
- Files:
-
- 2 edited
Legend:
- Unmodified
- Added
- Removed
-
trunk/platforms/tsar_generic_leti/arch.py
r825 r826 193 193 tty = mapping.addPeriph( 'TTY', base = tty_base, size = tty_size, ptype = 'TTY', channels = nb_ttys ) 194 194 195 nic = mapping.addPeriph( 'NIC', base = nic_base, size = nic_size, ptype = 'NIC', channels = nb_nics ) 196 197 cma = mapping.addPeriph( 'CMA', base = cma_base, size = cma_size, ptype = 'CMA', channels = 2*nb_nics ) 198 199 fbf = mapping.addPeriph( 'FBF', base = fbf_base, size = fbf_size, ptype = 'FBF', arg = fbf_width ) 200 201 pic = mapping.addPeriph( 'PIC', base = pic_base, size = pic_size, ptype = 'PIC', channels = 32 ) 202 203 mapping.addIrq( pic, index = 0 , isrtype = 'ISR_NIC_RX', channel = 0 ) 204 mapping.addIrq( pic, index = 1 , isrtype = 'ISR_NIC_RX', channel = 1 ) 205 mapping.addIrq( pic, index = 2 , isrtype = 'ISR_NIC_TX', channel = 0 ) 206 mapping.addIrq( pic, index = 3 , isrtype = 'ISR_NIC_TX', channel = 1 ) 207 mapping.addIrq( pic, index = 4 , isrtype = 'ISR_CMA' , channel = 0 ) 208 mapping.addIrq( pic, index = 5 , isrtype = 'ISR_CMA' , channel = 1 ) 209 mapping.addIrq( pic, index = 6 , isrtype = 'ISR_CMA' , channel = 2 ) 210 mapping.addIrq( pic, index = 7 , isrtype = 'ISR_CMA' , channel = 3 ) 211 mapping.addIrq( pic, index = 8 , isrtype = 'ISR_BDV' , channel = 0 ) 212 mapping.addIrq( pic, index = 16, isrtype = 'ISR_TTY_RX', channel = 0 ) 195 if x_io != 0 or y_io != 0: 196 nic = mapping.addPeriph( 'NIC', base = nic_base, size = nic_size, ptype = 'NIC', channels = nb_nics ) 197 cma = mapping.addPeriph( 'CMA', base = cma_base, size = cma_size, ptype = 'CMA', channels = 2*nb_nics ) 198 fbf = mapping.addPeriph( 'FBF', base = fbf_base, size = fbf_size, ptype = 'FBF', arg = fbf_width ) 199 pic = mapping.addPeriph( 'PIC', base = pic_base, size = pic_size, ptype = 'PIC', channels = 32 ) 200 201 mapping.addIrq( pic, index = 0 , isrtype = 'ISR_NIC_RX', channel = 0 ) 202 mapping.addIrq( pic, index = 1 , isrtype = 'ISR_NIC_RX', channel = 1 ) 203 mapping.addIrq( pic, index = 2 , isrtype = 'ISR_NIC_TX', channel = 0 ) 204 mapping.addIrq( pic, index = 3 , isrtype = 'ISR_NIC_TX', channel = 1 ) 205 mapping.addIrq( pic, index = 4 , isrtype = 'ISR_CMA' , channel = 0 ) 206 mapping.addIrq( pic, index = 5 , isrtype = 'ISR_CMA' , channel = 1 ) 207 mapping.addIrq( pic, index = 6 , isrtype = 'ISR_CMA' , channel = 2 ) 208 mapping.addIrq( pic, index = 7 , isrtype = 'ISR_CMA' , channel = 3 ) 209 mapping.addIrq( pic, index = 8 , isrtype = 'ISR_BDV' , channel = 0 ) 210 mapping.addIrq( pic, index = 16, isrtype = 'ISR_TTY_RX', channel = 0 ) 211 212 mapping.addGlobal( 'seg_nic', nic_base, nic_size, '__W_', 213 vtype = 'PERI', x = 0, y = 0, pseg = 'NIC', 214 local = False, big = True ) 215 216 mapping.addGlobal( 'seg_cma', cma_base, cma_size, '__W_', 217 vtype = 'PERI', x = 0, y = 0, pseg = 'CMA', 218 local = False, big = True ) 219 220 mapping.addGlobal( 'seg_fbf', fbf_base, fbf_size, '__W_', 221 vtype = 'PERI', x = 0, y = 0, pseg = 'FBF', 222 local = False, big = True ) 223 224 mapping.addGlobal( 'seg_pic', pic_base, pic_size, '__W_', 225 vtype = 'PERI', x = 0, y = 0, pseg = 'PIC', 226 local = False, big = True ) 213 227 214 228 ### hardware components replicated in all clusters … … 326 340 local = False, big = True ) 327 341 328 mapping.addGlobal( 'seg_nic', nic_base, nic_size, '__W_',329 vtype = 'PERI', x = 0, y = 0, pseg = 'NIC',330 local = False, big = True )331 332 mapping.addGlobal( 'seg_cma', cma_base, cma_size, '__W_',333 vtype = 'PERI', x = 0, y = 0, pseg = 'CMA',334 local = False, big = True )335 336 mapping.addGlobal( 'seg_fbf', fbf_base, fbf_size, '__W_',337 vtype = 'PERI', x = 0, y = 0, pseg = 'FBF',338 local = False, big = True )339 340 mapping.addGlobal( 'seg_pic', pic_base, pic_size, '__W_',341 vtype = 'PERI', x = 0, y = 0, pseg = 'PIC',342 local = False, big = True )343 344 342 ### global vsegs for internal peripherals : non local / small pages 345 343 ### allocated in all clusters with name indexed by (x,y) -
trunk/platforms/tsar_generic_leti/top.cpp
r803 r826 697 697 #endif 698 698 699 700 #if USE_PIC 699 701 ////////////////////////////////////////////////////////////////// 700 702 // IO bus and external peripherals in cluster[X_SIZE-1,Y_SIZE] … … 923 925 wt_iobus->p_dspin_rsp (signal_dspin_bound_rsp_in[X_SIZE-1][Y_SIZE-1][NORTH]); 924 926 927 #endif // USE_PIC 928 925 929 // Clock & RESET for clusters 926 930 for (size_t x = 0; x < (X_SIZE); x++) … … 1116 1120 } 1117 1121 1122 #if USE_PIC == 0 1123 signal_dspin_bound_cmd_in[X_SIZE-1][Y_SIZE-1][NORTH].write = false; 1124 signal_dspin_bound_rsp_out[X_SIZE-1][Y_SIZE-1][NORTH].read = true; 1125 signal_dspin_bound_cmd_out[X_SIZE-1][Y_SIZE-1][NORTH].read = true; 1126 signal_dspin_bound_rsp_in[X_SIZE-1][Y_SIZE-1][NORTH].write = false; 1127 #endif 1128 1118 1129 // set default values for VCI signals connected to unused ports on iobus 1119 1130 signal_vci_tgt_memc.rspval = false; … … 1234 1245 // clusters[1][1]->router_m2p->print_trace(); 1235 1246 1247 #if USE_PIC 1236 1248 // trace external ioc 1237 1249 bdev->print_trace(); … … 1243 1255 signal_vci_tgt_iopi.print_trace("[SIG]IOPI_TGT"); 1244 1256 signal_vci_ini_iopi.print_trace("[SIG]IOPI_INI"); 1257 #endif 1245 1258 1246 1259 // trace internal tty … … 1250 1263 } // end trace 1251 1264 1252 if (0) 1265 #if 0 1266 #if USE_PIC 1267 // trace BDV interrupts events 1268 if ( signal_irq_bdev.read() != prev_irq_bdev ) 1253 1269 { 1254 // trace BDV interrupts events 1255 if ( signal_irq_bdev.read() != prev_irq_bdev ) 1256 { 1257 prev_irq_bdev = signal_irq_bdev.read(); 1258 std::cout << std::dec << "@@@ IRQ_BDEV = " << signal_irq_bdev.read() 1259 << " at cycle " << n << std::endl; 1260 } 1261 1262 // trace TTY interrupts events 1263 for ( size_t x = 0 ; x < 8 ; x++ ) 1264 { 1265 if ( signal_irq_mtty_rx[x].read() != prev_irq_mtty_rx[x] ) 1266 { 1267 prev_irq_mtty_rx[x] = signal_irq_mtty_rx[x].read(); 1268 std::cout << std::dec << "@@@ IRQ_MTTY["<<x<<"] = " 1269 << signal_irq_mtty_rx[x].read() 1270 << " at cycle " << n << std::endl; 1271 } 1272 } 1273 1274 // trace processor interrupts events 1275 for ( size_t x = 0 ; x < X_SIZE ; x++ ) 1276 for ( size_t y = 0 ; y < Y_SIZE ; y++ ) 1277 for ( size_t i = 0 ; i < NB_PROCS_MAX ; i++ ) 1278 { 1279 if ( clusters[x][y]->signal_proc_irq[i] != prev_irq_proc[x][y][i] ) 1280 { 1270 prev_irq_bdev = signal_irq_bdev.read(); 1271 std::cout << std::dec << "@@@ IRQ_BDEV = " << signal_irq_bdev.read() 1272 << " at cycle " << n << std::endl; 1273 } 1274 1275 // trace TTY interrupts events 1276 for ( size_t x = 0 ; x < 8 ; x++ ) 1277 { 1278 if ( signal_irq_mtty_rx[x].read() != prev_irq_mtty_rx[x] ) 1279 { 1280 prev_irq_mtty_rx[x] = signal_irq_mtty_rx[x].read(); 1281 std::cout << std::dec << "@@@ IRQ_MTTY["<<x<<"] = " 1282 << signal_irq_mtty_rx[x].read() 1283 << " at cycle " << n << std::endl; 1284 } 1285 } 1286 // trace VCI transactions on IOPIC and XCU(0,0) 1287 signal_vci_tgt_iopi.print_trace("@@@ IOPI_TGT"); 1288 signal_vci_ini_iopi.print_trace("@@@ IOPI_INI"); 1289 #endif 1290 1291 // trace processor interrupts events 1292 for ( size_t x = 0 ; x < X_SIZE ; x++ ) 1293 for ( size_t y = 0 ; y < Y_SIZE ; y++ ) 1294 for ( size_t i = 0 ; i < NB_PROCS_MAX ; i++ ) 1295 { 1296 if ( clusters[x][y]->signal_proc_irq[i] != prev_irq_proc[x][y][i] ) 1297 { 1281 1298 prev_irq_proc[x][y][i] = clusters[x][y]->signal_proc_irq[i]; 1282 1299 std::cout << std::dec << "@@@ IRQ_PROC["<<x<<","<<y<<","<<i<<"] = " 1283 << clusters[x][y]->signal_proc_irq[i] 1284 << " at cycle " << n << std::endl; 1285 } 1286 } 1287 1288 // trace VCI transactions on IOPIC and XCU(0,0) 1289 signal_vci_tgt_iopi.print_trace("@@@ IOPI_TGT"); 1290 signal_vci_ini_iopi.print_trace("@@@ IOPI_INI"); 1291 clusters[0][0]->signal_vci_tgt_xicu.print_trace("@@@ XCU_0_0"); 1292 } 1300 << clusters[x][y]->signal_proc_irq[i] 1301 << " at cycle " << n << std::endl; 1302 } 1303 } 1304 1305 clusters[0][0]->signal_vci_tgt_xicu.print_trace("@@@ XCU_0_0"); 1306 #endif 1293 1307 1294 1308 sc_start(sc_core::sc_time(1, SC_NS));
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