Changeset 846 for branches/reconfiguration/modules/vci_cc_vcache_wrapper
- Timestamp:
- Oct 16, 2014, 10:57:43 AM (10 years ago)
- Location:
- branches/reconfiguration/modules/vci_cc_vcache_wrapper/caba/source
- Files:
-
- 2 edited
Legend:
- Unmodified
- Added
- Removed
-
branches/reconfiguration/modules/vci_cc_vcache_wrapper/caba/source/include/vci_cc_vcache_wrapper.h
r845 r846 277 277 }; 278 278 279 // enum transaction_type_d_e 280 // { 281 // // b0 : 1 if cached 282 // // b1 : 1 if instruction 283 // TYPE_DATA_UNC = 0x0, 284 // TYPE_DATA_MISS = 0x1, 285 // TYPE_INS_UNC = 0x2, 286 // TYPE_INS_MISS = 0x3, 287 // }; 279 // this enumeration type extends the ExternalAcessTypes defined in iss2.h 280 enum xtn_cop2_extension_e { 281 XTN_WDT_MAX = 26, // Read & Write the watchdog timer threshold 282 }; 288 283 289 284 public: -
branches/reconfiguration/modules/vci_cc_vcache_wrapper/caba/source/src/vci_cc_vcache_wrapper.cpp
r845 r846 2531 2531 break; 2532 2532 2533 case XTN_WDT_MAX: 2534 m_drsp.rdata = r_dcache_miss_wdt_max.read(); 2535 m_drsp.valid = true; 2536 m_drsp.error = false; 2537 break; 2538 2533 2539 default: 2534 2540 r_mmu_detr = MMU_READ_UNDEFINED_XTN; … … 2669 2675 r_dcache_fsm = DCACHE_IDLE; 2670 2676 break; 2677 2678 case XTN_WDT_MAX: 2679 r_dcache_miss_wdt_max = m_dreq.wdata; 2680 m_drsp.valid = true; 2681 r_dcache_fsm = DCACHE_IDLE; 2682 break; 2671 2683 2672 2684 case iss_t::XTN_DEBUG_MASK: // debug mask
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