Index: branches/reconfiguration/modules/vci_xicu/caba/source/include/vci_xicu.h
===================================================================
--- branches/reconfiguration/modules/vci_xicu/caba/source/include/vci_xicu.h	(revision 880)
+++ branches/reconfiguration/modules/vci_xicu/caba/source/include/vci_xicu.h	(revision 881)
@@ -2,21 +2,21 @@
  *
  * SOCLIB_LGPL_HEADER_BEGIN
- * 
+ *
  * This file is part of SoCLib, GNU LGPLv2.1.
- * 
+ *
  * SoCLib is free software; you can redistribute it and/or modify it
  * under the terms of the GNU Lesser General Public License as published
  * by the Free Software Foundation; version 2.1 of the License.
- * 
+ *
  * SoCLib is distributed in the hope that it will be useful, but
  * WITHOUT ANY WARRANTY; without even the implied warranty of
  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
  * Lesser General Public License for more details.
- * 
+ *
  * You should have received a copy of the GNU Lesser General Public
  * License along with SoCLib; if not, write to the Free Software
  * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
  * 02110-1301 USA
- * 
+ *
  * SOCLIB_LGPL_HEADER_END
  *
@@ -39,5 +39,5 @@
 template<typename vci_param>
 class VciXicu
-	: public caba::BaseModule
+    : public caba::BaseModule
 {
 private:
@@ -49,4 +49,5 @@
     const size_t                                    m_wti_count;
     const size_t                                    m_irq_count;
+    const size_t                                    m_cfg_count;
 
     uint32_t*                                       r_msk_pti;
@@ -59,14 +60,15 @@
     uint32_t                                        *r_pti_val;
     uint32_t                                        *r_wti_reg;
+    uint32_t                                        *r_cfg_reg;
 
     uint32_t                                        m_clock_cycles;
 
 
-    bool on_write( int                        seg, 
-                   typename vci_param::addr_t addr, 
-                   typename vci_param::data_t data, 
+    bool on_write( int                        seg,
+                   typename vci_param::addr_t addr,
+                   typename vci_param::data_t data,
                    int                        be );
-    bool on_read(  int                        seg, 
-                   typename vci_param::addr_t addr, 
+    bool on_read(  int                        seg,
+                   typename vci_param::addr_t addr,
                    typename vci_param::data_t &data );
 
@@ -84,17 +86,18 @@
     sc_core::sc_out<bool>*                         p_irq;
     sc_core::sc_in<bool>*                          p_hwi;
+    sc_core::sc_out<uint32_t>*                     p_cfg;
 
     void print_trace( size_t channel );
 
-	~VciXicu();
+    ~VciXicu();
 
-	VciXicu(
-		sc_core::sc_module_name name,
-		const soclib::common::MappingTable &mt,
-		const soclib::common::IntTab &index,
-        size_t pti_count,
-        size_t hwi_count,
-        size_t wti_count,
-        size_t irq_count);
+    VciXicu( sc_core::sc_module_name name,
+             const soclib::common::MappingTable &mt,
+             const soclib::common::IntTab &index,
+             size_t pti_count,
+             size_t hwi_count,
+             size_t wti_count,
+             size_t irq_count,
+             size_t cfg_count = 0 );
 
     soclib_static_assert(vci_param::B == 4);
Index: branches/reconfiguration/modules/vci_xicu/caba/source/src/vci_xicu.cpp
===================================================================
--- branches/reconfiguration/modules/vci_xicu/caba/source/src/vci_xicu.cpp	(revision 880)
+++ branches/reconfiguration/modules/vci_xicu/caba/source/src/vci_xicu.cpp	(revision 881)
@@ -2,21 +2,21 @@
  *
  * SOCLIB_LGPL_HEADER_BEGIN
- * 
+ *
  * This file is part of SoCLib, GNU LGPLv2.1.
- * 
+ *
  * SoCLib is free software; you can redistribute it and/or modify it
  * under the terms of the GNU Lesser General Public License as published
  * by the Free Software Foundation; version 2.1 of the License.
- * 
+ *
  * SoCLib is distributed in the hope that it will be useful, but
  * WITHOUT ANY WARRANTY; without even the implied warranty of
  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
  * Lesser General Public License for more details.
- * 
+ *
  * You should have received a copy of the GNU Lesser General Public
  * License along with SoCLib; if not, write to the Free Software
  * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
  * 02110-1301 USA
- * 
+ *
  * SOCLIB_LGPL_HEADER_END
  *
@@ -56,17 +56,17 @@
 
 //////////////////////////////////////////////////////
-tmpl(bool)::on_write( int                        seg, 
-                      typename vci_param::addr_t addr, 
-                      typename vci_param::data_t data, 
+tmpl(bool)::on_write( int                        seg,
+                      typename vci_param::addr_t addr,
+                      typename vci_param::data_t data,
                       int                        be)
 {
-	size_t cell = (size_t)addr / vci_param::B;
-	size_t idx = cell & 0x1f;
-	size_t func = (cell >> 5) & 0x1f;
+    size_t cell = (size_t)addr / vci_param::B;
+    size_t idx = cell & 0x1f;
+    size_t func = (cell >> 5) & 0x1f;
 
     if ( be != 0xf )
         return false;
 
-	switch (func) 
+    switch (func)
     {
         case XICU_WTI_REG:
@@ -76,5 +76,5 @@
 
 #if SOCLIB_MODULE_DEBUG
-std::cout << "[" << name() << "] Write WTI_REG[" << std::dec << idx << "] = "  
+std::cout << "[" << name() << "] Write WTI_REG[" << std::dec << idx << "] = "
 << std::hex << (int)data << std::dec << " time = " << m_clock_cycles << std::endl;
 #endif
@@ -84,10 +84,10 @@
         CHECK_BOUNDS(pti);
         r_pti_per[idx] = data;
-        if ( !data ) 
+        if ( !data )
         {
             r_pti_pending &= ~(1<<idx);
             r_pti_val[idx] = 0;
-        } 
-        else if (r_pti_val[idx] == 0) 
+        }
+        else if (r_pti_val[idx] == 0)
         {
             r_pti_val[idx] = data;
@@ -95,5 +95,5 @@
 
 #if SOCLIB_MODULE_DEBUG
-std::cout << "[" << name() << "] Write PTI_PER[" << std::dec << idx << "] = "  
+std::cout << "[" << name() << "] Write PTI_PER[" << std::dec << idx << "] = "
 << std::hex << (int)data << std::dec << " time = " << m_clock_cycles << std::endl;
 #endif
@@ -105,5 +105,5 @@
 
 #if SOCLIB_MODULE_DEBUG
-std::cout << "[" << name() << "] Write PTI_VAL[" << std::dec << idx << "] = "  
+std::cout << "[" << name() << "] Write PTI_VAL[" << std::dec << idx << "] = "
 << std::hex << (int)data << std::dec << " time = " << m_clock_cycles << std::endl;
 #endif
@@ -115,5 +115,5 @@
 
 #if SOCLIB_MODULE_DEBUG
-std::cout << "[" << name() << "] Write MASK_PTI[" << std::dec << idx << "] = "  
+std::cout << "[" << name() << "] Write MASK_PTI[" << std::dec << idx << "] = "
 << std::hex << (int)data << std::dec << " time = " << m_clock_cycles << std::endl;
 #endif
@@ -125,5 +125,5 @@
 
 #if SOCLIB_MODULE_DEBUG
-std::cout << "[" << name() << "] Write PTI_ENABLE[" << std::dec << idx << "] = "  
+std::cout << "[" << name() << "] Write PTI_ENABLE[" << std::dec << idx << "] = "
 << std::hex << (int)data << std::dec << " time = " << m_clock_cycles << std::endl;
 #endif
@@ -135,5 +135,5 @@
 
 #if SOCLIB_MODULE_DEBUG
-std::cout << "[" << name() << "] Write PTI_DISABLE[" << std::dec << idx << "] = "  
+std::cout << "[" << name() << "] Write PTI_DISABLE[" << std::dec << idx << "] = "
 << std::hex << (int)data << std::dec << " time = " << m_clock_cycles << std::endl;
 #endif
@@ -145,5 +145,5 @@
 
 #if SOCLIB_MODULE_DEBUG
-std::cout << "[" << name() << "] Write MSK_HWI[" << std::dec << idx << "] = "  
+std::cout << "[" << name() << "] Write MSK_HWI[" << std::dec << idx << "] = "
 << std::hex << (int)data << std::dec << " time = " << m_clock_cycles << std::endl;
 #endif
@@ -155,5 +155,5 @@
 
 #if SOCLIB_MODULE_DEBUG
-std::cout << "[" << name() << "] Write HWI_ENABLE[" << std::dec << idx << "] = "  
+std::cout << "[" << name() << "] Write HWI_ENABLE[" << std::dec << idx << "] = "
 << std::hex << (int)data << std::dec << " time = " << m_clock_cycles << std::endl;
 #endif
@@ -165,5 +165,5 @@
 
 #if SOCLIB_MODULE_DEBUG
-std::cout << "[" << name() << "] Write HWI_DISABLE[" << std::dec << idx << "] = "  
+std::cout << "[" << name() << "] Write HWI_DISABLE[" << std::dec << idx << "] = "
 << std::hex << (int)data << std::dec << " time = " << m_clock_cycles << std::endl;
 #endif
@@ -175,5 +175,5 @@
 
 #if SOCLIB_MODULE_DEBUG
-std::cout << "[" << name() << "] Write MSK_WTI[" << std::dec << idx << "] = "  
+std::cout << "[" << name() << "] Write MSK_WTI[" << std::dec << idx << "] = "
 << std::hex << (int)data << std::dec << " time = " << m_clock_cycles << std::endl;
 #endif
@@ -185,5 +185,5 @@
 
 #if SOCLIB_MODULE_DEBUG
-std::cout << "[" << name() << "] Write WTI_ENABLE[" << std::dec << idx << "] = "  
+std::cout << "[" << name() << "] Write WTI_ENABLE[" << std::dec << idx << "] = "
 << std::hex << (int)data << std::dec << " time = " << m_clock_cycles << std::endl;
 #endif
@@ -195,30 +195,40 @@
 
 #if SOCLIB_MODULE_DEBUG
-std::cout << "[" << name() << "] Write WTI_DISABLE[" << std::dec << idx << "] = "  
-<< std::hex << (int)data << std::dec << " time = " << m_clock_cycles << std::endl;
-#endif
-        return true;
-	}
-	return false;
+std::cout << "[" << name() << "] Write WTI_DISABLE[" << std::dec << idx << "] = "
+<< std::hex << (int)data << std::dec << " time = " << m_clock_cycles << std::endl;
+#endif
+        return true;
+
+        case XICU_CFG_REG:
+        CHECK_BOUNDS(cfg);
+        r_cfg_reg[idx] = data;
+
+#if SOCLIB_MODULE_DEBUG
+std::cout << "[" << name() << "] Write CFG_REG[" << std::dec << idx << "] = "
+<< std::hex << (int)data << std::dec << " time = " << m_clock_cycles << std::endl;
+#endif
+        return true;
+    }
+    return false;
 } // end on_write()
 
 /////////////////////////////////////////////////////
-tmpl(bool)::on_read( int                        seg, 
-                     typename vci_param::addr_t addr, 
+tmpl(bool)::on_read( int                        seg,
+                     typename vci_param::addr_t addr,
                      typename vci_param::data_t &data)
 {
-	size_t cell = (size_t)addr / vci_param::B;
+    size_t cell = (size_t)addr / vci_param::B;
     size_t idx = cell & 0x1f;
-	size_t func = (cell >> 5) & 0x1f;
-
-	switch (func) 
+    size_t func = (cell >> 5) & 0x1f;
+
+    switch (func)
     {
     case XICU_WTI_REG:
         CHECK_BOUNDS(wti);
         data = r_wti_reg[idx];
-        r_wti_pending &= ~(1<<idx);        
-
-#if SOCLIB_MODULE_DEBUG
-std::cout << "[" << name() << "] Read XICU_WTI_REG[" << std::dec << idx << "] = " 
+        r_wti_pending &= ~(1<<idx);
+
+#if SOCLIB_MODULE_DEBUG
+std::cout << "[" << name() << "] Read XICU_WTI_REG[" << std::dec << idx << "] = "
 << std::hex << (int)data << std::dec << " time = " << m_clock_cycles << std::endl;
 #endif
@@ -230,5 +240,5 @@
 
 #if SOCLIB_MODULE_DEBUG
-std::cout << "[" << name() << "] Read XICU_PTI_PER[" << std::dec << idx << "] = " 
+std::cout << "[" << name() << "] Read XICU_PTI_PER[" << std::dec << idx << "] = "
 << std::hex << (int)data << std::dec << " time = " << m_clock_cycles << std::endl;
 #endif
@@ -240,5 +250,5 @@
 
 #if SOCLIB_MODULE_DEBUG
-std::cout << "[" << name() << "] Read XICU_PTI_VAL[" << std::dec << idx << "] = " 
+std::cout << "[" << name() << "] Read XICU_PTI_VAL[" << std::dec << idx << "] = "
 << std::hex << (int)data << std::dec << " time = " << m_clock_cycles << std::endl;
 #endif
@@ -251,5 +261,5 @@
 
 #if SOCLIB_MODULE_DEBUG
-std::cout << "[" << name() << "] Read XICU_PTI_ACK[" << std::dec << idx << "] = " 
+std::cout << "[" << name() << "] Read XICU_PTI_ACK[" << std::dec << idx << "] = "
 << std::hex << (int)data << std::dec << " time = " << m_clock_cycles << std::endl;
 #endif
@@ -261,5 +271,5 @@
 
 #if SOCLIB_MODULE_DEBUG
-std::cout << "[" << name() << "] Read XICU_MSK_PTI[" << std::dec << idx << "] = " 
+std::cout << "[" << name() << "] Read XICU_MSK_PTI[" << std::dec << idx << "] = "
 << std::hex << (int)data << std::dec << " time = " << m_clock_cycles << std::endl;
 #endif
@@ -271,5 +281,5 @@
 
 #if SOCLIB_MODULE_DEBUG
-std::cout << "[" << name() << "] Read XICU_PTI_ACTIVE[" << std::dec << idx << "] = " 
+std::cout << "[" << name() << "] Read XICU_PTI_ACTIVE[" << std::dec << idx << "] = "
 << std::hex << (int)data << std::dec << " time = " << m_clock_cycles << std::endl;
 #endif
@@ -281,5 +291,5 @@
 
 #if SOCLIB_MODULE_DEBUG
-std::cout << "[" << name() << "] Read XICU_MSK_HWI[" << std::dec << idx << "] = " 
+std::cout << "[" << name() << "] Read XICU_MSK_HWI[" << std::dec << idx << "] = "
 << std::hex << (int)data << std::dec << " time = " << m_clock_cycles << std::endl;
 #endif
@@ -291,5 +301,5 @@
 
 #if SOCLIB_MODULE_DEBUG
-std::cout << "[" << name() << "] Read XICU_HWI_ACTIVE[" << std::dec << idx << "] = " 
+std::cout << "[" << name() << "] Read XICU_HWI_ACTIVE[" << std::dec << idx << "] = "
 << std::hex << (int)data << std::dec << " time = " << m_clock_cycles << std::endl;
 #endif
@@ -301,5 +311,5 @@
 
 #if SOCLIB_MODULE_DEBUG
-std::cout << "[" << name() << "] Read XICU_MSK_WTI[" << std::dec << idx << "] = " 
+std::cout << "[" << name() << "] Read XICU_MSK_WTI[" << std::dec << idx << "] = "
 << std::hex << (int)data << std::dec << " time = " << m_clock_cycles << std::endl;
 #endif
@@ -311,5 +321,5 @@
 
 #if SOCLIB_MODULE_DEBUG
-std::cout << "[" << name() << "] Read XICU_WTI_ACTIVE[" << std::dec << idx << "] = " 
+std::cout << "[" << name() << "] Read XICU_WTI_ACTIVE[" << std::dec << idx << "] = "
 << std::hex << (int)data << std::dec << " time = " << m_clock_cycles << std::endl;
 #endif
@@ -318,5 +328,5 @@
         case XICU_PRIO:
         CHECK_BOUNDS(irq);
-        data = 
+        data =
             (((r_msk_pti[idx] & r_pti_pending) ? 1 : 0) << 0) |
             (((r_msk_hwi[idx] & r_hwi_pending) ? 1 : 0) << 1) |
@@ -327,5 +337,5 @@
 
 #if SOCLIB_MODULE_DEBUG
-std::cout << "[" << name() << "] Read XICU_PRIO[" << std::dec << idx << "] = " 
+std::cout << "[" << name() << "] Read XICU_PRIO[" << std::dec << idx << "] = "
 << std::hex << (int)data << std::dec << " time = " << m_clock_cycles << std::endl;
 #endif
@@ -338,6 +348,16 @@
 #endif
         return true;
-	}
-	return false;
+
+    case XICU_CFG_REG:
+        CHECK_BOUNDS(cfg);
+        data = r_cfg_reg[idx];
+
+#if SOCLIB_MODULE_DEBUG
+std::cout << "[" << name() << "] Read XICU_CFG_REG[" << std::dec << idx << "] = "
+<< std::hex << (int)data << std::dec << " time = " << m_clock_cycles << std::endl;
+#endif
+        return true;
+    }
+    return false;
 } // end on_read()
 
@@ -349,9 +369,9 @@
 #endif
 
-	if (!p_resetn.read()) 
-    {
-		m_vci_fsm.reset();
-
-        for ( size_t i = 0; i<m_pti_count; ++i ) 
+    if (!p_resetn.read())
+    {
+        m_vci_fsm.reset();
+
+        for ( size_t i = 0; i<m_pti_count; ++i )
         {
             r_pti_per[i] = 0;
@@ -362,5 +382,5 @@
             r_wti_reg[i] = 0;
         }
-        for ( size_t i = 0; i<m_irq_count; ++i ) 
+        for ( size_t i = 0; i<m_irq_count; ++i )
         {
             r_msk_pti[i] = 0;
@@ -368,17 +388,21 @@
             r_msk_hwi[i] = 0;
         }
+        for ( size_t i = 0; i<m_cfg_count; ++i )
+        {
+            r_cfg_reg[i] = 0;
+        }
         r_pti_pending = 0;
         r_wti_pending = 0;
         r_hwi_pending = 0;
 
-		return;
-	}
+        return;
+    }
 
     // update timer interrupt vector
-    for ( size_t i = 0; i<m_pti_count; ++i ) 
+    for ( size_t i = 0; i<m_pti_count; ++i )
     {
         uint32_t per = r_pti_per[i];
 
-        if ( per && --r_pti_val[i] == 0 ) 
+        if ( per && --r_pti_val[i] == 0 )
         {
             r_pti_pending |= 1<<i;
@@ -387,5 +411,5 @@
     }
 
-    // update pending hardware interrupt vector 
+    // update pending hardware interrupt vector
     uint32_t hwi_pending = 0;
     for ( size_t i = 0; i<m_hwi_count; ++i )
@@ -393,5 +417,5 @@
     r_hwi_pending = hwi_pending;
 
-	m_vci_fsm.transition();
+    m_vci_fsm.transition();
 }
 
@@ -401,9 +425,9 @@
     assert( (channel < m_irq_count) and
     "ERROR in XICU print_trace() : channel larger than proc number");
-   
+
     std::cout << "XICU " << name() << std::hex
               << " / HWI_MASK = " << r_msk_hwi[channel]
               << " / SWI_MASK = " << r_msk_wti[channel]
-              << " / PTI_MASK = " << r_msk_pti[channel] 
+              << " / PTI_MASK = " << r_msk_pti[channel]
               << " / HWI = " << r_hwi_pending
               << " / WTI = " << r_wti_pending
@@ -415,8 +439,8 @@
 tmpl(void)::genMoore()
 {
-	m_vci_fsm.genMoore();
+    m_vci_fsm.genMoore();
 
     // output irqs
-    for ( size_t i = 0; i<m_irq_count; ++i ) 
+    for ( size_t i = 0; i<m_irq_count; ++i )
     {
         bool b = (r_msk_pti[i] & r_pti_pending) ||
@@ -428,4 +452,10 @@
 #endif
         p_irq[i] = b;
+    }
+
+    // output cfg registers
+    for ( size_t i = 0; i<m_cfg_count; ++i )
+    {
+        p_cfg[i] = r_cfg_reg[i];
     }
 }
@@ -438,5 +468,6 @@
                      size_t                  hwi_count,
                      size_t                  wti_count,
-                     size_t                  irq_count )
+                     size_t                  irq_count,
+                     size_t                  cfg_count )
            : caba::BaseModule(name),
            m_seglist(mt.getSegmentList(index)),
@@ -446,4 +477,5 @@
            m_wti_count(wti_count),
            m_irq_count(irq_count),
+           m_cfg_count(cfg_count),
            r_msk_pti(new uint32_t[irq_count]),
            r_msk_wti(new uint32_t[irq_count]),
@@ -469,16 +501,22 @@
         std::cout << "    => segment " << seg->name()
                   << " / base = " << std::hex << seg->baseAddress()
-                  << " / size = " << seg->size() << std::endl; 
-    }
- 
-	m_vci_fsm.on_read_write( on_read, on_write );
-
-	SC_METHOD(transition);
-	dont_initialize();
-	sensitive << p_clk.pos();
-
-	SC_METHOD(genMoore);
-	dont_initialize();
-	sensitive << p_clk.neg();
+                  << " / size = " << seg->size() << std::endl;
+    }
+
+    if ( cfg_count > 0 )
+    {
+        r_cfg_reg = new uint32_t[cfg_count];
+        p_cfg = soclib::common::alloc_elems<sc_core::sc_out<uint32_t> >("cfg", cfg_count);
+    }
+
+    m_vci_fsm.on_read_write( on_read, on_write );
+
+    SC_METHOD(transition);
+    dont_initialize();
+    sensitive << p_clk.pos();
+
+    SC_METHOD(genMoore);
+    dont_initialize();
+    sensitive << p_clk.neg();
 }
 
@@ -494,4 +532,9 @@
     soclib::common::dealloc_elems(p_irq, m_irq_count);
     soclib::common::dealloc_elems(p_hwi, m_hwi_count);
+    if ( m_cfg_count > 0 )
+    {
+        delete [] r_cfg_reg;
+        soclib::common::dealloc_elems(p_cfg, m_cfg_count);
+    }
 }
 
