Index: trunk/modules/vci_mem_cache/caba/source/src/vci_mem_cache.cpp =================================================================== --- trunk/modules/vci_mem_cache/caba/source/src/vci_mem_cache.cpp (revision 836) +++ trunk/modules/vci_mem_cache/caba/source/src/vci_mem_cache.cpp (revision 891) @@ -1243,6 +1243,8 @@ // The TGT_CMD_FSM controls the incoming VCI command pakets from the processors, // and dispatch these commands to the proper FSM through dedicated FIFOs. + // These READ/WRITE commands can be for the XRAM segment, or for the + // CONFIG segment: // - // There are 5 types of commands accepted in the XRAM segment: + // There are 5 types of commands accepted for the XRAM segment: // - READ : A READ request has a length of 1 VCI flit. It can be a single word // or an entire cache line, depending on the PLEN value => READ FSM @@ -1254,5 +1256,5 @@ // acces key, second flit the data to write => WRITE FSM. // - // The READ/WRITE commands accepted in the configuration segment are targeting + // The READ/WRITE commands accepted for the CONFIG segment are targeting // configuration or status registers. They must contain one single flit. // - For almost all addressable registers, the response is returned immediately. @@ -1268,11 +1270,9 @@ { #if DEBUG_MEMC_TGT_CMD - if (m_debug) - { - std::cout << " Receive command from srcid " - << std::hex << p_vci_tgt.srcid.read() - << " / address " << std::hex << p_vci_tgt.address.read() << std::endl; - } +if (m_debug) +std::cout << " Receive command from srcid " + << std::hex << p_vci_tgt.srcid.read() + << " / address " << std::hex << p_vci_tgt.address.read() << std::endl; #endif // checking segmentation violation @@ -1307,5 +1307,5 @@ // ==> mask = 0b0100 = 0x4 assert(((p_vci_tgt.pktid.read() & 0x4) == 0x0) and - "The type specified in the pktid field is incompatible with the READ CMD"); + "The type specified in the pktid field is incompatible with the READ CMD"); r_tgt_cmd_fsm = TGT_CMD_READ; } @@ -1315,6 +1315,7 @@ // ==> TYPE_WRITE = X100 with the TSAR encoding // ==> mask = 0b0111 = 0x7 - assert((((p_vci_tgt.pktid.read() & 0x7) == 0x4) or ((p_vci_tgt.pktid.read() & 0x7) == 0x0)) and - "The type specified in the pktid field is incompatible with the WRITE CMD"); + assert((((p_vci_tgt.pktid.read() & 0x7) == 0x4) or + ((p_vci_tgt.pktid.read() & 0x7) == 0x0)) and + "The type specified in the pktid field is incompatible with the WRITE CMD"); r_tgt_cmd_fsm = TGT_CMD_WRITE; } @@ -1325,5 +1326,5 @@ // ==> mask = 0b0111 = 0x7 assert(((p_vci_tgt.pktid.read() & 0x7) == 0x6) and - "The type specified in the pktid field is incompatible with the LL CMD"); + "The type specified in the pktid field is incompatible with the LL CMD"); r_tgt_cmd_fsm = TGT_CMD_READ; } @@ -1337,5 +1338,5 @@ // ==> mask = 0b0101 = 0x5 assert(((p_vci_tgt.pktid.read() & 0x5) == 0x5) and - "The type specified in the pktid field is incompatible with the NOP CMD"); + "The type specified in the pktid field is incompatible with the NOP CMD"); if ((p_vci_tgt.pktid.read() & 0x7) == TYPE_CAS) @@ -1356,5 +1357,5 @@ break; - /////////////////// + /////////////////// case TGT_CMD_ERROR: // response error must be sent @@ -1373,19 +1374,17 @@ #if DEBUG_MEMC_TGT_CMD - if (m_debug) - { - std::cout << " Segmentation violation:" - << " address = " << std::hex << p_vci_tgt.address.read() - << " / srcid = " << p_vci_tgt.srcid.read() - << " / trdid = " << p_vci_tgt.trdid.read() - << " / pktid = " << p_vci_tgt.pktid.read() - << " / plen = " << std::dec << p_vci_tgt.plen.read() << std::endl; - } -#endif - } - break; - - //////////////////// +if (m_debug) +std::cout << " Segmentation violation:" + << " address = " << std::hex << p_vci_tgt.address.read() + << " / srcid = " << p_vci_tgt.srcid.read() + << " / trdid = " << p_vci_tgt.trdid.read() + << " / pktid = " << p_vci_tgt.pktid.read() + << " / plen = " << std::dec << p_vci_tgt.plen.read() << std::endl; +#endif + } + break; + + //////////////////// case TGT_CMD_CONFIG: // execute config request and return response { @@ -1435,10 +1434,7 @@ addr_t addr_lsb = p_vci_tgt.address.read() & m_config_addr_mask; - - addr_t cell = (addr_lsb / vci_param_int::B); - - size_t regr = cell & m_config_regr_idx_mask; - - size_t func = (cell >> m_config_regr_width) & m_config_func_idx_mask; + addr_t cell = (addr_lsb / vci_param_int::B); + size_t regr = cell & m_config_regr_idx_mask; + size_t func = (cell >> m_config_regr_width) & m_config_func_idx_mask; bool need_rsp; @@ -1471,5 +1467,5 @@ { assert(((wdata % (m_words * vci_param_int::B)) == 0) and - "VCI_MEM_CACHE CONFIG ERROR: The buffer must be aligned on a cache line"); + "VCI_MEM_CACHE CONFIG ERROR: The buffer must be aligned on a cache line"); need_rsp = true; @@ -2063,11 +2059,9 @@ #if DEBUG_MEMC_CONFIG - if (m_debug) - { - std::cout << " Config Request received" - << " / address = " << std::hex << r_config_address.read() - << " / lines = " << std::dec << r_config_cmd_lines.read() - << " / type = " << r_config_cmd.read() << std::endl; - } +if (m_debug) +std::cout << " Config Request received" + << " / address = " << std::hex << r_config_address.read() + << " / lines = " << std::dec << r_config_cmd_lines.read() + << " / type = " << r_config_cmd.read() << std::endl; #endif } @@ -2088,11 +2082,9 @@ #if DEBUG_MEMC_CONFIG - if (m_debug) - { - std::cout << " " - << " / address = " << std::hex << r_config_address.read() - << " / lines not handled = " << std::dec << r_config_cmd_lines.read() - << " / command = " << r_config_cmd.read() << std::endl; - } +if (m_debug) +std::cout << " " + << " / address = " << std::hex << r_config_address.read() + << " / lines not handled = " << std::dec << r_config_cmd_lines.read() + << " / command = " << r_config_cmd.read() << std::endl; #endif break; @@ -2107,9 +2099,7 @@ #if DEBUG_MEMC_CONFIG - if (m_debug) - { - std::cout << " " - << " / lines to do = " << std::dec << r_config_rsp_lines.read() << std::endl; - } +if (m_debug) +std::cout << " " + << " / lines to do = " << std::dec << r_config_rsp_lines.read() << std::endl; #endif break; @@ -2128,12 +2118,10 @@ #if DEBUG_MEMC_CONFIG - if (m_debug) - { - std::cout << " Request TGT_RSP FSM to send response:" - << " error = " << r_config_to_tgt_rsp_error.read() - << " / rsrcid = " << std::hex << r_config_srcid.read() - << " / rtrdid = " << std::hex << r_config_trdid.read() - << " / rpktid = " << std::hex << r_config_pktid.read() << std::endl; - } +if (m_debug) +std::cout << " Request TGT_RSP FSM to send response:" + << " error = " << r_config_to_tgt_rsp_error.read() + << " / rsrcid = " << std::hex << r_config_srcid.read() + << " / rtrdid = " << std::hex << r_config_trdid.read() + << " / rpktid = " << std::hex << r_config_pktid.read() << std::endl; #endif } @@ -2149,9 +2137,7 @@ #if DEBUG_MEMC_CONFIG - if (m_debug) - { - std::cout << " " - << " Request DIR access" << std::endl; - } +if (m_debug) +std::cout << " " + << " Request DIR access" << std::endl; #endif break; @@ -2193,13 +2179,11 @@ #if DEBUG_MEMC_CONFIG - if (m_debug) - { - std::cout << " Accessing directory: " - << " address = " << std::hex << r_config_address.read() - << " / hit = " << std::dec << entry.valid - << " / dirty = " << entry.dirty - << " / count = " << entry.count - << " / is_cnt = " << entry.is_cnt << std::endl; - } +if (m_debug) +std::cout << " Accessing directory: " + << " address = " << std::hex << r_config_address.read() + << " / hit = " << std::dec << entry.valid + << " / dirty = " << entry.dirty + << " / count = " << entry.count + << " / is_cnt = " << entry.is_cnt << std::endl; #endif break; @@ -2248,10 +2232,8 @@ #if DEBUG_MEMC_CONFIG - if (m_debug) - { - std::cout << " Access TRT: " - << " wok = " << std::dec << wok - << " index = " << index << std::endl; - } +if (m_debug) +std::cout << " Access TRT: " + << " wok = " << std::dec << wok + << " index = " << index << std::endl; #endif } @@ -2260,5 +2242,5 @@ //////////////////// case CONFIG_TRT_SET: // read data in cache - // and post a PUT request in TRT + // and post a PUT request in TRT { assert((r_alloc_dir_fsm.read() == ALLOC_DIR_CONFIG) and @@ -2297,10 +2279,8 @@ #if DEBUG_MEMC_CONFIG - if (m_debug) - { - std::cout << " PUT request in TRT:" - << " address = " << std::hex << r_config_address.read() - << " index = " << std::dec << r_config_trt_index.read() << std::endl; - } +if (m_debug) +std::cout << " PUT request in TRT:" + << " address = " << std::hex << r_config_address.read() + << " index = " << std::dec << r_config_trt_index.read() << std::endl; #endif break; @@ -2320,9 +2300,7 @@ #if DEBUG_MEMC_CONFIG - if (m_debug) - { - std::cout << " post PUT request to IXR_CMD_FSM" - << " / address = " << std::hex << r_config_address.read() << std::endl; - } +if (m_debug) +std::cout << " post PUT request to IXR_CMD_FSM" + << " / address = " << std::hex << r_config_address.read() << std::endl; #endif } @@ -2352,9 +2330,7 @@ #if DEBUG_MEMC_CONFIG - if (m_debug) - { - std::cout << " " - << " No copies in L1 : inval DIR entry" << std::endl; - } +if (m_debug) +std::cout << " " + << " No copies in L1 : inval DIR entry" << std::endl; #endif } @@ -2396,11 +2372,9 @@ #if DEBUG_MEMC_CONFIG - if (m_debug) - { - std::cout << " " - << " Inval DIR entry and register inval in IVT" - << " / index = " << std::dec << index - << " / broadcast = " << broadcast << std::endl; - } +if (m_debug) +std::cout << " " + << " Inval DIR entry and register inval in IVT" + << " / index = " << std::dec << index + << " / broadcast = " << broadcast << std::endl; #endif } @@ -2410,9 +2384,7 @@ #if DEBUG_MEMC_CONFIG - if (m_debug) - { - std::cout << " " - << " IVT full : release DIR & IVT locks and retry" << std::endl; - } +if (m_debug) +std::cout << " " + << " IVT full : release DIR & IVT locks and retry" << std::endl; #endif } @@ -2439,10 +2411,8 @@ #if DEBUG_MEMC_CONFIG - if (m_debug) - { - std::cout << " " - << " Post a broadcast inval request to CC_SEND FSM" - << " / address = " << r_config_address.read() <" + << " Post a broadcast inval request to CC_SEND FSM" + << " / address = " << r_config_address.read() <" + << " Post multi inval request to CC_SEND FSM" + << " / address = " << std::hex << r_config_address.read() + << " / copy = " << r_config_dir_copy_srcid.read() + << " / inst = " << std::dec << r_config_dir_copy_inst.read() << std::endl; +#endif + } + break; + } + ///////////////////// + case CONFIG_HEAP_REQ: // Try to get access to Heap + { + if (r_alloc_heap_fsm.read() == ALLOC_HEAP_CONFIG) + { + r_config_fsm = CONFIG_HEAP_SCAN; + r_config_heap_next = r_config_dir_ptr.read(); + } + +#if DEBUG_MEMC_CONFIG +if (m_debug) +std::cout << " " + << " Requesting HEAP lock" << std::endl; +#endif + break; + } + ////////////////////// + case CONFIG_HEAP_SCAN: // scan HEAP and send inval to CC_SEND FSM + { + HeapEntry entry = m_heap.read(r_config_heap_next.read()); + bool last_copy = (entry.next == r_config_heap_next.read()); + + // post one more copy into fifo + config_to_cc_send_fifo_srcid = entry.owner.srcid; + config_to_cc_send_fifo_inst = entry.owner.inst; + config_to_cc_send_fifo_put = true; + + assert ( (m_config_to_cc_send_inst_fifo.wok()) and + "MEMC ERROR in CONFIG_HEAP_SCAN: The m_config_to_cc_send fifo should never overflow"); + + r_config_heap_next = entry.next; + if (last_copy) { // post multi inval request @@ -2461,77 +2498,16 @@ r_config_to_cc_send_nline = m_nline[(addr_t)(r_config_address.read())]; - // post data into FIFO - config_to_cc_send_fifo_srcid = r_config_dir_copy_srcid.read(); - config_to_cc_send_fifo_inst = r_config_dir_copy_inst.read(); - config_to_cc_send_fifo_put = true; - - if (r_config_dir_count.read() == 1) // one copy - { - // prepare next iteration - r_config_cmd_lines = r_config_cmd_lines.read() - 1; - r_config_address = r_config_address.read() + (m_words << 2); - r_config_fsm = CONFIG_LOOP; - } - else // several copies - { - r_config_fsm = CONFIG_HEAP_REQ; - } - + // prepare next iteration (next line to be invalidated) + r_config_cmd_lines = r_config_cmd_lines.read() - 1; + r_config_address = r_config_address.read() + (m_words << 2); + r_config_fsm = CONFIG_HEAP_LAST; + } #if DEBUG_MEMC_CONFIG - if (m_debug) - { - std::cout << " " - << " Post multi inval request to CC_SEND FSM" - << " / address = " << std::hex << r_config_address.read() - << " / copy = " << r_config_dir_copy_srcid.read() - << " / inst = " << std::dec << r_config_dir_copy_inst.read() << std::endl; - } -#endif - } - break; - } - ///////////////////// - case CONFIG_HEAP_REQ: // Try to get access to Heap - { - if (r_alloc_heap_fsm.read() == ALLOC_HEAP_CONFIG) - { - r_config_fsm = CONFIG_HEAP_SCAN; - r_config_heap_next = r_config_dir_ptr.read(); - } - -#if DEBUG_MEMC_CONFIG - if (m_debug) - { - std::cout << " " - << " Requesting HEAP lock" << std::endl; - } -#endif - break; - } - ////////////////////// - case CONFIG_HEAP_SCAN: // scan HEAP and send inval to CC_SEND FSM - { - HeapEntry entry = m_heap.read(r_config_heap_next.read()); - bool last_copy = (entry.next == r_config_heap_next.read()); - - config_to_cc_send_fifo_srcid = entry.owner.srcid; - config_to_cc_send_fifo_inst = entry.owner.inst; - config_to_cc_send_fifo_put = true; - - if (m_config_to_cc_send_inst_fifo.wok()) // inval request accepted - { - r_config_heap_next = entry.next; - if (last_copy) r_config_fsm = CONFIG_HEAP_LAST; - } - -#if DEBUG_MEMC_CONFIG - if (m_debug) - { - std::cout << " " - << " Post multi inval request to CC_SEND FSM" - << " / address = " << std::hex << r_config_address.read() - << " / copy = " << entry.owner.srcid - << " / inst = " << std::dec << entry.owner.inst << std::endl; - } +if (m_debug) +std::cout << " " + << " Post multi inval request to CC_SEND FSM" + << " / address = " << std::hex << r_config_address.read() + << " / copy = " << entry.owner.srcid + << " / inst = " << std::dec << entry.owner.inst << std::endl; #endif break; @@ -2558,15 +2534,10 @@ m_heap.write(r_config_heap_next.read(), last_entry); - // prepare next iteration - r_config_cmd_lines = r_config_cmd_lines.read() - 1; - r_config_address = r_config_address.read() + (m_words << 2); r_config_fsm = CONFIG_LOOP; #if DEBUG_MEMC_CONFIG - if (m_debug) - { - std::cout << " " - << " Heap housekeeping" << std::endl; - } +if (m_debug) +std::cout << " " + << " Heap housekeeping" << std::endl; #endif break; @@ -5309,11 +5280,9 @@ #if DEBUG_MEMC_CLEANUP - if (m_debug) - { - std::cout << " Cleanup request:" << std::hex - << " owner_id = " << srcid - << " / owner_ins = " << (type == DspinDhccpParam::TYPE_CLEANUP_INST) << std::endl; - } +if (m_debug) +std::cout << " Cleanup request:" << std::hex + << " owner_id = " << srcid + << " / owner_ins = " << (type == DspinDhccpParam::TYPE_CLEANUP_INST) << std::endl; #endif break; @@ -5334,10 +5303,8 @@ #if DEBUG_MEMC_CLEANUP - if (m_debug) - { - std::cout << " Cleanup request:" - << " address = " << std::hex << nline * m_words * 4 << std::endl; - } +if (m_debug) +std::cout << " Cleanup request:" + << " address = " << std::hex << nline * m_words * 4 << std::endl; #endif break; @@ -5351,8 +5318,6 @@ #if DEBUG_MEMC_CLEANUP - if (m_debug) - { - std::cout << " Requesting DIR lock" << std::endl; - } +if (m_debug) +std::cout << " Requesting DIR lock" << std::endl; #endif break; @@ -5398,17 +5363,15 @@ #if DEBUG_MEMC_CLEANUP - if (m_debug) - { - std::cout << " Test directory status: " - << std::hex << " address = " << cleanup_address - << " / hit = " << entry.valid - << " / dir_id = " << entry.owner.srcid - << " / dir_ins = " << entry.owner.inst - << " / search_id = " << r_cleanup_srcid.read() - << " / search_ins = " << r_cleanup_inst.read() - << " / count = " << entry.count - << " / is_cnt = " << entry.is_cnt << std::endl; - } +if (m_debug) +std::cout << " Test directory status: " + << std::hex << " address = " << cleanup_address + << " / hit = " << entry.valid + << " / dir_id = " << entry.owner.srcid + << " / dir_ins = " << entry.owner.inst + << " / search_id = " << r_cleanup_srcid.read() + << " / search_ins = " << r_cleanup_inst.read() + << " / count = " << entry.count + << " / is_cnt = " << entry.is_cnt << std::endl; #endif break; @@ -5446,14 +5409,12 @@ #if DEBUG_MEMC_CLEANUP - if (m_debug) - { - std::cout << " Update directory:" - << std::hex << " address = " << r_cleanup_nline.read() * m_words * 4 - << " / dir_id = " << entry.owner.srcid - << " / dir_ins = " << entry.owner.inst - << " / count = " << entry.count - << " / is_cnt = " << entry.is_cnt << std::endl; - } +if (m_debug) +std::cout << " Update directory:" + << std::hex << " address = " << r_cleanup_nline.read() * m_words * 4 + << " / dir_id = " << entry.owner.srcid + << " / dir_ins = " << entry.owner.inst + << " / count = " << entry.count + << " / is_cnt = " << entry.is_cnt << std::endl; #endif @@ -5468,9 +5429,7 @@ #if DEBUG_MEMC_CLEANUP - if (m_debug) - { - std::cout << " HEAP lock acquired " << std::endl; - } +if (m_debug) +std::cout << " HEAP lock acquired " << std::endl; #endif break; @@ -5478,6 +5437,6 @@ ////////////////////// case CLEANUP_HEAP_LOCK: // two cases are handled in this state : - // 1. the matching copy is directly in the directory - // 2. the matching copy is the first copy in the heap + // 1. the matching copy is directly in the directory + // 2. the matching copy is the first copy in the heap { assert((r_alloc_heap_fsm.read() == ALLOC_HEAP_CLEANUP) and @@ -5556,16 +5515,14 @@ #if DEBUG_MEMC_CLEANUP - if (m_debug) - { - std::cout << " Checks matching:" - << " address = " << r_cleanup_nline.read() * m_words * 4 - << " / dir_id = " << r_cleanup_copy.read() - << " / dir_ins = " << r_cleanup_copy_inst.read() - << " / heap_id = " << heap_entry.owner.srcid - << " / heap_ins = " << heap_entry.owner.inst - << " / search_id = " << r_cleanup_srcid.read() - << " / search_ins = " << r_cleanup_inst.read() << std::endl; - } +if (m_debug) +std::cout << " Checks matching:" + << " address = " << r_cleanup_nline.read() * m_words * 4 + << " / dir_id = " << r_cleanup_copy.read() + << " / dir_ins = " << r_cleanup_copy_inst.read() + << " / heap_id = " << heap_entry.owner.srcid + << " / heap_ins = " << heap_entry.owner.inst + << " / search_id = " << r_cleanup_srcid.read() + << " / search_ins = " << r_cleanup_inst.read() << std::endl; #endif break; @@ -5573,5 +5530,5 @@ //////////////////////// case CLEANUP_HEAP_SEARCH: // This state is handling the case where the copy - // is in the heap, but not the first in linked list + // is in the heap, but not the first in linked list { assert((r_alloc_heap_fsm.read() == ALLOC_HEAP_CLEANUP) and @@ -5606,29 +5563,26 @@ #if DEBUG_MEMC_CLEANUP - if (m_debug) - { - if (not match_heap) - { - std::cout - << " Matching copy not found, search next:" - << std::endl; - } - else - { - std::cout - << " Matching copy found:" - << std::endl; - } - std::cout - << " address = " << r_cleanup_nline.read() * m_words * 4 - << " / heap_id = " << heap_entry.owner.srcid - << " / heap_ins = " << heap_entry.owner.inst - << " / search_id = " << r_cleanup_srcid.read() - << " / search_ins = " << r_cleanup_inst.read() - << " / last = " << last - << std::endl; - } +if (m_debug) +{ + if (not match_heap) + { + std::cout << " Matching copy not found, search next:" + << std::endl; + } + else + { + std::cout << " Matching copy found:" + << std::endl; + } + std::cout << " address = " << r_cleanup_nline.read() * m_words * 4 + << " / heap_id = " << heap_entry.owner.srcid + << " / heap_ins = " << heap_entry.owner.inst + << " / search_id = " << r_cleanup_srcid.read() + << " / search_ins = " << r_cleanup_inst.read() + << " / last = " << last + << std::endl; +} #endif break; @@ -5659,9 +5613,7 @@ #if DEBUG_MEMC_CLEANUP - if (m_debug) - { - std::cout << " " - << " Remove the copy in the linked list" << std::endl; - } +if (m_debug) +std::cout << " " + << " Remove the copy in the linked list" << std::endl; #endif break; @@ -5694,9 +5646,7 @@ #if DEBUG_MEMC_CLEANUP - if (m_debug) - { - std::cout << " " - << " Update the list of free entries" << std::endl; - } +if (m_debug) +std::cout << " " + << " Update the list of free entries" << std::endl; #endif break; @@ -5704,5 +5654,5 @@ ////////////////////// case CLEANUP_IVT_LOCK: // get the lock protecting the IVT to search a pending - // invalidate transaction matching the cleanup + // invalidate transaction matching the cleanup { if (r_alloc_ivt_fsm.read() != ALLOC_IVT_CLEANUP) break; @@ -5718,10 +5668,8 @@ #if DEBUG_MEMC_CLEANUP - if (m_debug) - { - std::cout << " " - << " Unexpected cleanup with no corresponding IVT entry:" - << " address = " << std::hex << (r_cleanup_nline.read() * 4 * m_words) << std::endl; - } +if (m_debug) +std::cout << " " + << " Unexpected cleanup with no corresponding IVT entry:" + << " address = " << std::hex << (r_cleanup_nline.read() * 4 * m_words) << std::endl; #endif } @@ -5737,11 +5685,9 @@ #if DEBUG_MEMC_CLEANUP - if (m_debug) - { - std::cout << " " - << " Cleanup matching pending invalidate transaction on IVT:" - << " address = " << std::hex << (r_cleanup_nline.read() * m_words * 4) - << " / ivt_entry = " << index << std::endl; - } +if (m_debug) +std::cout << " " + << " Cleanup matching pending invalidate transaction on IVT:" + << " address = " << std::hex << (r_cleanup_nline.read() * m_words * 4) + << " / ivt_entry = " << index << std::endl; #endif } @@ -5762,11 +5708,9 @@ #if DEBUG_MEMC_CLEANUP - if (m_debug) - { - std::cout << " " - << " Decrement response counter in IVT:" - << " IVT_index = " << r_cleanup_index.read() - << " / rsp_count = " << count << std::endl; - } +if (m_debug) +std::cout << " " + << " Decrement response counter in IVT:" + << " IVT_index = " << r_cleanup_index.read() + << " / rsp_count = " << count << std::endl; #endif break; @@ -5774,8 +5718,8 @@ /////////////////////// case CLEANUP_IVT_CLEAR: // Clear IVT entry - // Acknowledge CONFIG FSM if required + // Acknowledge CONFIG FSM if required { assert((r_alloc_ivt_fsm.read() == ALLOC_IVT_CLEANUP) and - "MEMC ERROR in CLEANUP_IVT_CLEAR state : bad IVT allocation"); + "MEMC ERROR in CLEANUP_IVT_CLEAR state : bad IVT allocation"); m_ivt.clear(r_cleanup_index.read()); @@ -5784,5 +5728,5 @@ { assert((r_config_rsp_lines.read() > 0) and - "MEMC ERROR in CLEANUP_IVT_CLEAR state"); + "MEMC ERROR in CLEANUP_IVT_CLEAR state"); config_rsp_lines_cleanup_decr = true; @@ -5793,10 +5737,8 @@ #if DEBUG_MEMC_CLEANUP - if (m_debug) - { - std::cout << " Clear entry in IVT:" - << " IVT_index = " << r_cleanup_index.read() << std::endl; - } +if (m_debug) +std::cout << " Clear entry in IVT:" + << " IVT_index = " << r_cleanup_index.read() << std::endl; #endif break; @@ -5816,12 +5758,10 @@ #if DEBUG_MEMC_CLEANUP - if (m_debug) - { - std::cout << " " - << " Send a response to a previous write request: " - << " rsrcid = " << std::hex << r_cleanup_write_srcid.read() - << " / rtrdid = " << r_cleanup_write_trdid.read() - << " / rpktid = " << r_cleanup_write_pktid.read() << std::endl; - } +if (m_debug) +std::cout << " " + << " Send a response to a previous write request: " + << " rsrcid = " << std::hex << r_cleanup_write_srcid.read() + << " / rtrdid = " << r_cleanup_write_trdid.read() + << " / rpktid = " << r_cleanup_write_pktid.read() << std::endl; #endif break; @@ -5836,13 +5776,11 @@ #if DEBUG_MEMC_CLEANUP - if (m_debug) - { - std::cout << " Send the response to a cleanup request:" - << " address = " << std::hex << r_cleanup_nline.read() * m_words * 4 - << " / way = " << std::dec << r_cleanup_way.read() - << " / srcid = " << std::hex << r_cleanup_srcid.read() - << std::endl; - } +if (m_debug) +std::cout << " Send the response to a cleanup request:" + << " address = " << std::hex << r_cleanup_nline.read() * m_words * 4 + << " / way = " << std::dec << r_cleanup_way.read() + << " / srcid = " << std::hex << r_cleanup_srcid.read() + << std::endl; #endif break;