Changeset 915 for branches/reconfiguration/modules
- Timestamp:
- Jan 6, 2015, 11:07:52 AM (10 years ago)
- Location:
- branches/reconfiguration/modules/vci_mem_cache/caba/source
- Files:
-
- 2 edited
Legend:
- Unmodified
- Added
- Removed
-
branches/reconfiguration/modules/vci_mem_cache/caba/source/include/vci_mem_cache.h
r869 r915 653 653 654 654 sc_signal<int> r_config_fsm; // FSM state 655 sc_signal<bool> r_config_lock; // lock protecting exclusive access656 655 sc_signal<int> r_config_cmd; // config request type 657 656 sc_signal<addr_t> r_config_address; // target buffer physical address -
branches/reconfiguration/modules/vci_mem_cache/caba/source/src/vci_mem_cache.cpp
r899 r915 694 694 uint8_t req_y = (req_srcid >> (srcid_width - m_x_width - m_y_width)) & ((1 << m_y_width) - 1); 695 695 696 return abs(m_x_self - req_x) + abs(m_y_self - req_y) ;696 return abs(m_x_self - req_x) + abs(m_y_self - req_y) + 1; 697 697 } 698 698 … … 702 702 ///////////////////////////////////////////////////// 703 703 { 704 return req_distance(req_srcid) == 0;704 return req_distance(req_srcid) == 1; 705 705 } 706 706 … … 896 896 } 897 897 898 ///////////////////////////////////////// 898 ////////////////////////////////////////////////////////////// 899 899 tmpl(void)::print_stats(bool activity_counters, bool stats) 900 ///////////////////////////////////////// 900 ///////////////////////////////////////////////////////////// 901 901 { 902 902 std::cout << "**********************************" << std::dec << std::endl; … … 1076 1076 1077 1077 r_config_cmd = MEMC_CMD_NOP; 1078 r_config_lock = false;1079 1078 1080 1079 m_config_to_cc_send_inst_fifo.init(); … … 1477 1476 case MEMC_CONFIG: 1478 1477 { 1479 if ((p_vci_tgt.cmd.read() == vci_param_int::CMD_READ) // get lock 1480 and (regr == MEMC_LOCK)) 1481 { 1482 rdata = (uint32_t) r_config_lock.read(); 1483 need_rsp = true; 1484 error = 0; 1485 r_config_lock = true; 1486 } 1487 else if ((p_vci_tgt.cmd.read() == vci_param_int::CMD_WRITE) // release lock 1488 and (regr == MEMC_LOCK)) 1489 { 1490 need_rsp = true; 1491 error = 0; 1492 r_config_lock = false; 1493 } 1494 else if ((p_vci_tgt.cmd.read() == vci_param_int::CMD_WRITE) // set addr_lo 1478 if ((p_vci_tgt.cmd.read() == vci_param_int::CMD_WRITE) // set addr_lo 1495 1479 and (regr == MEMC_ADDR_LO)) 1496 1480 { … … 1718 1702 m_cpt_ll_cost += 5 * req_distance(p_vci_tgt.srcid.read()); 1719 1703 } 1720 else { 1704 else 1705 { 1721 1706 if (is_local_req(p_vci_tgt.srcid.read())) 1722 1707 { … … 1755 1740 cmd_write_fifo_put = true; 1756 1741 // <Activity counters> 1757 if (p_vci_tgt.cmd.read() == vci_param_int::CMD_NOP) 1758 { 1759 // (2 (CMD) + 1 (RSP)) flits VCI => 4 + (1 (success) || 2 (failure)) flits dspin 1760 m_cpt_sc_cost += 5 * req_distance(p_vci_tgt.srcid.read()); 1761 } 1762 else { 1742 if (p_vci_tgt.cmd.read() != vci_param_int::CMD_NOP) 1743 { 1763 1744 if (is_local_req(p_vci_tgt.srcid.read())) 1764 1745 { … … 1769 1750 m_cpt_write_flits_remote++; 1770 1751 } 1771 // (burst_size (CMD) + 1 (RSP) flits VCI => 2 + burst_size + 1 flits dspin1772 m_cpt_write_cost += (3 + (plen >> 2)) * req_distance(p_vci_tgt.srcid.read());1773 1752 } 1774 1753 // </Activity counters> … … 1779 1758 if (p_vci_tgt.cmd.read() == vci_param_int::CMD_NOP) 1780 1759 { 1760 // SC 1761 // (2 (CMD) + 1 (RSP)) flits VCI => 4 + (1 (success) || 2 (failure)) flits dspin 1762 m_cpt_sc_cost += 5 * req_distance(p_vci_tgt.srcid.read()); 1781 1763 if (is_local_req(p_vci_tgt.srcid.read())) 1782 1764 { … … 1788 1770 } 1789 1771 } 1790 else { 1772 else 1773 { 1774 // Writes 1775 // (burst_size + 1 (CMD) + 1 (RSP)) flits VCI => 2 + burst_size + 1 flits dspin 1776 m_cpt_write_cost += (3 + (plen >> 2)) * req_distance(p_vci_tgt.srcid.read()); 1777 1791 1778 if (is_local_req(p_vci_tgt.srcid.read())) 1792 1779 { … … 2021 2008 // CONFIG FSM 2022 2009 //////////////////////////////////////////////////////////////////////////////////// 2023 // The CONFIG FSM handles the VCI configuration requests (INVAL & SYNC).2010 // The CONFIG FSM handles the L2/L3 coherence requests: 2024 2011 // The target buffer can have any size, and there is one single command for 2025 2012 // all cache lines covered by the target buffer. 2026 // 2027 // An INVAL or SYNC configuration operation is defined by the following registers: 2013 // An INVAL or SYNC operation is defined by the following registers: 2028 2014 // - bool r_config_cmd : INVAL / SYNC / NOP 2029 2015 // - uint64_t r_config_address : buffer base address … … 2065 2051 // The CONFIG SYNC response is sent only when the last PUT response is received. 2066 2052 // 2067 // From the software point of view, a configuration request is a sequence 2068 // of 6 atomic accesses in an uncached segment. A dedicated lock is used 2069 // to handle only one configuration command at a given time: 2070 // - Read MEMC_LOCK : Get the lock 2053 // From the software point of view, a L2/L3 coherence request is a sequence 2054 // of 4 atomic accesses in an uncached segment: 2071 2055 // - Write MEMC_ADDR_LO : Set the buffer address LSB 2072 2056 // - Write MEMC_ADDR_HI : Set the buffer address MSB 2073 2057 // - Write MEMC_BUF_LENGTH : set buffer length (bytes) 2074 2058 // - Write MEMC_CMD_TYPE : launch the actual operation 2075 // - WRITE MEMC_LOCK : release the lock2076 2059 //////////////////////////////////////////////////////////////////////////////////// 2077 2060 … … 2944 2927 m_heap.write_free_entry(heap_entry); 2945 2928 m_heap.write_free_ptr(r_read_next_ptr.read()); 2946 if (r_read_last_free.read()) { 2929 if (r_read_last_free.read()) 2930 { 2947 2931 m_heap.set_full(); 2948 2932 } … … 6464 6448 data_vector.push_back(m_cmd_cas_wdata_fifo.read()); 6465 6449 } 6466 else { 6450 else 6451 { 6467 6452 // unmodified words 6468 6453 data_vector.push_back(r_cas_data[i].read()); … … 7523 7508 m_cpt_cleanup_local++; 7524 7509 } 7525 else { 7510 else 7511 { 7526 7512 m_cpt_cleanup_remote++; 7527 7513 } … … 9199 9185 p_vci_tgt.rdata = r_xram_rsp_to_tgt_rsp_ll_key.read(); 9200 9186 } 9201 else { 9187 else 9188 { 9202 9189 // LL response second flit or READ response 9203 9190 p_vci_tgt.rdata = r_xram_rsp_to_tgt_rsp_data[r_tgt_rsp_cpt.read()].read();
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