Index: branches/reconfiguration/modules/vci_mem_cache/caba/source/src/vci_mem_cache.cpp
===================================================================
--- branches/reconfiguration/modules/vci_mem_cache/caba/source/src/vci_mem_cache.cpp	(revision 899)
+++ branches/reconfiguration/modules/vci_mem_cache/caba/source/src/vci_mem_cache.cpp	(revision 915)
@@ -694,5 +694,5 @@
         uint8_t req_y = (req_srcid >> (srcid_width - m_x_width - m_y_width)) & ((1 << m_y_width) - 1);
 
-        return abs(m_x_self - req_x) + abs(m_y_self - req_y);
+        return abs(m_x_self - req_x) + abs(m_y_self - req_y) + 1;
     }
 
@@ -702,5 +702,5 @@
     /////////////////////////////////////////////////////
     {
-        return req_distance(req_srcid) == 0;
+        return req_distance(req_srcid) == 1;
     }
 
@@ -896,7 +896,7 @@
     }
 
-    /////////////////////////////////////////
+    //////////////////////////////////////////////////////////////
     tmpl(void)::print_stats(bool activity_counters, bool stats)
-    /////////////////////////////////////////
+    /////////////////////////////////////////////////////////////
     {
         std::cout << "**********************************" << std::dec << std::endl;
@@ -1076,5 +1076,4 @@
 
             r_config_cmd  = MEMC_CMD_NOP;
-            r_config_lock = false;
 
             m_config_to_cc_send_inst_fifo.init();
@@ -1477,20 +1476,5 @@
                     case MEMC_CONFIG:
                     {
-                        if ((p_vci_tgt.cmd.read() == vci_param_int::CMD_READ) // get lock
-                                and (regr == MEMC_LOCK))
-                        {
-                            rdata         = (uint32_t) r_config_lock.read();
-                            need_rsp      = true;
-                            error         = 0;
-                            r_config_lock = true;
-                        }
-                        else if ((p_vci_tgt.cmd.read() == vci_param_int::CMD_WRITE)  // release lock
-                                and (regr == MEMC_LOCK))
-                        {
-                            need_rsp = true;
-                            error    = 0;
-                            r_config_lock = false;
-                        }
-                        else if ((p_vci_tgt.cmd.read() == vci_param_int::CMD_WRITE)   // set addr_lo
+                        if ((p_vci_tgt.cmd.read() == vci_param_int::CMD_WRITE)   // set addr_lo
                                 and (regr == MEMC_ADDR_LO))
                         {
@@ -1718,5 +1702,6 @@
                         m_cpt_ll_cost += 5 * req_distance(p_vci_tgt.srcid.read());
                     }
-                    else {
+                    else
+                    {
                         if (is_local_req(p_vci_tgt.srcid.read()))
                         {
@@ -1755,10 +1740,6 @@
                     cmd_write_fifo_put = true;
                     // <Activity counters>
-                    if (p_vci_tgt.cmd.read() == vci_param_int::CMD_NOP)
-                    {
-                        // (2 (CMD) + 1 (RSP)) flits VCI => 4 + (1 (success) || 2 (failure)) flits dspin
-                        m_cpt_sc_cost += 5 * req_distance(p_vci_tgt.srcid.read());
-                    }
-                    else {
+                    if (p_vci_tgt.cmd.read() != vci_param_int::CMD_NOP)
+                    {
                         if (is_local_req(p_vci_tgt.srcid.read()))
                         {
@@ -1769,6 +1750,4 @@
                             m_cpt_write_flits_remote++;
                         }
-                        // (burst_size (CMD) + 1 (RSP) flits VCI => 2 + burst_size + 1 flits dspin
-                        m_cpt_write_cost += (3 + (plen >> 2)) * req_distance(p_vci_tgt.srcid.read());
                     }
                     // </Activity counters>
@@ -1779,4 +1758,7 @@
                         if (p_vci_tgt.cmd.read() == vci_param_int::CMD_NOP)
                         {
+                            // SC
+                            // (2 (CMD) + 1 (RSP)) flits VCI => 4 + (1 (success) || 2 (failure)) flits dspin
+                            m_cpt_sc_cost += 5 * req_distance(p_vci_tgt.srcid.read());
                             if (is_local_req(p_vci_tgt.srcid.read()))
                             {
@@ -1788,5 +1770,10 @@
                             }
                         }
-                        else {
+                        else
+                        {
+                            // Writes
+                            // (burst_size + 1 (CMD) + 1 (RSP)) flits VCI => 2 + burst_size + 1 flits dspin
+                            m_cpt_write_cost += (3 + (plen >> 2)) * req_distance(p_vci_tgt.srcid.read());
+
                             if (is_local_req(p_vci_tgt.srcid.read()))
                             {
@@ -2021,9 +2008,8 @@
         //    CONFIG FSM
         ////////////////////////////////////////////////////////////////////////////////////
-        // The CONFIG FSM handles the VCI configuration requests (INVAL & SYNC).
+        // The CONFIG FSM handles the L2/L3 coherence requests:
         // The target buffer can have any size, and there is one single command for
         // all cache lines covered by the target buffer.
-        //
-        // An INVAL or SYNC configuration operation is defined by the following registers:
+        // An INVAL or SYNC operation is defined by the following registers:
         // - bool      r_config_cmd        : INVAL / SYNC / NOP
         // - uint64_t  r_config_address    : buffer base address
@@ -2065,13 +2051,10 @@
         //   The CONFIG SYNC response is sent only when the last PUT response is received.
         //
-        // From the software point of view, a configuration request is a sequence
-        // of 6 atomic accesses in an uncached segment. A dedicated lock is used
-        // to handle only one configuration command at a given time:
-        // - Read  MEMC_LOCK       : Get the lock
+        // From the software point of view, a L2/L3 coherence request is a sequence
+        // of 4 atomic accesses in an uncached segment:
         // - Write MEMC_ADDR_LO    : Set the buffer address LSB
         // - Write MEMC_ADDR_HI    : Set the buffer address MSB
         // - Write MEMC_BUF_LENGTH : set buffer length (bytes)
         // - Write MEMC_CMD_TYPE   : launch the actual operation
-        // - WRITE MEMC_LOCK       : release the lock
         ////////////////////////////////////////////////////////////////////////////////////
 
@@ -2944,5 +2927,6 @@
                     m_heap.write_free_entry(heap_entry);
                     m_heap.write_free_ptr(r_read_next_ptr.read());
-                    if (r_read_last_free.read())  {
+                    if (r_read_last_free.read())
+                    {
                         m_heap.set_full();
                     }
@@ -6464,5 +6448,6 @@
                         data_vector.push_back(m_cmd_cas_wdata_fifo.read());
                     }
-                    else {
+                    else
+                    {
                         // unmodified words
                         data_vector.push_back(r_cas_data[i].read());
@@ -7523,5 +7508,6 @@
                     m_cpt_cleanup_local++;
                 }
-                else {
+                else
+                {
                     m_cpt_cleanup_remote++;
                 }
@@ -9199,5 +9185,6 @@
                         p_vci_tgt.rdata = r_xram_rsp_to_tgt_rsp_ll_key.read();
                     }
-                    else {
+                    else
+                    {
                         // LL response second flit or READ response
                         p_vci_tgt.rdata = r_xram_rsp_to_tgt_rsp_data[r_tgt_rsp_cpt.read()].read();
