Changeset 923


Ignore:
Timestamp:
Jan 13, 2015, 9:23:15 AM (10 years ago)
Author:
cfuguet
Message:

reconf: reuse the UNC transactions' watchdog timer in the CC_TEST

  • When there is a timeout, reply the processor with an error. The r_dcache_cc_test_result register is not longer used. Therefore, the software can locate blackholes in the coherence network with a method similar to the one used for the direct networks.
Location:
branches/reconfiguration/modules/vci_cc_vcache_wrapper/caba/source
Files:
2 edited

Legend:

Unmodified
Added
Removed
  • branches/reconfiguration/modules/vci_cc_vcache_wrapper/caba/source/include/vci_cc_vcache_wrapper.h

    r919 r923  
    280280        MMU_READ_PT2_ILLEGAL_ACCESS   = 0x1080, // Read & Bus Error accessing PT2
    281281        MMU_READ_DATA_ILLEGAL_ACCESS  = 0x1100, // Read & Bus Error in cache access
    282         MMU_READ_DATA_TIMEOUT         = 0x1200, // Read & Watchdog timeout
     282        MMU_WDT_TIMEOUT               = 0x1200, // Watchdog timeout
    283283    };
    284284
     
    600600    //  CC_TEST FSM REGISTER
    601601    ///////////////////////////////////
    602     enum cc_test_result_e
    603     {
    604         CC_TEST_SUCCESS = 0,
    605         CC_TEST_FAILURE = 1,
    606     };
    607602
    608603    sc_signal<int>          r_cc_test_fsm;
     
    612607    sc_signal<bool>         r_cc_test_clack_req;
    613608    sc_signal<uint64_t>     r_cc_test_clack_sign;
    614     sc_signal<int>          r_cc_test_to_dcache_result;
    615609
    616610    //////////////////////////////////////////////////////////////////
  • branches/reconfiguration/modules/vci_cc_vcache_wrapper/caba/source/src/vci_cc_vcache_wrapper.cpp

    r919 r923  
    429429      r_cc_test_clack_req("r_cc_test_clack_req"),
    430430      r_cc_test_clack_sign("r_cc_test_clack_sign"),
    431       r_cc_test_to_dcache_result("r_cc_test_to_dcache_result"),
    432431
    433432      r_iss(this->name(), proc_id),
     
    22572256    m_drsp.rdata = 0;
    22582257
     2258    // watchdog timeout default value
     2259    bool dcache_watchdog_timeout = false;
     2260
    22592261    switch (r_dcache_fsm.read())
    22602262    {
     
    25712573                        break;
    25722574
    2573                     case XTN_CC_TEST:
    2574                         m_drsp.rdata = r_cc_test_to_dcache_result.read();
    2575                         m_drsp.valid = true;
    2576                         m_drsp.error = false;
    2577                         break;
    2578 
    25792575                    default:
    25802576                        r_mmu_detr   = MMU_READ_UNDEFINED_XTN;
     
    27252721                        r_dcache_to_cc_test_dest = m_dreq.wdata;
    27262722                        r_dcache_to_cc_test_req = true;
     2723                        r_dcache_wdt = 0;
    27272724                        r_dcache_fsm = DCACHE_XTN_CC_TEST;
    27282725                        break;
     
    41844181        }
    41854182
     4183        // increment watchdog timer for black-hole detection
     4184        r_dcache_wdt = r_dcache_wdt.read() + 1;
     4185        if (r_dcache_wdt.read() == r_dcache_wdt_max.read())
     4186        {
     4187            dcache_watchdog_timeout = true;
     4188
     4189            // TODO: send the TRDID in the coherence packet to detect an early
     4190            // WDT timeout
     4191            // debug: this counter is used to detect an early WDT timeout.
     4192            // It is sent as the data uncacheable transactions TRDID. When a
     4193            // response is treated by the RSP FSM, the RTRDID is compared to
     4194            // this counter to determine if a timeout was triggered during the
     4195            // transaction.
     4196            r_dcache_wdt_timeout = r_dcache_wdt_timeout.read() + 1;
     4197
     4198#if DEBUG_DCACHE
     4199            if (m_debug_dcache_fsm)
     4200            {
     4201                std::cout << "  <PROC " << name() << " DCACHE_XTN_CC_TEST>"
     4202                             "  watchdog timer exception" << std::endl;
     4203            }
     4204#endif
     4205        }
     4206
    41864207        // wait the CC_TEST request to finish
    4187         // the test result is stored at the r_cc_test_to_dcache_result
    4188         if (not r_dcache_to_cc_test_req.read())
    4189         {
     4208        if (not r_dcache_to_cc_test_req.read() or dcache_watchdog_timeout)
     4209        {
     4210            if (dcache_watchdog_timeout)
     4211            {
     4212                r_mmu_detr   = MMU_WDT_TIMEOUT;
     4213                m_drsp.error = true;
     4214            }
     4215            m_drsp.valid = true;
     4216
    41904217            r_dcache_fsm = DCACHE_IDLE;
    4191             m_drsp.valid = true;
    4192 
    41934218#if DEBUG_DCACHE
    41944219            if (m_debug_dcache_fsm)
     
    41984223                    << std::hex
    41994224                    << " / DEST = " << r_dcache_to_cc_test_dest.read()
    4200                     << " / RESULt = " << r_cc_test_to_dcache_result.read()
     4225                    << " / TIMEOUT = " << dcache_watchdog_timeout
    42014226                    << std::dec << std::endl;
    42024227            }
     
    43924417        if (r_dcache_wdt.read() == r_dcache_wdt_max.read())
    43934418        {
    4394             r_mmu_detr   = MMU_READ_DATA_TIMEOUT;
     4419            r_mmu_detr   = MMU_WDT_TIMEOUT;
    43954420            r_mmu_dbvar  = r_dcache_save_vaddr.read();
    43964421            m_drsp.valid = true;
     
    46364661        if (r_dcache_wdt.read() == r_dcache_wdt_max.read())
    46374662        {
    4638             r_mmu_detr   = MMU_READ_DATA_TIMEOUT;
     4663            r_mmu_detr   = MMU_WDT_TIMEOUT;
    46394664            r_mmu_dbvar  = m_dreq.addr;
    46404665            m_drsp.valid = true;
     
    62236248    ///////////////////////////////////////////////////////////////
    62246249
    6225     // TODO: implement the watchdog timer (reuse the same that for the DATA UNC
    6226     // requests?)
    6227     const bool watchdog_timeout = false;
    6228 
    62296250    switch(r_cc_test_fsm.read())
    62306251    {
    62316252        case CC_TEST_IDLE:
    62326253            if (not r_dcache_to_cc_test_req.read()) break;
    6233             r_cc_test_to_dcache_result = CC_TEST_SUCCESS;
    62346254            r_cc_test_fsm = CC_TEST_P2M_REQ;
    62356255            break;
     
    62446264            if (r_cc_test_to_cc_send_req.read())
    62456265            {
    6246                 if (not watchdog_timeout) break;
     6266                if (not dcache_watchdog_timeout) break;
    62476267                r_dcache_to_cc_test_req = false;
    62486268                r_cc_test_to_cc_send_req = false;
    6249                 r_cc_test_to_dcache_result = CC_TEST_FAILURE;
    62506269                r_cc_test_fsm = CC_TEST_IDLE;
    62516270                break;
     
    62586277            if (not r_cc_test_clack_req.read() or not r_cc_test_m2p_req.read())
    62596278            {
    6260                 if (not watchdog_timeout) break;
    6261                 r_cc_test_to_dcache_result = CC_TEST_FAILURE;
     6279                if (not dcache_watchdog_timeout) break;
    62626280            }
    62636281
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