Index: /branches/reconfiguration/modules/vci_cc_vcache_wrapper/caba/source/include/vci_cc_vcache_wrapper.h
===================================================================
--- /branches/reconfiguration/modules/vci_cc_vcache_wrapper/caba/source/include/vci_cc_vcache_wrapper.h	(revision 922)
+++ /branches/reconfiguration/modules/vci_cc_vcache_wrapper/caba/source/include/vci_cc_vcache_wrapper.h	(revision 923)
@@ -280,5 +280,5 @@
         MMU_READ_PT2_ILLEGAL_ACCESS   = 0x1080, // Read & Bus Error accessing PT2
         MMU_READ_DATA_ILLEGAL_ACCESS  = 0x1100, // Read & Bus Error in cache access
-        MMU_READ_DATA_TIMEOUT         = 0x1200, // Read & Watchdog timeout
+        MMU_WDT_TIMEOUT               = 0x1200, // Watchdog timeout
     };
 
@@ -600,9 +600,4 @@
     //  CC_TEST FSM REGISTER
     ///////////////////////////////////
-    enum cc_test_result_e
-    {
-        CC_TEST_SUCCESS = 0,
-        CC_TEST_FAILURE = 1,
-    };
 
     sc_signal<int>          r_cc_test_fsm;
@@ -612,5 +607,4 @@
     sc_signal<bool>         r_cc_test_clack_req;
     sc_signal<uint64_t>     r_cc_test_clack_sign;
-    sc_signal<int>          r_cc_test_to_dcache_result;
 
     //////////////////////////////////////////////////////////////////
Index: /branches/reconfiguration/modules/vci_cc_vcache_wrapper/caba/source/src/vci_cc_vcache_wrapper.cpp
===================================================================
--- /branches/reconfiguration/modules/vci_cc_vcache_wrapper/caba/source/src/vci_cc_vcache_wrapper.cpp	(revision 922)
+++ /branches/reconfiguration/modules/vci_cc_vcache_wrapper/caba/source/src/vci_cc_vcache_wrapper.cpp	(revision 923)
@@ -429,5 +429,4 @@
       r_cc_test_clack_req("r_cc_test_clack_req"),
       r_cc_test_clack_sign("r_cc_test_clack_sign"),
-      r_cc_test_to_dcache_result("r_cc_test_to_dcache_result"),
 
       r_iss(this->name(), proc_id),
@@ -2257,4 +2256,7 @@
     m_drsp.rdata = 0;
 
+    // watchdog timeout default value
+    bool dcache_watchdog_timeout = false;
+
     switch (r_dcache_fsm.read())
     {
@@ -2571,10 +2573,4 @@
                         break;
 
-                    case XTN_CC_TEST:
-                        m_drsp.rdata = r_cc_test_to_dcache_result.read();
-                        m_drsp.valid = true;
-                        m_drsp.error = false;
-                        break;
-
                     default:
                         r_mmu_detr   = MMU_READ_UNDEFINED_XTN;
@@ -2725,4 +2721,5 @@
                         r_dcache_to_cc_test_dest = m_dreq.wdata;
                         r_dcache_to_cc_test_req = true;
+                        r_dcache_wdt = 0;
                         r_dcache_fsm = DCACHE_XTN_CC_TEST;
                         break;
@@ -4184,11 +4181,39 @@
         }
 
+        // increment watchdog timer for black-hole detection
+        r_dcache_wdt = r_dcache_wdt.read() + 1;
+        if (r_dcache_wdt.read() == r_dcache_wdt_max.read())
+        {
+            dcache_watchdog_timeout = true;
+
+            // TODO: send the TRDID in the coherence packet to detect an early
+            // WDT timeout
+            // debug: this counter is used to detect an early WDT timeout.
+            // It is sent as the data uncacheable transactions TRDID. When a
+            // response is treated by the RSP FSM, the RTRDID is compared to
+            // this counter to determine if a timeout was triggered during the
+            // transaction.
+            r_dcache_wdt_timeout = r_dcache_wdt_timeout.read() + 1;
+
+#if DEBUG_DCACHE
+            if (m_debug_dcache_fsm)
+            {
+                std::cout << "  <PROC " << name() << " DCACHE_XTN_CC_TEST>"
+                             "  watchdog timer exception" << std::endl;
+            }
+#endif
+        }
+
         // wait the CC_TEST request to finish
-        // the test result is stored at the r_cc_test_to_dcache_result
-        if (not r_dcache_to_cc_test_req.read())
-        {
+        if (not r_dcache_to_cc_test_req.read() or dcache_watchdog_timeout)
+        {
+            if (dcache_watchdog_timeout)
+            {
+                r_mmu_detr   = MMU_WDT_TIMEOUT;
+                m_drsp.error = true;
+            }
+            m_drsp.valid = true;
+
             r_dcache_fsm = DCACHE_IDLE;
-            m_drsp.valid = true;
-
 #if DEBUG_DCACHE
             if (m_debug_dcache_fsm)
@@ -4198,5 +4223,5 @@
                     << std::hex
                     << " / DEST = " << r_dcache_to_cc_test_dest.read()
-                    << " / RESULt = " << r_cc_test_to_dcache_result.read()
+                    << " / TIMEOUT = " << dcache_watchdog_timeout
                     << std::dec << std::endl;
             }
@@ -4392,5 +4417,5 @@
         if (r_dcache_wdt.read() == r_dcache_wdt_max.read())
         {
-            r_mmu_detr   = MMU_READ_DATA_TIMEOUT;
+            r_mmu_detr   = MMU_WDT_TIMEOUT;
             r_mmu_dbvar  = r_dcache_save_vaddr.read();
             m_drsp.valid = true;
@@ -4636,5 +4661,5 @@
         if (r_dcache_wdt.read() == r_dcache_wdt_max.read())
         {
-            r_mmu_detr   = MMU_READ_DATA_TIMEOUT;
+            r_mmu_detr   = MMU_WDT_TIMEOUT;
             r_mmu_dbvar  = m_dreq.addr;
             m_drsp.valid = true;
@@ -6223,13 +6248,8 @@
     ///////////////////////////////////////////////////////////////
 
-    // TODO: implement the watchdog timer (reuse the same that for the DATA UNC
-    // requests?)
-    const bool watchdog_timeout = false;
-
     switch(r_cc_test_fsm.read())
     {
         case CC_TEST_IDLE:
             if (not r_dcache_to_cc_test_req.read()) break;
-            r_cc_test_to_dcache_result = CC_TEST_SUCCESS;
             r_cc_test_fsm = CC_TEST_P2M_REQ;
             break;
@@ -6244,8 +6264,7 @@
             if (r_cc_test_to_cc_send_req.read())
             {
-                if (not watchdog_timeout) break;
+                if (not dcache_watchdog_timeout) break;
                 r_dcache_to_cc_test_req = false;
                 r_cc_test_to_cc_send_req = false;
-                r_cc_test_to_dcache_result = CC_TEST_FAILURE;
                 r_cc_test_fsm = CC_TEST_IDLE;
                 break;
@@ -6258,6 +6277,5 @@
             if (not r_cc_test_clack_req.read() or not r_cc_test_m2p_req.read())
             {
-                if (not watchdog_timeout) break;
-                r_cc_test_to_dcache_result = CC_TEST_FAILURE;
+                if (not dcache_watchdog_timeout) break;
             }