Changeset 926
- Timestamp:
- Jan 20, 2015, 4:06:49 PM (10 years ago)
- Location:
- branches/reconfiguration/platforms/tsar_generic_iob
- Files:
-
- 6 edited
Legend:
- Unmodified
- Added
- Removed
-
branches/reconfiguration/platforms/tsar_generic_iob/scripts/arch.py
r907 r926 101 101 mmc_size = 0x1000 # 4 Kbytes 102 102 103 rom_base = 0x00BFC00000104 rom_size = 0x8000# 32 Kbytes103 drom_base = 0x00BFC00000 104 drom_size = 0x8000 # 32 Kbytes 105 105 106 106 offset_io = pmsb(X_IO, Y_IO) << (PADDR_WIDTH - X_WIDTH - Y_WIDTH) … … 129 129 iob_base = 0x00BE000000 + offset_io 130 130 iob_size = 0x1000 # 4 kbytes 131 132 rom_base = 0x00BA000000 133 rom_size = 0x8000 # 32 Kbytes 131 134 132 135 # create mapping … … 170 173 ptype='SIM') 171 174 175 mapping.addPeriph('ROM', base=rom_base, size=rom_size, 176 ptype='ROM') 177 172 178 pic = mapping.addPeriph('PIC', base=pic_base, size=pic_size, 173 179 ptype='PIC', channels=32) … … 196 202 ptype='MMC') 197 203 198 mapping.addPeriph(' ROM', base=rom_base + offset, size=rom_size,199 ptype=' ROM')204 mapping.addPeriph('DROM', base=drom_base + offset, size=drom_size, 205 ptype='DROM') 200 206 201 207 dma = mapping.addPeriph('DMA', base=dma_base + offset, … … 336 342 337 343 # for the Giet-VM is not necessary to map the replicated ROMs 338 mapping.addGlobal('seg_rom', rom_base,rom_size, 'CX__', vtype='PERI',344 mapping.addGlobal('seg_rom', drom_base, drom_size, 'CX__', vtype='PERI', 339 345 x=X_IO, y=Y_IO, pseg='ROM', local=False, big=True) 340 346 -
branches/reconfiguration/platforms/tsar_generic_iob/scripts/onerun.py
r919 r926 69 69 os.unlink(dst) 70 70 71 os.symlink(os.path.join(basedir, "soft/config/boot_config.h"), dst) 72 73 # stop after compiling the platform when the compile-only option is activated 74 if args.compileonly == True: 75 exit(0) 71 os.symlink(os.path.join(basedir, "soft/test/config/boot_config.h"), dst) 76 72 77 73 print "[ run.py ] compiling distributed boot procedure" … … 82 78 subprocess.call(command, stdout=logfile, stderr=logfile) 83 79 80 # stop after compiling when the compile-only option is activated 81 if args.compileonly == True: 82 exit(0) 83 84 84 # 5. execute simulator 85 85 os.environ["DISTRIBUTED_BOOT"] = "1" … … 88 88 os.environ["SOCLIB_TTY"] = "FILES" 89 89 90 ompthreads = (args.x * args.y) / 491 cpucount = multiprocessing.cpu_count()92 if ompthreads > cpucount: ompthreads = cpucount93 94 90 print "[ run.py ] starting simulation" 95 91 command = [] 96 92 command.extend([os.path.join(basedir, "simul.x")]) 97 command.extend(["-SOFT", os.path.join(basedir, "soft/build/soft.elf")]) 98 command.extend(["-DISK", "/dev/null"]) 99 command.extend(["-THREADS", str(ompthreads)]) 93 command.extend(["-DSOFT", os.path.join(basedir, "soft/build/soft.elf")]) 94 command.extend(["-SOFT", os.path.join(basedir, 95 "soft/loader/build/loader.elf")]) 96 command.extend(["-DISK", "file.dmg"]) 100 97 101 98 if args.faultyrouter != None: … … 104 101 command.extend(["-FAULTY_ROUTER", str(f[0]), str(f[1]), str(f[2])]) 105 102 103 ompthreads = 1 106 104 if args.debug != None: 107 105 command.extend(["-DEBUG", str(args.debug[0])]); … … 109 107 command.extend(["-PROCID", str(args.debug[2])]); 110 108 command.extend(["-MEMCID", str(args.debug[3])]); 109 111 110 elif os.environ.get('SOCLIB_GDB') == None: 111 ompthreads = (args.x * args.y) / 4 112 cpucount = multiprocessing.cpu_count() 113 if ompthreads > cpucount: 114 ompthreads = cpucount 115 112 116 # the procedure grows linearly with the diameter of the mesh. 113 maxcycles = 400000 + (args.x + args.y) * 20000;117 maxcycles = 1500000 + (args.x + args.y) * 20000 114 118 command.extend(["-NCYCLES", str(maxcycles)]) 119 120 command.extend(["-THREADS", str(ompthreads)]) 115 121 116 122 logfile.write("Execute: {0}\n".format(" ".join(command))) -
branches/reconfiguration/platforms/tsar_generic_iob/top.cpp
r916 r926 133 133 #include "vci_framebuffer.h" 134 134 #include "vci_iox_network.h" 135 #include "vci_iox_network.h"136 135 #include "vci_iopic.h" 137 136 #include "vci_simhelper.h" … … 213 212 214 213 #define cluster(x, y) ((y) + ((x) << Y_WIDTH)) 215 216 ////////////////////////////////////////////////////////////217 // Software to be loaded in ROM & RAM218 //////////////////////i/////////////////////////////////////219 220 #define BOOT_SOFT_NAME "../../softs/tsar_boot/preloader.elf"221 214 222 215 //////////////////////////////////////////////////////////// … … 272 265 #define INT_XICU_TGT_ID 1 273 266 #define INT_MDMA_TGT_ID 2 274 #define INT_ BROM_TGT_ID 3267 #define INT_DROM_TGT_ID 3 275 268 #define INT_IOBX_TGT_ID 4 276 269 … … 299 292 #define IOX_IOPI_TGT_ID 5 300 293 #define IOX_SIMH_TGT_ID 6 301 #define IOX_IOB0_TGT_ID 7 302 #define IOX_IOB1_TGT_ID 8 294 #define IOX_ROM_TGT_ID 7 295 #define IOX_IOB0_TGT_ID 8 296 #define IOX_IOB1_TGT_ID 9 303 297 304 298 #define IOX_BDEV_INI_ID 0 … … 317 311 318 312 319 char soft_name[256] = BOOT_SOFT_NAME; // pathname: binary code 313 char dsoft_name[256] = ""; // pathname: binary code 314 char soft_name[256] = ""; // pathname: binary code 320 315 size_t ncycles = UINT_MAX; // simulated cycles 321 316 char disk_name[256] = BDEV_IMAGE_NAME; // pathname: disk image … … 348 343 { 349 344 strcpy(soft_name, argv[n+1]); 345 } 346 else if ((strcmp(argv[n], "-DSOFT") == 0) && (n+1<argc) ) 347 { 348 strcpy(dsoft_name, argv[n+1]); 350 349 } 351 350 else if ((strcmp(argv[n], "-DEBUG") == 0) && (n+1<argc) ) … … 444 443 std::cout << " Accepted arguments are :" << std::endl << std::endl; 445 444 std::cout << " -SOFT pathname_for_embedded_soft" << std::endl; 445 std::cout << " -DSOFT pathname_for_distributed_embedded_soft" << std::endl; 446 446 std::cout << " -DISK pathname_for_disk_image" << std::endl; 447 447 std::cout << " -NCYCLES number_of_simulated_cycles" << std::endl; … … 580 580 IntTab(cluster(x, y), INT_MDMA_TGT_ID), not cacheable)); 581 581 582 std::ostringstream s brom;583 s brom << "int_seg_brom_" << x << "_" << y;584 maptab_int.add(Segment(s brom.str(), SEG_ROM_BASE+offset, SEG_ROM_SIZE,585 IntTab(cluster(x, y), INT_ BROM_TGT_ID), cacheable));582 std::ostringstream sdrom; 583 sdrom << "int_seg_drom_" << x << "_" << y; 584 maptab_int.add(Segment(sdrom.str(), SEG_DROM_BASE+offset, SEG_DROM_SIZE, 585 IntTab(cluster(x, y), INT_DROM_TGT_ID), cacheable)); 586 586 587 587 // the following segments are only defined in cluster_iob0 or in cluster_iob1 … … 628 628 maptab_int.add(Segment(ssim.str(), SEG_SIM_BASE+offset, SEG_SIM_SIZE, 629 629 IntTab(cluster(x, y), INT_IOBX_TGT_ID), not cacheable)); 630 631 std::ostringstream srom; 632 srom << "int_seg_rom_" << x << "_" << y; 633 maptab_int.add(Segment(srom.str(), SEG_ROM_BASE+offset, SEG_ROM_SIZE, 634 IntTab(cluster(x, y), INT_IOBX_TGT_ID), cacheable)); 630 635 } 631 636 … … 711 716 // - two levels srcid decoding for responses 712 717 // - 5 initiators (IOB0, IOB1, BDEV, CDMA, IOPI) 713 // - 9 targets (IOB0, IOB1, BDEV, CDMA, MTTY, FBUF, BROM, MNIC, IOPI)718 // - 9 targets (IOB0, IOB1, BDEV, CDMA, MTTY, FBUF, ROM, MNIC, IOPI) 714 719 // 715 720 // Address bit 32 is used to determine if a command must be routed to … … 743 748 maptab_iox.add(Segment("iox_seg_simh_0", SEG_SIM_BASE + iob0_base, SEG_SIM_SIZE, 744 749 IntTab(0, IOX_SIMH_TGT_ID), false)); 750 maptab_iox.add(Segment("iox_seg_rom_0", SEG_ROM_BASE + iob0_base, SEG_ROM_SIZE, 751 IntTab(0, IOX_ROM_TGT_ID), false)); 745 752 746 753 if ( cluster_iob0 != cluster_iob1 ) … … 763 770 maptab_iox.add(Segment("iox_seg_simh_1", SEG_SIM_BASE + iob1_base, SEG_SIM_SIZE, 764 771 IntTab(0, IOX_SIMH_TGT_ID), false)); 772 maptab_iox.add(Segment("iox_seg_rom_1", SEG_ROM_BASE + iob1_base, SEG_ROM_SIZE, 773 IntTab(0, IOX_ROM_TGT_ID), false)); 765 774 } 766 775 … … 858 867 VciSignals<vci_param_ext> signal_vci_tgt_iopi("signal_vci_ini_iopi"); 859 868 VciSignals<vci_param_ext> signal_vci_tgt_simh("signal_vci_ini_simh"); 869 VciSignals<vci_param_ext> signal_vci_tgt_rom("signal_vci_ini_rom"); 860 870 861 871 // Horizontal inter-clusters INT network DSPIN … … 929 939 almos_kernel_pathname); 930 940 #else 931 soclib::common::Loader loader(soft_name );941 soclib::common::Loader loader(soft_name, dsoft_name); 932 942 #endif 933 943 … … 946 956 947 957 const size_t nb_iox_initiators = (cluster_iob0 != cluster_iob1) ? 5 : 4; 948 const size_t nb_iox_targets = (cluster_iob0 != cluster_iob1) ? 9 : 8;958 const size_t nb_iox_targets = (cluster_iob0 != cluster_iob1) ? 10 : 9; 949 959 950 960 // IOX network … … 1022 1032 maptab_iox ); 1023 1033 1034 // External ROM 1035 VciSimpleRom<vci_param_ext>* rom; 1036 rom = new VciSimpleRom<vci_param_ext>("rom", 1037 IntTab(0, IOX_ROM_TGT_ID), 1038 maptab_iox, 1039 loader, 1040 X_WIDTH + Y_WIDTH ); 1041 1024 1042 // Clusters 1025 1043 TsarIobCluster<vci_param_int, … … 1089 1107 INT_XICU_TGT_ID, 1090 1108 INT_MDMA_TGT_ID, 1091 INT_ BROM_TGT_ID,1109 INT_DROM_TGT_ID, 1092 1110 INT_IOBX_TGT_ID, 1093 1111 … … 1202 1220 iox_network->p_to_tgt[IOX_IOPI_TGT_ID] (signal_vci_tgt_iopi); 1203 1221 iox_network->p_to_tgt[IOX_SIMH_TGT_ID] (signal_vci_tgt_simh); 1222 iox_network->p_to_tgt[IOX_ROM_TGT_ID] (signal_vci_tgt_rom); 1204 1223 1205 1224 if (cluster_iob0 != cluster_iob1) … … 1285 1304 simh->p_vci(signal_vci_tgt_simh); 1286 1305 1306 // External ROM connexion 1307 rom->p_clk(signal_clk); 1308 rom->p_resetn(signal_resetn); 1309 rom->p_vci(signal_vci_tgt_rom); 1310 1287 1311 // IOB0 cluster connexion to IOX network 1288 1312 (*clusters[0][0]->p_vci_iob_iox_ini) (signal_vci_ini_iob0); -
branches/reconfiguration/platforms/tsar_generic_iob/top.desc
r769 r926 40 40 cell_size = vci_cell_size_ext), 41 41 42 # ROM43 Uses('caba:vci_simple_rom',44 cell_size = vci_cell_size_ext),45 46 42 # Frame Buffer 47 43 Uses('caba:vci_framebuffer', … … 72 68 cell_size = vci_cell_size_ext), 73 69 70 # ROM 71 Uses('caba:vci_simple_rom', 72 cell_size = vci_cell_size_ext), 73 74 74 Uses('common:elf_file_loader'), 75 75 Uses('common:plain_file_loader'), -
branches/reconfiguration/platforms/tsar_generic_iob/tsar_iob_cluster/caba/source/include/tsar_iob_cluster.h
r904 r926 96 96 VciSignals<vci_param_int> signal_int_vci_tgt_xicu; 97 97 VciSignals<vci_param_int> signal_int_vci_tgt_mdma; 98 VciSignals<vci_param_int> signal_int_vci_tgt_ brom;98 VciSignals<vci_param_int> signal_int_vci_tgt_drom; 99 99 VciSignals<vci_param_int> signal_int_vci_tgt_iobx; 100 100 … … 149 149 VciMultiDma<vci_param_int>* mdma; 150 150 151 VciSimpleRom<vci_param_int>* brom;151 VciSimpleRom<vci_param_int>* drom; 152 152 153 153 VciLocalCrossbar<vci_param_int>* int_xbar_d; … … 212 212 size_t int_xicu_tgt_id, 213 213 size_t int_mdma_tgt_id, 214 size_t int_ brom_tgt_id,214 size_t int_drom_tgt_id, 215 215 size_t int_iobx_tgt_id, 216 216 size_t int_proc_ini_id, -
branches/reconfiguration/platforms/tsar_generic_iob/tsar_iob_cluster/caba/source/src/tsar_iob_cluster.cpp
r904 r926 51 51 size_t int_xicu_tgt_id, // local index 52 52 size_t int_mdma_tgt_id, // local index 53 size_t int_ brom_tgt_id, // local index53 size_t int_drom_tgt_id, // local index 54 54 size_t int_iobx_tgt_id, // local index 55 55 … … 210 210 nb_dmas); // number of IRQs 211 211 212 /////////// DISTRIBUTED BOOTROM213 std::ostringstream s_ brom;214 s_ brom << "brom_" << x_id << "_" << y_id;215 brom = new VciSimpleRom<vci_param_int>(216 s_ brom.str().c_str(),217 IntTab(cluster_id, int_ brom_tgt_id),212 /////////// DISTRIBUTED ROM 213 std::ostringstream s_drom; 214 s_drom << "drom_" << x_id << "_" << y_id; 215 drom = new VciSimpleRom<vci_param_int>( 216 s_drom.str().c_str(), 217 IntTab(cluster_id, int_drom_tgt_id), 218 218 mt_int, 219 219 loader, … … 473 473 int_xbar_d->p_to_target[int_xicu_tgt_id] (signal_int_vci_tgt_xicu); 474 474 int_xbar_d->p_to_target[int_mdma_tgt_id] (signal_int_vci_tgt_mdma); 475 int_xbar_d->p_to_target[int_ brom_tgt_id] (signal_int_vci_tgt_brom);475 int_xbar_d->p_to_target[int_drom_tgt_id] (signal_int_vci_tgt_drom); 476 476 int_xbar_d->p_to_initiator[int_mdma_ini_id] (signal_int_vci_ini_mdma); 477 477 for (size_t p = 0; p < nb_procs; p++) … … 597 597 mdma->p_irq[i] (signal_irq_mdma[i]); 598 598 599 /////////////////////////////////// BROM600 brom->p_clk (this->p_clk);601 brom->p_resetn (this->p_resetn);602 brom->p_vci (signal_int_vci_tgt_brom);599 /////////////////////////////////// DROM 600 drom->p_clk (this->p_clk); 601 drom->p_resetn (this->p_resetn); 602 drom->p_vci (signal_int_vci_tgt_drom); 603 603 604 604 //////////////////////////// RAM network CMD & RSP routers
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