Changeset 938 for trunk/platforms


Ignore:
Timestamp:
Feb 8, 2015, 9:38:31 PM (10 years ago)
Author:
alain
Message:

Introduce distributed kernel heap.

Location:
trunk/platforms/tsar_generic_iob
Files:
2 edited

Legend:

Unmodified
Added
Removed
  • trunk/platforms/tsar_generic_iob/arch.py

    r913 r938  
     1#!/usr/bin/env python
    12
    23from math import log, ceil
    34from mapping import *
    45
    5 #######################################################################################
     6##################################################################################
    67#   file   : arch.py  (for the tsar_generic_iob architecture)
    78#   date   : may 2014
    89#   author : Alain Greiner
    9 #######################################################################################
     10##################################################################################
    1011#  This file contains a mapping generator for the "tsar_generic_iob" platform.
    1112#  This includes both the hardware architecture (clusters, processors, peripherals,
    12 #  physical space segmentation) and the mapping of all kernel objects (global vsegs).
    13 #  This platform includes 6 external peripherals, accessible through two IO_Bridge
    14 #  components located in cluster [0,0] and cluster [x_size-1, y_size-1].
    15 #  Available peripherals are: TTY, BDV, FBF, ROM, NIC, CMA.
     13#  physical space segmentation) and the mapping of all boot and kernel objects
     14#  (global vsegs).
     15#
     16#  This platform includes 6 external peripherals, accessible through an IOB
     17#  components located in cluster [0,0] or in cluster [x_size-1, y_size-1].
     18#  Available peripherals are: TTY, BDV, FBF, ROM, NIC, CMA, PIC.
     19#
     20#  All clusters contain (nb_procs) processors, one L2 cache, one XCU, and
     21#  one DMA controller.
    1622#
    1723#  The "constructor" parameters are:
     
    2228#  - fbf_width      : frame_buffer width = frame_buffer heigth
    2329#
    24 #  The "hidden" parameters (defined below) are:
     30#  The other hardware parameters are:
    2531#  - nb_nics        : number of NIC channels
     32#  - nb_cmas        : number of CMA channels
    2633#  - x_io           : cluster_io x coordinate
    2734#  - y_io           : cluster_io y coordinate
     
    3340#  - vseg_increment : address increment for replicated peripherals
    3441#
    35 # Regarding physical memory allocation, there is one allocator per cluster:
    36 # - We use only one big physical page (2 Mbytes) for the four boot vsegs,
    37 #   allocated in cluster[0,0], identity mapping.
    38 # - We use one big page per cluster for the kernel vsegs.
    39 #   The kernel_code, kernel_init and kernel_ptab can be replicated in all clusters.
    40 #   The kernel_data and kernel_uncdata shared vsegs are only mapped in cluster[0,0].
    41 # - We use 8 small physical pages (4 Kbytes) per cluster for the schedulers.
    42 # - We use one big page for each external peripheral in IO cluster,
    43 # - We use one small page per cluster for each internal peripheral.
    44 ###################################################################################
     42#  Regarding the boot and kernel vsegs mapping :
     43#  - We use one big physical page (2 Mbytes) for the preloader and the four
     44#    boot vsegs, all allocated in cluster[0,0].
     45#  - We use one big page per cluster for the replicated kernel code vsegs.
     46#  - We use one big page in cluster[0][0] for the kernel data vseg.
     47#  - We use one big page per cluster for the distributed kernel heap vsegs.
     48#  - We use one big page per cluster for the distributed ptab vsegs.
     49#  - We use small physical pages (4 Kbytes) per cluster for the schedulers.
     50#  - We use one big page for each external peripheral in IO cluster,
     51#  - We use one small page per cluster for each internal peripheral.
     52##################################################################################
    4553
    4654########################
     
    8088            ((x_io == x_size-1) and (y_io == y_size-1)) )
    8189
    82     platform_name  = 'tsar_iob_%d_%d_%d_%d_%d' % (x_size,y_size,nb_procs,nb_ttys,fbf_width)
    83 
    84     ### define replicated physical segments
    85     ### These segments are replicated in all clusters
     90    ### define type and name
     91
     92    platform_type  = 'tsar_iob'
     93    platform_name  = '%s_%d_%d_%d' % ( platform_type, x_size, y_size , nb_procs )
     94
     95    ### define physical segments replicated in all clusters
    8696
    8797    ram_base = 0x0000000000
     
    145155    ### code, init, ptab, heap & sched vsegs are replicated in all clusters.
    146156    ### data & uncdata vsegs are only mapped in cluster[0][0].
    147     ### - We use one BIG page for code vsegs in each cluster.
    148     ### - We use one BIG page for ptab vsegs in each cluster.
    149     ### - we use one BIG page for heap vsegs in each cluster.
    150     ### - We use 2*procs SMALL pages for sched vsegs in each cluster.
    151     ### - We use one BIG page for data vseg in cluster[0,0].
    152     ### - we use one SMALL page for uncdata in cluster[0,0].
    153157
    154158    kernel_code_vbase    = 0x80000000
     
    173177    kernel_sched_size    = 0x00002000*nb_procs  # 8 Kbytes per proc per cluster
    174178
     179    #########################
    175180    ### create mapping
     181    #########################
    176182
    177183    mapping = Mapping( name           = platform_name,
     
    192198                       ram_size       = ram_size )
    193199
    194     ###  external peripherals (accessible in cluster[0,0] only for this mapping)
    195 
    196     iob = mapping.addPeriph( 'IOB', base = iob_base, size = iob_size, ptype = 'IOB' )
    197 
    198     bdv = mapping.addPeriph( 'BDV', base = bdv_base, size = bdv_size, ptype = 'IOC', subtype = 'BDV' )
    199 
    200     tty = mapping.addPeriph( 'TTY', base = tty_base, size = tty_size, ptype = 'TTY', channels = nb_ttys )
    201 
    202     nic = mapping.addPeriph( 'NIC', base = nic_base, size = nic_size, ptype = 'NIC', channels = nb_nics )
    203 
    204     cma = mapping.addPeriph( 'CMA', base = cma_base, size = cma_size, ptype = 'CMA', channels = nb_cmas )
    205 
    206     fbf = mapping.addPeriph( 'FBF', base = fbf_base, size = fbf_size, ptype = 'FBF', arg = fbf_width )
    207 
    208     rom = mapping.addPeriph( 'ROM', base = rom_base, size = rom_size, ptype = 'ROM' )
    209 
    210     pic = mapping.addPeriph( 'PIC', base = pic_base, size = pic_size, ptype = 'PIC', channels = 32 )
    211 
    212     mapping.addIrq( pic, index = 0,  isrtype = 'ISR_NIC_RX', channel = 0 )
    213     mapping.addIrq( pic, index = 1,  isrtype = 'ISR_NIC_RX', channel = 1 )
    214 
    215     mapping.addIrq( pic, index = 2,  isrtype = 'ISR_NIC_TX', channel = 0 )
    216     mapping.addIrq( pic, index = 3,  isrtype = 'ISR_NIC_TX', channel = 1 )
    217 
    218     mapping.addIrq( pic, index = 4,  isrtype = 'ISR_CMA'   , channel = 0 )
    219     mapping.addIrq( pic, index = 5,  isrtype = 'ISR_CMA'   , channel = 1 )
    220     mapping.addIrq( pic, index = 6,  isrtype = 'ISR_CMA'   , channel = 2 )
    221     mapping.addIrq( pic, index = 7,  isrtype = 'ISR_CMA'   , channel = 3 )
    222 
    223     mapping.addIrq( pic, index = 8,  isrtype = 'ISR_BDV'   , channel = 0 )
    224 
    225     mapping.addIrq( pic, index = 16, isrtype = 'ISR_TTY_RX', channel = 0 )
    226     mapping.addIrq( pic, index = 17, isrtype = 'ISR_TTY_RX', channel = 1 )
    227     mapping.addIrq( pic, index = 18, isrtype = 'ISR_TTY_RX', channel = 2 )
    228     mapping.addIrq( pic, index = 19, isrtype = 'ISR_TTY_RX', channel = 3 )
    229     mapping.addIrq( pic, index = 20, isrtype = 'ISR_TTY_RX', channel = 4 )
    230     mapping.addIrq( pic, index = 21, isrtype = 'ISR_TTY_RX', channel = 5 )
    231     mapping.addIrq( pic, index = 22, isrtype = 'ISR_TTY_RX', channel = 6 )
    232     mapping.addIrq( pic, index = 23, isrtype = 'ISR_TTY_RX', channel = 7 )
    233     mapping.addIrq( pic, index = 24, isrtype = 'ISR_TTY_RX', channel = 8 )
    234     mapping.addIrq( pic, index = 25, isrtype = 'ISR_TTY_RX', channel = 9 )
    235     mapping.addIrq( pic, index = 26, isrtype = 'ISR_TTY_RX', channel = 10 )
    236     mapping.addIrq( pic, index = 27, isrtype = 'ISR_TTY_RX', channel = 11 )
    237     mapping.addIrq( pic, index = 28, isrtype = 'ISR_TTY_RX', channel = 12 )
    238     mapping.addIrq( pic, index = 29, isrtype = 'ISR_TTY_RX', channel = 13 )
    239     mapping.addIrq( pic, index = 30, isrtype = 'ISR_TTY_RX', channel = 14 )
    240     mapping.addIrq( pic, index = 31, isrtype = 'ISR_TTY_RX', channel = 15 )
    241 
    242     ### hardware components replicated in all clusters
     200
     201    #############################
     202    ###   Hardware Components
     203    #############################
    243204
    244205    for x in xrange( x_size ):
     
    247208            offset     = cluster_xy << (paddr_width - x_width - y_width)
    248209
    249             ram = mapping.addRam( 'RAM', base = ram_base + offset, size = ram_size )
    250 
    251             mmc = mapping.addPeriph( 'MMC', base = mmc_base + offset, size = mmc_size,
    252                                      ptype = 'MMC' )
    253 
    254             dma = mapping.addPeriph( 'DMA', base = dma_base + offset, size = dma_size,
    255                                      ptype = 'DMA', channels = nb_procs )
    256 
    257             xcu = mapping.addPeriph( 'XCU', base = xcu_base + offset, size = xcu_size,
    258                                      ptype = 'XCU', channels = nb_procs * irq_per_proc, arg = 32 )
    259 
    260             # MMC IRQ replicated in all clusters
     210            ### components replicated in all clusters
     211            ram = mapping.addRam( 'RAM', base = ram_base + offset,
     212                                  size = ram_size )
     213
     214            mmc = mapping.addPeriph( 'MMC', base = mmc_base + offset,
     215                                     size = mmc_size, ptype = 'MMC' )
     216
     217            dma = mapping.addPeriph( 'DMA', base = dma_base + offset,
     218                                     size = dma_size, ptype = 'DMA',
     219                                     channels = nb_procs )
     220
     221            xcu = mapping.addPeriph( 'XCU', base = xcu_base + offset,
     222                                     size = xcu_size, ptype = 'XCU',
     223                                     channels = nb_procs * irq_per_proc, arg = 32 )
     224
    261225            mapping.addIrq( xcu, index = 0, isrtype = 'ISR_MMC' )
    262226
    263             # DMA IRQ replicated in all clusters
    264227            for i in xrange ( dma.channels ):
    265228                mapping.addIrq( xcu, index = 1+i, isrtype = 'ISR_DMA',
    266                         channel = i )
    267 
    268             # processors
     229                                channel = i )
     230
    269231            for p in xrange ( nb_procs ):
    270232                mapping.addProc( x, y, p )
     233
     234            ### external peripherals in cluster_io
     235            if ( (x==x_io) and (y==y_io) ):
     236
     237                iob = mapping.addPeriph( 'IOB', base = iob_base, size = iob_size,
     238                                         ptype = 'IOB' )
     239
     240                bdv = mapping.addPeriph( 'BDV', base = bdv_base, size = bdv_size,
     241                                         ptype = 'IOC', subtype = 'BDV' )
     242
     243                tty = mapping.addPeriph( 'TTY', base = tty_base, size = tty_size,
     244                                         ptype = 'TTY', channels = nb_ttys )
     245
     246                nic = mapping.addPeriph( 'NIC', base = nic_base, size = nic_size,
     247                                         ptype = 'NIC', channels = nb_nics )
     248
     249                cma = mapping.addPeriph( 'CMA', base = cma_base, size = cma_size,
     250                                         ptype = 'CMA', channels = nb_cmas )
     251
     252                fbf = mapping.addPeriph( 'FBF', base = fbf_base, size = fbf_size,
     253                                         ptype = 'FBF', arg = fbf_width )
     254
     255                rom = mapping.addPeriph( 'ROM', base = rom_base, size = rom_size,
     256                                         ptype = 'ROM' )
     257
     258                pic = mapping.addPeriph( 'PIC', base = pic_base, size = pic_size,
     259                                         ptype = 'PIC', channels = 32 )
     260
     261                mapping.addIrq( pic, index = 0,  isrtype = 'ISR_NIC_RX', channel = 0 )
     262                mapping.addIrq( pic, index = 1,  isrtype = 'ISR_NIC_RX', channel = 1 )
     263
     264                mapping.addIrq( pic, index = 2,  isrtype = 'ISR_NIC_TX', channel = 0 )
     265                mapping.addIrq( pic, index = 3,  isrtype = 'ISR_NIC_TX', channel = 1 )
     266
     267                mapping.addIrq( pic, index = 4,  isrtype = 'ISR_CMA'   , channel = 0 )
     268                mapping.addIrq( pic, index = 5,  isrtype = 'ISR_CMA'   , channel = 1 )
     269                mapping.addIrq( pic, index = 6,  isrtype = 'ISR_CMA'   , channel = 2 )
     270                mapping.addIrq( pic, index = 7,  isrtype = 'ISR_CMA'   , channel = 3 )
     271
     272                mapping.addIrq( pic, index = 8,  isrtype = 'ISR_BDV'   , channel = 0 )
     273
     274                mapping.addIrq( pic, index = 16, isrtype = 'ISR_TTY_RX', channel = 0 )
     275                mapping.addIrq( pic, index = 17, isrtype = 'ISR_TTY_RX', channel = 1 )
     276                mapping.addIrq( pic, index = 18, isrtype = 'ISR_TTY_RX', channel = 2 )
     277                mapping.addIrq( pic, index = 19, isrtype = 'ISR_TTY_RX', channel = 3 )
     278                mapping.addIrq( pic, index = 20, isrtype = 'ISR_TTY_RX', channel = 4 )
     279                mapping.addIrq( pic, index = 21, isrtype = 'ISR_TTY_RX', channel = 5 )
     280                mapping.addIrq( pic, index = 22, isrtype = 'ISR_TTY_RX', channel = 6 )
     281                mapping.addIrq( pic, index = 23, isrtype = 'ISR_TTY_RX', channel = 7 )
     282                mapping.addIrq( pic, index = 24, isrtype = 'ISR_TTY_RX', channel = 8 )
     283                mapping.addIrq( pic, index = 25, isrtype = 'ISR_TTY_RX', channel = 9 )
     284                mapping.addIrq( pic, index = 26, isrtype = 'ISR_TTY_RX', channel = 10 )
     285                mapping.addIrq( pic, index = 27, isrtype = 'ISR_TTY_RX', channel = 11 )
     286                mapping.addIrq( pic, index = 28, isrtype = 'ISR_TTY_RX', channel = 12 )
     287                mapping.addIrq( pic, index = 29, isrtype = 'ISR_TTY_RX', channel = 13 )
     288                mapping.addIrq( pic, index = 30, isrtype = 'ISR_TTY_RX', channel = 14 )
     289                mapping.addIrq( pic, index = 31, isrtype = 'ISR_TTY_RX', channel = 15 )
     290
     291
     292    ####################################
     293    ###   Boot & Kernel vsegs mapping
     294    ####################################
    271295
    272296    ### global vsegs for boot_loader
     
    289313                       'CXW_', vtype = 'BUFFER', x = 0, y = 0, pseg = 'RAM',
    290314                       identity = True , local = False, big = True )
     315
     316    ### global vsegs kernel_code, kernel_init : big / local
     317    ### replicated in all clusters with the same name & same vbase
     318    for x in xrange( x_size ):
     319        for y in xrange( y_size ):
     320            mapping.addGlobal( 'seg_kernel_code', kernel_code_vbase, kernel_code_size,
     321                               'CXW_', vtype = 'ELF', x = x , y = y , pseg = 'RAM',
     322                               binpath = 'build/kernel/kernel.elf',
     323                               local = True, big = True )
     324
     325            mapping.addGlobal( 'seg_kernel_init', kernel_init_vbase, kernel_init_size,
     326                               'CXW_', vtype = 'ELF', x = x , y = y , pseg = 'RAM',
     327                               binpath = 'build/kernel/kernel.elf',
     328                               local = True, big = True )
    291329
    292330    ### Global vsegs kernel_ptab_x_y : big / non local
     
    299337                               'CXW_', vtype = 'PTAB', x = x, y = y, pseg = 'RAM',
    300338                               local = False , big = True )
    301 
    302     ### global vsegs kernel_code, kernel_init : big / local
    303     ### replicated in all clusters with the same name & same vbase
    304     for x in xrange( x_size ):
    305         for y in xrange( y_size ):
    306             mapping.addGlobal( 'seg_kernel_code', kernel_code_vbase, kernel_code_size,
    307                                'CXW_', vtype = 'ELF', x = x , y = y , pseg = 'RAM',
    308                                binpath = 'build/kernel/kernel.elf',
    309                                local = True, big = True )
    310 
    311             mapping.addGlobal( 'seg_kernel_init', kernel_init_vbase, kernel_init_size,
    312                                'CXW_', vtype = 'ELF', x = x , y = y , pseg = 'RAM',
    313                                binpath = 'build/kernel/kernel.elf',
    314                                local = True, big = True )
    315339
    316340    ### global vseg kernel_data : big / non local
     
    333357        for y in xrange( y_size ):
    334358            offset = ((x << y_width) + y) * kernel_sched_size
    335             mapping.addGlobal( 'seg_kernel_sched_%d_%d' %(x,y), kernel_sched_vbase + offset , kernel_sched_size,
     359            mapping.addGlobal( 'seg_kernel_sched_%d_%d' %(x,y),
     360                               kernel_sched_vbase + offset , kernel_sched_size,
    336361                               'C_W_', vtype = 'SCHED', x = x , y = y , pseg = 'RAM',
    337362                               local = False, big = False )
     
    342367        for y in xrange( y_size ):
    343368            offset = ((x << y_width) + y) * kernel_heap_size
    344             mapping.addGlobal( 'seg_kernel_heap_%d_%d' %(x,y), kernel_heap_vbase + offset , kernel_heap_size,
     369            mapping.addGlobal( 'seg_kernel_heap_%d_%d' %(x,y),
     370                               kernel_heap_vbase + offset , kernel_heap_size,
    345371                               'C_W_', vtype = 'HEAP', x = x , y = y , pseg = 'RAM',
    346372                               local = False, big = True )
     
    398424                               local = False, big = False )
    399425
    400     ### return mapping ###
    401 
    402426    return mapping
    403427
    404 ################################# platform test #######################################################
     428################################# platform test ####################################
    405429
    406430if __name__ == '__main__':
  • trunk/platforms/tsar_generic_iob/top.cpp

    r914 r938  
    66// This program is released under the GNU public license
    77///////////////////////////////////////////////////////////////////////////////
    8 // This file define a generic TSAR architecture with an IO network emulating
    9 // an external bus (i.e. Hypertransport) to access 7 external peripherals:
     8// This file define a generic TSAR architecture with an external IO network
     9// emulating a PCI or Hypertransport I/O bus to access 7 external peripherals:
    1010//
    1111// - BROM : boot ROM
     
    1717// - IOPI : HWI to SWI translator.
    1818//
     19// This I/0 bus is connected to internal address space through two IOB bridges
     20// located in cluster[0][0] and cluster[X_SIZE-1][Åž_SIZE-1].
     21//
    1922// The internal physical address space is 40 bits, and the cluster index
    2023// is defined by the 8 MSB bits, using a fixed format: X is encoded on 4 bits,
    21 // Y is encodes on 4 bits, whatever the actual mesh size.
     24// Y is encoded on 4 bits, whatever the actual mesh size.
    2225// => at most 16 * 16 clusters. Each cluster contains up to 4 processors.
    2326//
     
    9598// - L1_DSETS
    9699// - BDEV_IMAGE_NAME  : file pathname for block device
    97 // - NIC_TIMEOUT      : max number of cycles before closing a container
    98100//
    99101// General policy for 40 bits physical address decoding:
     
    207209#define BDEV_IMAGE_NAME       "../../../giet_vm/hdd/virt_hdd.dmg"
    208210
    209 #define NIC_TIMEOUT           10000
     211#define ROM_SOFT_NAME         "../../softs/tsar_boot/preloader.elf"
    210212
    211213#define NORTH                 0
     
    215217
    216218#define cluster(x,y)   ((y) + ((x) << 4))
    217 
    218 ////////////////////////////////////////////////////////////
    219 //    Software to be loaded in ROM & RAM
    220 //////////////////////i/////////////////////////////////////
    221 
    222 #define BOOT_SOFT_NAME        "../../softs/tsar_boot/preloader.elf"
    223219
    224220////////////////////////////////////////////////////////////
     
    318314
    319315
    320    char     soft_name[256]   = BOOT_SOFT_NAME;             // pathname: binary code
    321    size_t   ncycles          = 4000000000;                 // simulated cycles
    322    char     disk_name[256]   = BDEV_IMAGE_NAME;            // pathname: disk image
    323    ssize_t  threads_nr       = 1;                          // simulator's threads number
    324    bool     debug_ok         = false;                      // trace activated
    325    size_t   debug_memc_id    = 0xFFFFFFFF;                 // index of traced memc
    326    size_t   debug_proc_id    = 0xFFFFFFFF;                 // index of traced proc
    327    size_t   debug_xram_id    = 0xFFFFFFFF;                 // index of traced xram
    328    bool     debug_iob        = false;                      // trace iob0 & iob1 when true
    329    uint32_t debug_from       = 0;                          // trace start cycle
    330    uint32_t frozen_cycles    = MAX_FROZEN_CYCLES;          // monitoring frozen processor
    331    size_t   cluster_iob0     = cluster(0,0);               // cluster containing IOB0
    332    size_t   cluster_iob1     = cluster(XMAX-1,YMAX-1);     // cluster containing IOB1
    333    size_t   x_width          = X_WIDTH;                    // # of bits for x
    334    size_t   y_width          = Y_WIDTH;                    // # of bits for y
    335    size_t   p_width          = P_WIDTH;                    // # of bits for lpid
     316   char     soft_name[256]   = ROM_SOFT_NAME;           // pathname: binary code
     317   size_t   ncycles          = 4000000000;              // simulated cycles
     318   char     disk_name[256]   = BDEV_IMAGE_NAME;         // pathname: disk image
     319   ssize_t  threads_nr       = 1;                       // simulator's threads number
     320   bool     debug_ok         = false;                   // trace activated
     321   size_t   debug_memc_id    = 0xFFFFFFFF;              // index of traced memc
     322   size_t   debug_proc_id    = 0xFFFFFFFF;              // index of traced proc
     323   size_t   debug_xram_id    = 0xFFFFFFFF;              // index of traced xram
     324   bool     debug_iob        = false;                   // trace iob0 & iob1 when true
     325   uint32_t debug_from       = 0;                       // trace start cycle
     326   uint32_t frozen_cycles    = MAX_FROZEN_CYCLES;       // monitoring frozen processor
     327   size_t   cluster_iob0     = cluster(0,0);            // cluster containing IOB0
     328   size_t   cluster_iob1     = cluster(XMAX-1,YMAX-1);  // cluster containing IOB1
     329   size_t   x_width          = X_WIDTH;                 // # of bits for x
     330   size_t   y_width          = Y_WIDTH;                 // # of bits for y
     331   size_t   p_width          = P_WIDTH;                 // # of bits for lpid
    336332
    337333#if USING_OPENMP
     
    356352            ncycles = atoi(argv[n+1]);
    357353         }
    358          else if ((strcmp(argv[n],"-SOFT") == 0) && (n+1<argc) )
     354         else if ((strcmp(argv[n],"-ROM") == 0) && (n+1<argc) )
    359355         {
    360356            strcpy(soft_name, argv[n+1]);
     
    427423            std::cout << "   The order is not important." << std::endl;
    428424            std::cout << "   Accepted arguments are :" << std::endl << std::endl;
    429             std::cout << "     -SOFT pathname_for_embedded_soft" << std::endl;
    430             std::cout << "     -DISK pathname_for_disk_image" << std::endl;
    431             std::cout << "     -NCYCLES number_of_simulated_cycles" << std::endl;
    432             std::cout << "     -DEBUG debug_start_cycle" << std::endl;
    433             std::cout << "     -THREADS simulator's threads number" << std::endl;
    434             std::cout << "     -FROZEN max_number_of_lines" << std::endl;
    435             std::cout << "     -MEMCID index_memc_to_be_traced" << std::endl;
    436             std::cout << "     -XRAMID index_xram_to_be_traced" << std::endl;
    437             std::cout << "     -PROCID index_proc_to_be_traced" << std::endl;
    438             std::cout << "     -IOB    non_zero_value" << std::endl;
     425            std::cout << "     - ROM pathname_for_embedded_soft" << std::endl;
     426            std::cout << "     - DISK pathname_for_disk_image" << std::endl;
     427            std::cout << "     - NCYCLES number_of_simulated_cycles" << std::endl;
     428            std::cout << "     - DEBUG debug_start_cycle" << std::endl;
     429            std::cout << "     - THREADS simulator's threads number" << std::endl;
     430            std::cout << "     - FROZEN max_number_of_lines" << std::endl;
     431            std::cout << "     - MEMCID index_memc_to_be_traced" << std::endl;
     432            std::cout << "     - XRAMID index_xram_to_be_traced" << std::endl;
     433            std::cout << "     - PROCID index_proc_to_be_traced" << std::endl;
     434            std::cout << "     - IOB    non_zero_value" << std::endl;
    439435            exit(0);
    440436         }
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