Index: trunk/platforms/tsar_generic_leti/arch.py
===================================================================
--- trunk/platforms/tsar_generic_leti/arch.py	(revision 938)
+++ trunk/platforms/tsar_generic_leti/arch.py	(revision 939)
@@ -132,8 +132,8 @@
 
     boot_data_vbase      = 0x000D0000      # ident
-    boot_data_size       = 0x000C0000      # 768 Kbytes
-
-    boot_stack_vbase     = 0x00190000      # ident
-    boot_stack_size      = 0x00070000      # 448 Kbytes
+    boot_data_size       = 0x000B0000      # 704 Kbytes
+
+    boot_stack_vbase     = 0x00180000      # ident
+    boot_stack_size      = 0x00080000      # 512 Kbytes
 
     ### define ramdisk vseg / must be identity mapping in cluster[0][0]
@@ -172,5 +172,4 @@
 
     mapping = Mapping( name           = platform_name,
-                       p_type         = platform_type,
                        x_size         = x_size,
                        y_size         = y_size,
@@ -265,5 +264,4 @@
 
     ### global vsegs for preloader & boot_loader are mapped in cluster[0][0]
-    ### we want to pack those 5 vsegs in the same big page
     ### => same flags CXW_ / identity mapping / non local / big page
 
@@ -342,16 +340,4 @@
                                local = False, big = True )
 
-    ### global vsegs kernel_sched : non local / small pages
-    ### allocated in all clusters containing processors
-    ### different content => name & vbase indexed by (x,y)
-    for x in xrange( x_size ):
-        for y in xrange( y_size - 1 ):
-            offset = ((x << y_width) + y) * kernel_ptab_size
-
-            mapping.addGlobal( 'seg_kernel_sched_%d_%d' %(x,y), 
-                               kernel_sched_vbase + offset , kernel_sched_size,
-                               'C_W_', vtype = 'SCHED', x = x, y = y, pseg = 'RAM',
-                               local = False, big = False )
-
     ### global vsegs kernel_heap_x_y : non local / big pages
     ### distributed in all clusters containing processors
@@ -413,4 +399,16 @@
                                mmc_base + offset, mmc_size,
                                '__W_', vtype = 'PERI' , x = x , y = y , pseg = 'MMC',
+                               local = False, big = False )
+
+    ### global vsegs kernel_sched : non local / small pages
+    ### allocated in all clusters containing processors
+    ### different content => name & vbase indexed by (x,y)
+    for x in xrange( x_size ):
+        for y in xrange( y_size - 1 ):
+            offset = ((x << y_width) + y) * kernel_ptab_size
+
+            mapping.addGlobal( 'seg_kernel_sched_%d_%d' %(x,y), 
+                               kernel_sched_vbase + offset , kernel_sched_size,
+                               'C_W_', vtype = 'SCHED', x = x, y = y, pseg = 'RAM',
                                local = False, big = False )
 
Index: trunk/platforms/tsar_generic_leti/top.cpp
===================================================================
--- trunk/platforms/tsar_generic_leti/top.cpp	(revision 938)
+++ trunk/platforms/tsar_generic_leti/top.cpp	(revision 939)
@@ -604,5 +604,5 @@
 #endif
 
-   loader.memory_default(0xAA);
+   loader.memory_default(0x55);
 
    typedef soclib::common::GdbServer<soclib::common::Mips32ElIss> proc_iss;
@@ -1133,8 +1133,8 @@
 
         // Monitor a specific address for L2 cache
-        // clusters[1][1]->memc->cache_monitor(0x200000F000ULL);
+        // clusters[0][0]->memc->cache_monitor( 0x0000201E00ULL );
 
         // Monitor a specific address for one XRAM
-        // clusters[0][0]->xram->start_monitor( 0x200000F00ULL , 64);
+        // clusters[0][0]->xram->start_monitor( 0x0000201E00ULL , 64);
 
         // stats display