Changeset 94 for trunk/platforms/dsx
- Timestamp:
- Sep 14, 2010, 3:30:46 PM (14 years ago)
- Location:
- trunk/platforms/dsx/v1_1cluster_phys_dma
- Files:
-
- 1 deleted
- 2 edited
Legend:
- Unmodified
- Added
- Removed
-
trunk/platforms/dsx/v1_1cluster_phys_dma/topcell_/topcell_.cpp
r93 r94 5 5 ** your changes will be lost ! 6 6 ** 7 ** Generated by DSX on 2010-09-14 1 4:36:17.4631237 ** Generated by DSX on 2010-09-14 15:19:49.691098 8 8 ** by choichil@hop 9 9 ** MARKER_END … … 1212 1212 { 1213 1213 // Segment configure; 1214 mtc.add(proc_0_1_seg);1215 1214 mtc.add(ram_c_reset_seg); 1216 1215 mtc.add(ram_c_excep_seg); 1217 1216 mtc.add(ram_c_text_seg); 1218 1217 mtc.add(ram_c_data_seg); 1218 mtc.add(proc_0_3_seg); 1219 1219 mtc.add(proc_0_0_seg); 1220 mtc.add(proc_0_1_seg); 1220 1221 mtc.add(proc_0_2_seg); 1221 mt c.add(proc_0_3_seg);1222 mtp.add(xicu_seg); 1222 1223 mtp.add(tty0_seg); 1224 mtp.add(dma0_seg); 1223 1225 mtp.add(ram_p_reset_seg); 1224 1226 mtp.add(ram_p_excep_seg); 1225 1227 mtp.add(ram_p_text_seg); 1226 1228 mtp.add(ram_p_data_seg); 1227 mtp.add(xicu_seg);1228 mtp.add(dma0_seg);1229 1229 mtx.add(ram_x_reset_seg); 1230 1230 mtx.add(ram_x_excep_seg); -
trunk/platforms/dsx/v1_1cluster_phys_dma/topcell_/topcell_.sd
r93 r94 5 5 # your changes will be lost ! 6 6 # 7 ## Generated by DSX on 2010-09-14 1 4:36:17.0242387 ## Generated by DSX on 2010-09-14 15:19:49.271489 8 8 ## by choichil@hop 9 9 ## MARKER_END … … 29 29 Uses('common:plain_file_loader', )], 30 30 header_files = ['topcell_.h'], 31 ports = [Port("caba: bit_in", "p_resetn", addr_size = 64, cell_size = 4, clen_size = 1, pktid_size = 4, plen_size = 8, rerror_size = 1, rflag_size = 1, srcid_size = 14, trdid_size = 4, wrplen_size = 1),32 Port("caba: clock_in", "p_clock", addr_size = 64, cell_size = 4, clen_size = 1, pktid_size = 4, plen_size = 8, rerror_size = 1, rflag_size = 1, srcid_size = 14, trdid_size = 4, wrplen_size = 1)],31 ports = [Port("caba:clock_in", "p_clock", addr_size = 64, cell_size = 4, clen_size = 1, pktid_size = 4, plen_size = 8, rerror_size = 1, rflag_size = 1, srcid_size = 14, trdid_size = 4, wrplen_size = 1), 32 Port("caba:bit_in", "p_resetn", addr_size = 64, cell_size = 4, clen_size = 1, pktid_size = 4, plen_size = 8, rerror_size = 1, rflag_size = 1, srcid_size = 14, trdid_size = 4, wrplen_size = 1)], 33 33 implementation_files = ['topcell_.cpp'] 34 34 )
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