Changeset 959 for trunk/platforms/tsar_generic_iob
- Timestamp:
- Mar 27, 2015, 5:21:52 PM (10 years ago)
- Location:
- trunk/platforms/tsar_generic_iob
- Files:
-
- 4 edited
-
arch.py (modified) (1 diff)
-
top.cpp (modified) (7 diffs)
-
tsar_iob_cluster/caba/source/include/tsar_iob_cluster.h (modified) (3 diffs)
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tsar_iob_cluster/caba/source/src/tsar_iob_cluster.cpp (modified) (3 diffs)
Legend:
- Unmodified
- Added
- Removed
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trunk/platforms/tsar_generic_iob/arch.py
r955 r959 217 217 size = xcu_size, ptype = 'XCU', 218 218 channels = nb_procs * irq_per_proc, 219 arg0 = 32, arg1 = 32, arg2 = 32 , arg3 = 16)219 arg0 = 32, arg1 = 32, arg2 = 32 ) 220 220 221 221 mapping.addIrq( xcu, index = 0, isrtype = 'ISR_MMC' ) -
trunk/platforms/tsar_generic_iob/top.cpp
r953 r959 50 50 // Besides the external peripherals, each cluster contains one XICU component, 51 51 // and one multi channels DMA component. 52 // The XICU component is mainly used to handle WTI IRQs, as only 5 HWI IRQs53 // are connected to XICU in each cluster:54 // - IRQ_IN[0] : MMC55 // - IRQ_IN[1] : DMA channel 056 // - IRQ_IN[2] : DMA channel 157 // - IRQ_IN[3] : DMA channel 258 // - IRQ_IN[ 4] : DMA channel 352 // The XICU component is mainly used to handle WTI IRQs, as only 53 // 1 + NB_PROCS_MAX HWI IRQs are connected to XICU in each cluster: 54 // - IRQ_IN[0] : MMC 55 // - IRQ_IN[1] : DMA channel 0 56 // - IRQ_IN[2] : DMA channel 1 57 // - ... ... 58 // - IRQ_IN[NB_PROCS_MAX] : DMA channel NB_PROCS_MAX 59 59 // 60 60 // All clusters are identical, but cluster(0,0) and cluster(XMAX-1,YMAX-1) … … 80 80 // - X_SIZE : number of clusters in a row 81 81 // - Y_SIZE : number of clusters in a column 82 // - NB_PROCS_MAX : number of processors per cluster ( power of 2)83 // - NB_DMA_CHANNELS : number of DMA channels per cluster ( up to 8)82 // - NB_PROCS_MAX : number of processors per cluster (up to 8) 83 // - NB_DMA_CHANNELS : number of DMA channels per cluster (>= NB_PROCS_MAX) 84 84 // - NB_TTY_CHANNELS : number of TTY channels in I/O network (up to 16) 85 85 // - NB_NIC_CHANNELS : number of NIC channels in I/O network (up to 2) … … 87 87 // - FBUF_X_SIZE : width of frame buffer (pixels) 88 88 // - FBUF_Y_SIZE : heigth of frame buffer (lines) 89 // - XCU_NB_INPUTS : number of HWIs = number of WTIs = number of PTIs 89 // - XCU_NB_HWI : number of XCU HWIs (>= NB_PROCS_MAX + 1) 90 // - XCU_NB_PTI : number of XCU PTIs (>= NB_PROCS_MAX) 91 // - XCU_NB_WTI : number of XCU WTIs (>= 4*NB_PROCS_MAX) 92 // - XCU_NB_OUT : number of XCU output IRQs (>= 4*NB_PROCS_MAX) 90 93 // 91 94 // Some secondary hardware parameters must be defined in this top.cpp file: … … 445 448 "The YMAX parameter cannot be larger than 16" ); 446 449 447 assert( (NB_PROCS_MAX <= (1 << P_WIDTH)) and 448 "NB_PROCS_MAX parameter cannot be larger than 2^P_WIDTH" ); 449 450 assert( (NB_DMA_CHANNELS <= 8) and 450 assert( (NB_PROCS_MAX <= 8) and 451 "NB_PROCS_MAX parameter cannot be larger than 8" ); 452 453 assert( (XCU_NB_HWI > NB_PROCS_MAX) and 454 "XCU_NB_HWI must be larger than NB_PROCS_MAX" ); 455 456 assert( (XCU_NB_PTI >= NB_PROCS_MAX) and 457 "XCU_NB_PTI cannot be smaller than NB_PROCS_MAX" ); 458 459 assert( (XCU_NB_WTI >= 4*NB_PROCS_MAX) and 460 "XCU_NB_WTI cannot be smaller than 4*NB_PROCS_MAX" ); 461 462 assert( (XCU_NB_OUT >= 4*NB_PROCS_MAX) and 463 "XCU_NB_OUT cannot be smaller than 4*NB_PROCS_MAX" ); 464 465 assert( (NB_DMA_CHANNELS >= NB_PROCS_MAX) and 451 466 "The NB_DMA_CHANNELS parameter cannot be larger than 8" ); 452 467 … … 1070 1085 L1_DSETS, 1071 1086 XRAM_LATENCY, 1072 XCU_NB_INPUTS, 1087 XCU_NB_HWI, 1088 XCU_NB_PTI, 1089 XCU_NB_WTI, 1090 XCU_NB_OUT, 1073 1091 1074 1092 loader, … … 1431 1449 1432 1450 // Monitor a specific address for one L1 cache 1433 // clusters[0][0]->proc[0]->cache_monitor(0x 600800ULL);1451 // clusters[0][0]->proc[0]->cache_monitor(0x800080ULL); 1434 1452 1435 1453 // Monitor a specific address for one L2 cache 1436 // clusters[0][0]->memc->cache_monitor( 0x 600800ULL, false ); // full line1454 // clusters[0][0]->memc->cache_monitor( 0x800080ULL, false ); // full line 1437 1455 1438 1456 // Monitor a specific address for one XRAM … … 1457 1475 clusters[x][y]->signal_int_vci_ini_proc[l].print_trace(proc_signame.str()); 1458 1476 1459 // clusters[x][y]->xicu->print_trace(l);1460 //std::ostringstream xicu_signame;1461 //xicu_signame << "[SIG]XICU_" << x << "_" << y;1462 //clusters[x][y]->signal_int_vci_tgt_xicu.print_trace(xicu_signame.str());1477 clusters[x][y]->xicu->print_trace(1); 1478 std::ostringstream xicu_signame; 1479 xicu_signame << "[SIG]XICU_" << x << "_" << y; 1480 clusters[x][y]->signal_int_vci_tgt_xicu.print_trace(xicu_signame.str()); 1463 1481 1464 1482 clusters[x][y]->mdma->print_trace(); 1465 std::ostringstream mdma_signame; 1466 mdma_signame << "[SIG]MDMA_" << x << "_" << y; 1467 clusters[x][y]->signal_int_vci_tgt_mdma.print_trace(mdma_signame.str()); 1483 std::ostringstream mdma_tgt_signame; 1484 mdma_tgt_signame << "[SIG]MDMA_TGT_" << x << "_" << y; 1485 clusters[x][y]->signal_int_vci_tgt_mdma.print_trace(mdma_tgt_signame.str()); 1486 std::ostringstream mdma_ini_signame; 1487 mdma_ini_signame << "[SIG]MDMA_INI_" << x << "_" << y; 1488 clusters[x][y]->signal_int_vci_ini_mdma.print_trace(mdma_ini_signame.str()); 1468 1489 1469 1490 // local interrupts in cluster(x,y) -
trunk/platforms/tsar_generic_iob/tsar_iob_cluster/caba/source/include/tsar_iob_cluster.h
r802 r959 70 70 // interrupt signals 71 71 sc_signal<bool> signal_false; 72 sc_signal<bool> signal_proc_it[ 16];72 sc_signal<bool> signal_proc_it[32]; 73 73 sc_signal<bool> signal_irq_mdma[8]; 74 74 sc_signal<bool> signal_irq_memc; … … 198 198 const soclib::common::MappingTable &mt_iox, 199 199 200 size_t x_width, 201 size_t y_width, 202 size_t l_width, 203 size_t p_width, 200 size_t x_width, // x field bits 201 size_t y_width, // y field bits 202 size_t l_width, // l field bits 203 size_t p_width, // p field bits 204 204 205 205 size_t int_memc_tgt_id, … … 226 226 size_t l1_d_sets, 227 227 size_t xram_latency, 228 size_t xcu_nb_inputs, 229 230 const Loader &loader, // loader for XRAM 228 size_t xcu_nb_hwi, 229 size_t xcu_nb_pti, 230 size_t xcu_nb_wti, 231 size_t xcu_nb_irq, 232 233 const Loader &loader, // loader for XRAM 231 234 232 235 uint32_t frozen_cycles, -
trunk/platforms/tsar_generic_iob/tsar_iob_cluster/caba/source/src/tsar_iob_cluster.cpp
r802 r959 72 72 size_t l1_d_sets, 73 73 size_t xram_latency, 74 size_t xcu_nb_inputs, 74 size_t xcu_nb_hwi, 75 size_t xcu_nb_pti, 76 size_t xcu_nb_wti, 77 size_t xcu_nb_out, 75 78 76 79 const Loader &loader, … … 178 181 mt_int, // mapping table INT network 179 182 IntTab(cluster_id, int_xicu_tgt_id), // TGTID direct space 180 xcu_nb_ inputs,// number of timer IRQs181 xcu_nb_ inputs,// number of hard IRQs182 xcu_nb_ inputs,// number of soft IRQs183 16);// number of output IRQs183 xcu_nb_pti, // number of timer IRQs 184 xcu_nb_hwi, // number of hard IRQs 185 xcu_nb_wti, // number of soft IRQs 186 xcu_nb_out); // number of output IRQs 184 187 185 188 //////////// MDMA … … 503 506 xicu->p_resetn (this->p_resetn); 504 507 xicu->p_vci (signal_int_vci_tgt_xicu); 505 for ( size_t i=0 ; i < 16; i++)508 for ( size_t i=0 ; i < xcu_nb_out ; i++) 506 509 { 507 510 xicu->p_irq[i] (signal_proc_it[i]); 508 511 } 509 for ( size_t i=0 ; i < xcu_nb_ inputs; i++)512 for ( size_t i=0 ; i < xcu_nb_hwi ; i++) 510 513 { 511 514 if ( i == 0 ) xicu->p_hwi[i] (signal_irq_memc);
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