Index: /trunk/platforms/tsar_generic_iob/arch.py =================================================================== --- /trunk/platforms/tsar_generic_iob/arch.py (revision 958) +++ /trunk/platforms/tsar_generic_iob/arch.py (revision 959) @@ -217,5 +217,5 @@ size = xcu_size, ptype = 'XCU', channels = nb_procs * irq_per_proc, - arg0 = 32, arg1 = 32, arg2 = 32, arg3 = 16 ) + arg0 = 32, arg1 = 32, arg2 = 32 ) mapping.addIrq( xcu, index = 0, isrtype = 'ISR_MMC' ) Index: /trunk/platforms/tsar_generic_iob/top.cpp =================================================================== --- /trunk/platforms/tsar_generic_iob/top.cpp (revision 958) +++ /trunk/platforms/tsar_generic_iob/top.cpp (revision 959) @@ -50,11 +50,11 @@ // Besides the external peripherals, each cluster contains one XICU component, // and one multi channels DMA component. -// The XICU component is mainly used to handle WTI IRQs, as only 5 HWI IRQs -// are connected to XICU in each cluster: -// - IRQ_IN[0] : MMC -// - IRQ_IN[1] : DMA channel 0 -// - IRQ_IN[2] : DMA channel 1 -// - IRQ_IN[3] : DMA channel 2 -// - IRQ_IN[4] : DMA channel 3 +// The XICU component is mainly used to handle WTI IRQs, as only +// 1 + NB_PROCS_MAX HWI IRQs are connected to XICU in each cluster: +// - IRQ_IN[0] : MMC +// - IRQ_IN[1] : DMA channel 0 +// - IRQ_IN[2] : DMA channel 1 +// - ... ... +// - IRQ_IN[NB_PROCS_MAX] : DMA channel NB_PROCS_MAX // // All clusters are identical, but cluster(0,0) and cluster(XMAX-1,YMAX-1) @@ -80,6 +80,6 @@ // - X_SIZE : number of clusters in a row // - Y_SIZE : number of clusters in a column -// - NB_PROCS_MAX : number of processors per cluster (power of 2) -// - NB_DMA_CHANNELS : number of DMA channels per cluster (up to 8) +// - NB_PROCS_MAX : number of processors per cluster (up to 8) +// - NB_DMA_CHANNELS : number of DMA channels per cluster (>= NB_PROCS_MAX) // - NB_TTY_CHANNELS : number of TTY channels in I/O network (up to 16) // - NB_NIC_CHANNELS : number of NIC channels in I/O network (up to 2) @@ -87,5 +87,8 @@ // - FBUF_X_SIZE : width of frame buffer (pixels) // - FBUF_Y_SIZE : heigth of frame buffer (lines) -// - XCU_NB_INPUTS : number of HWIs = number of WTIs = number of PTIs +// - XCU_NB_HWI : number of XCU HWIs (>= NB_PROCS_MAX + 1) +// - XCU_NB_PTI : number of XCU PTIs (>= NB_PROCS_MAX) +// - XCU_NB_WTI : number of XCU WTIs (>= 4*NB_PROCS_MAX) +// - XCU_NB_OUT : number of XCU output IRQs (>= 4*NB_PROCS_MAX) // // Some secondary hardware parameters must be defined in this top.cpp file: @@ -445,8 +448,20 @@ "The YMAX parameter cannot be larger than 16" ); - assert( (NB_PROCS_MAX <= (1 << P_WIDTH)) and - "NB_PROCS_MAX parameter cannot be larger than 2^P_WIDTH" ); - - assert( (NB_DMA_CHANNELS <= 8) and + assert( (NB_PROCS_MAX <= 8) and + "NB_PROCS_MAX parameter cannot be larger than 8" ); + + assert( (XCU_NB_HWI > NB_PROCS_MAX) and + "XCU_NB_HWI must be larger than NB_PROCS_MAX" ); + + assert( (XCU_NB_PTI >= NB_PROCS_MAX) and + "XCU_NB_PTI cannot be smaller than NB_PROCS_MAX" ); + + assert( (XCU_NB_WTI >= 4*NB_PROCS_MAX) and + "XCU_NB_WTI cannot be smaller than 4*NB_PROCS_MAX" ); + + assert( (XCU_NB_OUT >= 4*NB_PROCS_MAX) and + "XCU_NB_OUT cannot be smaller than 4*NB_PROCS_MAX" ); + + assert( (NB_DMA_CHANNELS >= NB_PROCS_MAX) and "The NB_DMA_CHANNELS parameter cannot be larger than 8" ); @@ -1070,5 +1085,8 @@ L1_DSETS, XRAM_LATENCY, - XCU_NB_INPUTS, + XCU_NB_HWI, + XCU_NB_PTI, + XCU_NB_WTI, + XCU_NB_OUT, loader, @@ -1431,8 +1449,8 @@ // Monitor a specific address for one L1 cache - // clusters[0][0]->proc[0]->cache_monitor(0x600800ULL); + // clusters[0][0]->proc[0]->cache_monitor(0x800080ULL); // Monitor a specific address for one L2 cache - // clusters[0][0]->memc->cache_monitor( 0x600800ULL, false ); // full line + // clusters[0][0]->memc->cache_monitor( 0x800080ULL, false ); // full line // Monitor a specific address for one XRAM @@ -1457,13 +1475,16 @@ clusters[x][y]->signal_int_vci_ini_proc[l].print_trace(proc_signame.str()); -// clusters[x][y]->xicu->print_trace(l); -// std::ostringstream xicu_signame; -// xicu_signame << "[SIG]XICU_" << x << "_" << y; -// clusters[x][y]->signal_int_vci_tgt_xicu.print_trace(xicu_signame.str()); + clusters[x][y]->xicu->print_trace(1); + std::ostringstream xicu_signame; + xicu_signame << "[SIG]XICU_" << x << "_" << y; + clusters[x][y]->signal_int_vci_tgt_xicu.print_trace(xicu_signame.str()); clusters[x][y]->mdma->print_trace(); - std::ostringstream mdma_signame; - mdma_signame << "[SIG]MDMA_" << x << "_" << y; - clusters[x][y]->signal_int_vci_tgt_mdma.print_trace(mdma_signame.str()); + std::ostringstream mdma_tgt_signame; + mdma_tgt_signame << "[SIG]MDMA_TGT_" << x << "_" << y; + clusters[x][y]->signal_int_vci_tgt_mdma.print_trace(mdma_tgt_signame.str()); + std::ostringstream mdma_ini_signame; + mdma_ini_signame << "[SIG]MDMA_INI_" << x << "_" << y; + clusters[x][y]->signal_int_vci_ini_mdma.print_trace(mdma_ini_signame.str()); // local interrupts in cluster(x,y) Index: /trunk/platforms/tsar_generic_iob/tsar_iob_cluster/caba/source/include/tsar_iob_cluster.h =================================================================== --- /trunk/platforms/tsar_generic_iob/tsar_iob_cluster/caba/source/include/tsar_iob_cluster.h (revision 958) +++ /trunk/platforms/tsar_generic_iob/tsar_iob_cluster/caba/source/include/tsar_iob_cluster.h (revision 959) @@ -70,5 +70,5 @@ // interrupt signals sc_signal signal_false; - sc_signal signal_proc_it[16]; + sc_signal signal_proc_it[32]; sc_signal signal_irq_mdma[8]; sc_signal signal_irq_memc; @@ -198,8 +198,8 @@ const soclib::common::MappingTable &mt_iox, - size_t x_width, // x field bits - size_t y_width, // y field bits - size_t l_width, // l field bits - size_t p_width, // p field bits + size_t x_width, // x field bits + size_t y_width, // y field bits + size_t l_width, // l field bits + size_t p_width, // p field bits size_t int_memc_tgt_id, @@ -226,7 +226,10 @@ size_t l1_d_sets, size_t xram_latency, - size_t xcu_nb_inputs, - - const Loader &loader, // loader for XRAM + size_t xcu_nb_hwi, + size_t xcu_nb_pti, + size_t xcu_nb_wti, + size_t xcu_nb_irq, + + const Loader &loader, // loader for XRAM uint32_t frozen_cycles, Index: /trunk/platforms/tsar_generic_iob/tsar_iob_cluster/caba/source/src/tsar_iob_cluster.cpp =================================================================== --- /trunk/platforms/tsar_generic_iob/tsar_iob_cluster/caba/source/src/tsar_iob_cluster.cpp (revision 958) +++ /trunk/platforms/tsar_generic_iob/tsar_iob_cluster/caba/source/src/tsar_iob_cluster.cpp (revision 959) @@ -72,5 +72,8 @@ size_t l1_d_sets, size_t xram_latency, - size_t xcu_nb_inputs, + size_t xcu_nb_hwi, + size_t xcu_nb_pti, + size_t xcu_nb_wti, + size_t xcu_nb_out, const Loader &loader, @@ -178,8 +181,8 @@ mt_int, // mapping table INT network IntTab(cluster_id, int_xicu_tgt_id), // TGTID direct space - xcu_nb_inputs, // number of timer IRQs - xcu_nb_inputs, // number of hard IRQs - xcu_nb_inputs, // number of soft IRQs - 16); // number of output IRQs + xcu_nb_pti, // number of timer IRQs + xcu_nb_hwi, // number of hard IRQs + xcu_nb_wti, // number of soft IRQs + xcu_nb_out); // number of output IRQs //////////// MDMA @@ -503,9 +506,9 @@ xicu->p_resetn (this->p_resetn); xicu->p_vci (signal_int_vci_tgt_xicu); - for ( size_t i=0 ; i < 16 ; i++) + for ( size_t i=0 ; i < xcu_nb_out ; i++) { xicu->p_irq[i] (signal_proc_it[i]); } - for ( size_t i=0 ; i < xcu_nb_inputs ; i++) + for ( size_t i=0 ; i < xcu_nb_hwi ; i++) { if ( i == 0 ) xicu->p_hwi[i] (signal_irq_memc);