Index: /trunk/softs/tsar_boot/drivers/reset_bdv.c
===================================================================
--- /trunk/softs/tsar_boot/drivers/reset_bdv.c	(revision 967)
+++ /trunk/softs/tsar_boot/drivers/reset_bdv.c	(revision 968)
@@ -50,10 +50,8 @@
 
 ////////////////////////////////////
-int reset_bdv_read( unsigned int lba, 
-                    void* buffer, 
-                    unsigned int count )
+int reset_bdv_read( unsigned int lba, void* buffer, unsigned int count )
 {
     // block_device configuration
-    iowrite32( &ioc_address[BLOCK_DEVICE_BUFFER], (unsigned int) buffer );
+    iowrite32( &ioc_address[BLOCK_DEVICE_BUFFER], (unsigned int)buffer );
     iowrite32( &ioc_address[BLOCK_DEVICE_COUNT], count );
     iowrite32( &ioc_address[BLOCK_DEVICE_LBA], lba );
@@ -61,6 +59,6 @@
 
     //  trigger transfer
-    iowrite32( &ioc_address[BLOCK_DEVICE_OP], ( unsigned int )
-               BLOCK_DEVICE_READ );
+    iowrite32( &ioc_address[BLOCK_DEVICE_OP],
+               (unsigned int)BLOCK_DEVICE_READ );
 
 #if (RESET_HARD_CC == 0) || USE_IOB
@@ -82,5 +80,5 @@
             break;
         }
-        if ( status == BLOCK_DEVICE_READ_ERROR   ) 
+        if ( status == BLOCK_DEVICE_READ_ERROR )
         {
             reset_puts("ERROR during read on the BLK device\n");
Index: /trunk/softs/tsar_boot/drivers/reset_hba.c
===================================================================
--- /trunk/softs/tsar_boot/drivers/reset_hba.c	(revision 967)
+++ /trunk/softs/tsar_boot/drivers/reset_hba.c	(revision 968)
@@ -9,4 +9,5 @@
 #include <reset_tty.h>
 #include <reset_inval.h>
+#include <reset_utils.h>
 #include <io.h>
 #include <defs.h>
@@ -17,8 +18,8 @@
 
 // command descriptor (one single command)
-static hba_cmd_desc_t  hba_cmd_desc  __attribute__((aligned(64)));
+static hba_cmd_desc_t hba_cmd_desc __cache_aligned__;
 
 // command table (one single command)
-static hba_cmd_table_t  hba_cmd_table __attribute__((aligned(64)));
+static hba_cmd_table_t hba_cmd_table __cache_aligned__;
 
 // IOC/HBA device base address
@@ -35,7 +36,7 @@
 // return 0 if success, -1 if error
 ///////////////////////////////////////////////////////////////////////////////
-int reset_hba_read( unsigned int lba,  
+int reset_hba_read( unsigned int lba,
                     void*        buffer,
-                    unsigned int count )   
+                    unsigned int count )
 {
     unsigned int       pxci;           // HBA_PXCI register value
@@ -46,7 +47,7 @@
     {
         reset_puts("\n[RESET ERROR] in reset_hba_read() ");
-        reset_puts("buffer not aligned on 64 bytes: base = "); 
+        reset_puts("buffer not aligned on 64 bytes: base = ");
         reset_putx( (unsigned int)buffer );
-        reset_puts("\n"); 
+        reset_puts("\n");
         return -1;
     }
@@ -69,5 +70,5 @@
     hba_cmd_desc.prdtl[1] = 0;
     hba_cmd_desc.flag[0]  = 0;  // read
-   
+
 #if USE_IOB
     // update external memory for command table
@@ -96,6 +97,6 @@
         pxci = ioread32( &ioc_address[HBA_PXCI] );
     }
-    while( pxci ); 
-             
+    while( pxci );
+
     // get PXIS register
     pxis = ioread32( &ioc_address[HBA_PXIS] );
@@ -107,6 +108,6 @@
     iowrite32( &ioc_address[HBA_PXCI] , 0 );
 
-    // check error status 
-    if ( pxis & 0x40000000 ) 
+    // check error status
+    if ( pxis & 0x40000000 )
     {
         reset_puts("[RESET ERROR] in reset_hba_read() : "
@@ -120,5 +121,5 @@
 
 ///////////////////////////////////////////////////////////////////////////////
-// This function initialises both the HBA registers and the 
+// This function initialises both the HBA registers and the
 // memory structures used by the AHCI peripheral (one single command).
 ///////////////////////////////////////////////////////////////////////////////
@@ -126,22 +127,21 @@
 {
     // initialise the command descriptor
-    hba_cmd_desc.ctba  = (unsigned int)&hba_cmd_table;
+    hba_cmd_desc.ctba = (unsigned int)&hba_cmd_table;
     hba_cmd_desc.ctbau = 0;
 
 #if USE_IOB
     // update external memory for the commande descriptor
-    reset_L2_sync( &hba_cmd_desc , sizeof( hba_cmd_desc_t ) );
+    reset_L2_sync(&hba_cmd_desc , sizeof( hba_cmd_desc_t ) );
 #endif
-    // initialise HBA registers 
-    iowrite32( &ioc_address[HBA_PXCLB]  , (unsigned int)&hba_cmd_desc );
-    iowrite32( &ioc_address[HBA_PXCLBU] , 0 );
-    iowrite32( &ioc_address[HBA_PXIE]   , 0 );
-    iowrite32( &ioc_address[HBA_PXIS]   , 0 );
-    iowrite32( &ioc_address[HBA_PXCI]   , 0 );
-    iowrite32( &ioc_address[HBA_PXCMD]  , 1 );
+    // initialise HBA registers
+    iowrite32(&ioc_address[HBA_PXCLB], (unsigned int)&hba_cmd_desc );
+    iowrite32(&ioc_address[HBA_PXCLBU], 0 );
+    iowrite32(&ioc_address[HBA_PXIE], 0 );
+    iowrite32(&ioc_address[HBA_PXIS], 0 );
+    iowrite32(&ioc_address[HBA_PXCI], 0 );
+    iowrite32(&ioc_address[HBA_PXCMD], 1 );
 
     return 0;
 }
-
 
 // Local Variables:
Index: /trunk/softs/tsar_boot/include/reset_utils.h
===================================================================
--- /trunk/softs/tsar_boot/include/reset_utils.h	(revision 967)
+++ /trunk/softs/tsar_boot/include/reset_utils.h	(revision 968)
@@ -16,4 +16,6 @@
  ********************************************************************/
 
+#define __cache_aligned__ __attribute__((aligned(CACHE_LINE_SIZE)))
+
 /*
  * cache line aligned disk block (sector) buffer
@@ -22,5 +24,5 @@
 {
     char b[BLOCK_SIZE];
-} __attribute__((aligned(CACHE_LINE_SIZE)));
+} __cache_aligned__;
 
 /********************************************************************
