Ignore:
Timestamp:
Apr 19, 2015, 5:19:34 PM (9 years ago)
Author:
cfuguet
Message:

bugfixes on vci_io_bridge:

Several bugfixes concerning the use of the IOMMU.

  • The control registers for the TLB prefetch buffer were either not set or set erroneously.
  • Add a new set/reset register between the WTI_RSP and the TLB FSMs. This register is used by the WTI_RSP to signal the completion of a MISS TLB transaction.
  • The MISS_WTI_CMD can issue transactions concerning a single word or an entire cache line. The first are used for WTI requests from external peripherals and the second are used for TLB MISS transactions.
  • Several programming errors concerning type casts. Some 64 bits variable were incorrectly cast and therefore, there was some information lost.
File:
1 edited

Legend:

Unmodified
Added
Removed
  • trunk/modules/vci_io_bridge/caba/source/include/vci_io_bridge.h

    r715 r984  
    2424 *
    2525 * SOCLIB_LGPL_HEADER_END
     26 *
     27 * Maintainers: Cesar Fuguet Tortolero <cesar.fuguet-tortolero@lip6.fr>
    2628 */
    2729/////////////////////////////////////////////////////////////////////////////////
     
    120122    enum
    121123    {
    122         CACHE_LINE_MASK    = 0xFFFFFFFFC0LL,
     124        CACHE_LINE_MASK    = 0xFFFFFFFFC0ULL,
    123125        PPN1_MASK          = 0x0007FFFF,
    124126        PPN2_MASK          = 0x0FFFFFFF,
     
    365367    sc_signal<vci_pktid_t>      r_miss_wti_rsp_to_dma_rsp_rpktid;
    366368
     369    sc_signal<bool>             r_miss_wti_rsp_to_tlb_done;
    367370
    368371    /////////////////////////////////////////////////////
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