Index: trunk/softs/tsar_boot/Makefile =================================================================== --- trunk/softs/tsar_boot/Makefile (revision 987) +++ trunk/softs/tsar_boot/Makefile (revision 992) @@ -2,8 +2,8 @@ -include ./build.mk -USE_DT ?= 1 -DTS ?= platform.dts - -MAKECMDGOALS ?= none +USE_DT ?= 0 +DTS ?= platform.dts +HARD_CONFIG_PATH ?= ../../../giet_vm +MAKECMDGOALS ?= none ifneq ($(MAKECMDGOALS),$(filter $(MAKECMDGOALS),clean distclean clean-doc doc)) @@ -78,9 +78,9 @@ DRV_SRCS := reset_tty.c \ reset_inval.c \ - reset_sdc.c \ - reset_bdv.c \ - reset_rdk.c \ - reset_hba.c \ - sdcard.c \ + reset_ioc_spi.c \ + reset_ioc_bdv.c \ + reset_ioc_rdk.c \ + reset_ioc_hba.c \ + reset_ioc_sdc.c \ spi.c Index: trunk/softs/tsar_boot/drivers/reset_bdv.c =================================================================== --- trunk/softs/tsar_boot/drivers/reset_bdv.c (revision 987) +++ (revision ) @@ -1,94 +1,0 @@ -/** - * \file reset_bdv.c - * \date December 14, 2014 - * \author Cesar Fuguet - */ -#include -#include -#include -#include -#include - -#ifndef SEG_IOC_BASE -# error "SEG_IOC_BASE constant must be defined in the hard_config.h file" -#endif - -static int* const ioc_address = (int* const)SEG_IOC_BASE; - -enum block_device_registers { - BLOCK_DEVICE_BUFFER, - BLOCK_DEVICE_LBA, - BLOCK_DEVICE_COUNT, - BLOCK_DEVICE_OP, - BLOCK_DEVICE_STATUS, - BLOCK_DEVICE_IRQ_ENABLE, - BLOCK_DEVICE_SIZE, - BLOCK_DEVICE_BLOCK_SIZE, -}; - -enum block_device_operations { - BLOCK_DEVICE_NOOP, - BLOCK_DEVICE_READ, - BLOCK_DEVICE_WRITE, -}; - -enum block_device_status { - BLOCK_DEVICE_IDLE, - BLOCK_DEVICE_BUSY, - BLOCK_DEVICE_READ_SUCCESS, - BLOCK_DEVICE_WRITE_SUCCESS, - BLOCK_DEVICE_READ_ERROR, - BLOCK_DEVICE_WRITE_ERROR, - BLOCK_DEVICE_ERROR, -}; - -//////////////////// -int reset_bdv_init() -{ - return 0; -} - -//////////////////////////////////// -int reset_bdv_read( unsigned int lba, void* buffer, unsigned int count ) -{ - // block_device configuration - iowrite32( &ioc_address[BLOCK_DEVICE_BUFFER], (unsigned int)buffer ); - iowrite32( &ioc_address[BLOCK_DEVICE_COUNT], count ); - iowrite32( &ioc_address[BLOCK_DEVICE_LBA], lba ); - iowrite32( &ioc_address[BLOCK_DEVICE_IRQ_ENABLE], 0 ); - - // trigger transfer - iowrite32( &ioc_address[BLOCK_DEVICE_OP], - (unsigned int)BLOCK_DEVICE_READ ); - -#if (RESET_HARD_CC == 0) || USE_IOB - // inval buffer in L1 cache - reset_L1_inval( buffer , count * 512 ); -#endif - -#if USE_IOB - // inval buffer in L2 cache - reset_L2_inval( buffer , count * 512 ); -#endif - - unsigned int status = 0; - while ( 1 ) - { - status = ioread32(&ioc_address[BLOCK_DEVICE_STATUS]); - if ( status == BLOCK_DEVICE_READ_SUCCESS ) - { - break; - } - if ( status == BLOCK_DEVICE_READ_ERROR ) - { - reset_puts("ERROR during read on the BLK device\n"); - return 1; - } - } - - return 0; -} - -/* - * vim: tabstop=4 : softtabstop=4 : shiftwidth=4 : expandtab - */ Index: trunk/softs/tsar_boot/drivers/reset_bdv.h =================================================================== --- trunk/softs/tsar_boot/drivers/reset_bdv.h (revision 987) +++ (revision ) @@ -1,17 +1,0 @@ -/** - * \file reset_bdv.h - * \date December 14, 2014 - * \author Cesar Fuguet - */ -#ifndef RESET_BDV_H -#define RESET_BDV_H - -int reset_bdv_init(); - -int reset_bdv_read( unsigned int lba, void* buffer, unsigned int count ); - -#endif - -/* - * vim: tabstop=4 : softtabstop=4 : shiftwidth=4 : expandtab - */ Index: trunk/softs/tsar_boot/drivers/reset_hba.c =================================================================== --- trunk/softs/tsar_boot/drivers/reset_hba.c (revision 987) +++ (revision ) @@ -1,154 +1,0 @@ -/** - * \File : reset_hba.c - * \Date : 23/11/2013 - * \Author : alain greiner - * \Copyright (c) UPMC-LIP6 - */ - -#include -#include -#include -#include -#include -#include - -/////////////////////////////////////////////////////////////////////////////// -// Global variables -/////////////////////////////////////////////////////////////////////////////// - -// command descriptor (one single command) -static hba_cmd_desc_t hba_cmd_desc __cache_aligned__; - -// command table (one single command) -static hba_cmd_table_t hba_cmd_table __cache_aligned__; - -// IOC/HBA device base address -static int* const ioc_address = (int* const)SEG_IOC_BASE; - -/////////////////////////////////////////////////////////////////////////////// -// Extern functions -/////////////////////////////////////////////////////////////////////////////// - -/////////////////////////////////////////////////////////////////////////////// -// This function register one command in both the command descriptor -// and the command data, and updates the HBA_PXCI register. -// The all addresses are supposed to be identity mapping (vaddr == paddr). -// return 0 if success, -1 if error -/////////////////////////////////////////////////////////////////////////////// -int reset_hba_read( unsigned int lba, - void* buffer, - unsigned int count ) -{ - unsigned int pxci; // HBA_PXCI register value - unsigned int pxis; // HBA_PXIS register value - - // check buffer alignment - if( (unsigned int)buffer & 0x3F ) - { - reset_puts("\n[RESET ERROR] in reset_hba_read() "); - reset_puts("buffer not aligned on 64 bytes: base = "); - reset_putx( (unsigned int)buffer ); - reset_puts("\n"); - return -1; - } - - // set command data header: lba value - hba_cmd_table.header.lba0 = (char)lba; - hba_cmd_table.header.lba1 = (char)(lba>>8); - hba_cmd_table.header.lba2 = (char)(lba>>16); - hba_cmd_table.header.lba3 = (char)(lba>>24); - hba_cmd_table.header.lba4 = 0; - hba_cmd_table.header.lba5 = 0; - - // set command data buffer: address and size) - hba_cmd_table.buffer.dba = (unsigned int)(buffer); - hba_cmd_table.buffer.dbau = 0; - hba_cmd_table.buffer.dbc = count*512; - - // set command descriptor: one single buffer / read access - hba_cmd_desc.prdtl[0] = 1; - hba_cmd_desc.prdtl[1] = 0; - hba_cmd_desc.flag[0] = 0; // read - -#if USE_IOB - // update external memory for command table - reset_L2_sync( &hba_cmd_table , 32 ); - - // update external memory for command descriptor - reset_L2_sync( &hba_cmd_desc , 16 ); -#endif - - // start transfer - iowrite32( &ioc_address[HBA_PXCI] , 1 ); - -#if (RESET_HARD_CC == 0) || USE_IOB - // inval buffer in L1 cache - reset_L1_inval( buffer , count * 512 ); -#endif - -#if USE_IOB - // inval buffer in L2 cache - reset_L2_inval( buffer , count * 512 ); -#endif - - // poll PXCI until command completed by HBA - do - { - pxci = ioread32( &ioc_address[HBA_PXCI] ); - } - while( pxci ); - - // get PXIS register - pxis = ioread32( &ioc_address[HBA_PXIS] ); - - // reset PXIS register - iowrite32( &ioc_address[HBA_PXIS] , 0 ); - - // reset PXCI register : we use only command slot[0] in PXCI - iowrite32( &ioc_address[HBA_PXCI] , 0 ); - - // check error status - if ( pxis & 0x40000000 ) - { - reset_puts("[RESET ERROR] in reset_hba_read() : " - " status error returned by HBA\n"); - return 1; - } - - return 0; -} // end reset_hba_read() - - -/////////////////////////////////////////////////////////////////////////////// -// This function initialises both the HBA registers and the -// memory structures used by the AHCI peripheral (one single command). -/////////////////////////////////////////////////////////////////////////////// -int reset_hba_init() -{ - // initialise the command descriptor - hba_cmd_desc.ctba = (unsigned int)&hba_cmd_table; - hba_cmd_desc.ctbau = 0; - -#if USE_IOB - // update external memory for the commande descriptor - reset_L2_sync(&hba_cmd_desc , sizeof( hba_cmd_desc_t ) ); -#endif - // initialise HBA registers - iowrite32(&ioc_address[HBA_PXCLB], (unsigned int)&hba_cmd_desc ); - iowrite32(&ioc_address[HBA_PXCLBU], 0 ); - iowrite32(&ioc_address[HBA_PXIE], 0 ); - iowrite32(&ioc_address[HBA_PXIS], 0 ); - iowrite32(&ioc_address[HBA_PXCI], 0 ); - iowrite32(&ioc_address[HBA_PXCMD], 1 ); - - return 0; -} - -// Local Variables: -// tab-width: 4 -// c-basic-offset: 4 -// c-file-offsets:((innamespace . 0)(inline-open . 0)) -// indent-tabs-mode: nil -// End: -// vim: filetype=c:expandtab:shiftwidth=4:tabstop=4:softtabstop=4 - Index: trunk/softs/tsar_boot/drivers/reset_hba.h =================================================================== --- trunk/softs/tsar_boot/drivers/reset_hba.h (revision 987) +++ (revision ) @@ -1,106 +1,0 @@ -/** - * \File : reset_hba.h - * \Date : 01/04/2015 - * \Author : alain greiner - * \Copyright (c) UPMC-LIP6 - */ - -#ifndef _RESET_HBA_H -#define _RESET_HBA_H - -/////////////////////////////////////////////////////////////////////////////////// -// HBA component registers offsets -/////////////////////////////////////////////////////////////////////////////////// - -enum SoclibMultiAhciRegisters -{ - HBA_PXCLB = 0, // command list base address 32 LSB bits - HBA_PXCLBU = 1, // command list base address 32 MSB bits - HBA_PXIS = 4, // interrupt status - HBA_PXIE = 5, // interrupt enable - HBA_PXCMD = 6, // run - HBA_PXCI = 14, // command bit-vector - HBA_SPAN = 0x400, // 4 Kbytes per channel => 1024 slots -}; - -/////////////////////////////////////////////////////////////////////////////////// -// structures for one AHCI command table -/////////////////////////////////////////////////////////////////////////////////// - -typedef struct hba_cmd_header_s // size = 16 bytes -{ - // WORD 0 - unsigned int res0; // reserved - - // WORD 1 - unsigned char lba0; // LBA 7:0 - unsigned char lba1; // LBA 15:8 - unsigned char lba2; // LBA 23:16 - unsigned char res1; // reserved - - // WORD 2 - unsigned char lba3; // LBA 31:24 - unsigned char lba4; // LBA 39:32 - unsigned char lba5; // LBA 47:40 - unsigned char res2; // reserved - - // WORD 3 to 31 - unsigned int res3; // reserved - -} hba_cmd_header_t; - -typedef struct hba_cmd_buffer_s // size = 16 bytes -{ - unsigned int dba; // Buffer base address 32 LSB bits - unsigned int dbau; // Buffer base address 32 MSB bits - unsigned int res0; // reserved - unsigned int dbc; // Buffer byte count - -} hba_cmd_buffer_t; - -typedef struct hba_cmd_table_s // one command = header + one buffer -{ - - hba_cmd_header_t header; // contains lba value - hba_cmd_buffer_t buffer; // contains buffer address & size - -} hba_cmd_table_t; - -/////////////////////////////////////////////////////////////////////////////////// -// structure for one AHCI command descriptor -/////////////////////////////////////////////////////////////////////////////////// - -typedef struct hba_cmd_desc_s // size = 16 bytes -{ - // WORD 0 - unsigned char flag[2]; // W in bit 6 of flag[0] - unsigned char prdtl[2]; // Number of buffers - - // WORD 1 - unsigned int prdbc; // Number of bytes actually transfered - - // WORD 2, WORD 3 - unsigned int ctba; // Command data base address 32 LSB bits - unsigned int ctbau; // Command data base address 32 MSB bits - -} hba_cmd_desc_t; - -/////////////////////////////////////////////////////////////////////////////////// -// access functions -/////////////////////////////////////////////////////////////////////////////////// - -int reset_hba_init (); - -int reset_hba_read( unsigned int lba, - void* buffer, - unsigned int count ); -#endif - -// Local Variables: -// tab-width: 4 -// c-basic-offset: 4 -// c-file-offsets:((innamespace . 0)(inline-open . 0)) -// indent-tabs-mode: nil -// End: -// vim: filetype=c:expandtab:shiftwidth=4:tabstop=4:softtabstop=4 - Index: trunk/softs/tsar_boot/drivers/reset_ioc_bdv.c =================================================================== --- trunk/softs/tsar_boot/drivers/reset_ioc_bdv.c (revision 992) +++ trunk/softs/tsar_boot/drivers/reset_ioc_bdv.c (revision 992) @@ -0,0 +1,97 @@ +/** + * \file reset_ioc_bdv.c + * \date December 14, 2014 + * \author Cesar Fuguet + */ + +#include +#include +#include +#include +#include + +#ifndef SEG_IOC_BASE +# error "SEG_IOC_BASE constant must be defined in the hard_config.h file" +#endif + +static int* const ioc_address = (int* const)SEG_IOC_BASE; + +enum block_device_registers { + BLOCK_DEVICE_BUFFER, + BLOCK_DEVICE_LBA, + BLOCK_DEVICE_COUNT, + BLOCK_DEVICE_OP, + BLOCK_DEVICE_STATUS, + BLOCK_DEVICE_IRQ_ENABLE, + BLOCK_DEVICE_SIZE, + BLOCK_DEVICE_BLOCK_SIZE, +}; + +enum block_device_operations { + BLOCK_DEVICE_NOOP, + BLOCK_DEVICE_READ, + BLOCK_DEVICE_WRITE, +}; + +enum block_device_status { + BLOCK_DEVICE_IDLE, + BLOCK_DEVICE_BUSY, + BLOCK_DEVICE_READ_SUCCESS, + BLOCK_DEVICE_WRITE_SUCCESS, + BLOCK_DEVICE_READ_ERROR, + BLOCK_DEVICE_WRITE_ERROR, + BLOCK_DEVICE_ERROR, +}; + +//////////////////// +int reset_bdv_init() +{ + return 0; +} + +//////////////////////////////////// +int reset_bdv_read( unsigned int lba, + void* buffer, + unsigned int count ) +{ + // block_device configuration + iowrite32( &ioc_address[BLOCK_DEVICE_BUFFER], (unsigned int) buffer ); + iowrite32( &ioc_address[BLOCK_DEVICE_COUNT], count ); + iowrite32( &ioc_address[BLOCK_DEVICE_LBA], lba ); + iowrite32( &ioc_address[BLOCK_DEVICE_IRQ_ENABLE], 0 ); + + // trigger transfer + iowrite32( &ioc_address[BLOCK_DEVICE_OP], ( unsigned int ) + BLOCK_DEVICE_READ ); + +#if (RESET_HARD_CC == 0) || USE_IOB + // inval buffer in L1 cache + reset_L1_inval( buffer , count * 512 ); +#endif + +#if USE_IOB + // inval buffer in L2 cache + reset_L2_inval( buffer , count * 512 ); +#endif + + unsigned int status = 0; + while ( 1 ) + { + status = ioread32(&ioc_address[BLOCK_DEVICE_STATUS]); + if ( status == BLOCK_DEVICE_READ_SUCCESS ) + { + break; + } + if ( status == BLOCK_DEVICE_READ_ERROR ) + { + reset_puts("ERROR during read on the BLK device\n"); + return 1; + } + } + + return 0; +} + +/* + * vim: tabstop=4 : softtabstop=4 : shiftwidth=4 : expandtab + */ Index: trunk/softs/tsar_boot/drivers/reset_ioc_bdv.h =================================================================== --- trunk/softs/tsar_boot/drivers/reset_ioc_bdv.h (revision 992) +++ trunk/softs/tsar_boot/drivers/reset_ioc_bdv.h (revision 992) @@ -0,0 +1,18 @@ +/** + * \file reset_ioc_bdv.h + * \date December 14, 2014 + * \author Cesar Fuguet + */ + +#ifndef RESET_IOC_BDV_H +#define RESET_IOC_BDV_H + +int reset_bdv_init(); + +int reset_bdv_read( unsigned int lba, void* buffer, unsigned int count ); + +#endif + +/* + * vim: tabstop=4 : softtabstop=4 : shiftwidth=4 : expandtab + */ Index: trunk/softs/tsar_boot/drivers/reset_ioc_hba.c =================================================================== --- trunk/softs/tsar_boot/drivers/reset_ioc_hba.c (revision 992) +++ trunk/softs/tsar_boot/drivers/reset_ioc_hba.c (revision 992) @@ -0,0 +1,185 @@ +/** + * \File : reset_ioc_hba.c + * \Date : 23/11/2013 + * \Author : alain greiner + * \Copyright (c) UPMC-LIP6 + */ + +#include +#include +#include +#include +#include + +#define HBA_POLLING_TIMEOUT 1000000 + +/////////////////////////////////////////////////////////////////////////////// +// Global variables +/////////////////////////////////////////////////////////////////////////////// + +// command descriptor (one single command) +static hba_cmd_desc_t hba_cmd_desc __attribute__((aligned(64))); + +// command table (one single command) +static hba_cmd_table_t hba_cmd_table __attribute__((aligned(64))); + +// IOC/HBA device base address +static int* const ioc_address = (int* const)SEG_IOC_BASE; + +/////////////////////////////////////////////////////////////////////////////// +// Extern functions +/////////////////////////////////////////////////////////////////////////////// + +/////////////////////////////////////////////////////////////////////////////// +// This function register one command in both the command descriptor +// and the command data, and updates the HBA_PXCI register. +// The addresses are supposed to be identity mapping (vaddr == paddr). +// return 0 if success, -1 if error +/////////////////////////////////////////////////////////////////////////////// +int reset_hba_read( unsigned int lba, + void* buffer, + unsigned int count ) +{ + unsigned int pxci; // HBA_PXCI register value + unsigned int pxis; // HBA_PXIS register value + +#if RESET_DEBUG +reset_puts("\n[DEBUG HBA] reset_hba_read() : buffer = "); +reset_putx( (unsigned int)buffer ); +reset_puts(" / nblocks = "); +reset_putd( count ); +reset_puts(" / lba = "); +reset_putd( lba ); +reset_puts("\n"); +#endif + + // check buffer alignment + if( (unsigned int)buffer & 0x3F ) + { + reset_puts("\n[RESET ERROR] in reset_hba_read() "); + reset_puts("buffer not aligned on 64 bytes: base = "); + reset_putx( (unsigned int)buffer ); + reset_puts("\n"); + return -1; + } + + // set command data header: lba value + hba_cmd_table.header.lba0 = (char)lba; + hba_cmd_table.header.lba1 = (char)(lba>>8); + hba_cmd_table.header.lba2 = (char)(lba>>16); + hba_cmd_table.header.lba3 = (char)(lba>>24); + hba_cmd_table.header.lba4 = 0; + hba_cmd_table.header.lba5 = 0; + + // set command data buffer: address and size) + hba_cmd_table.buffer.dba = (unsigned int)(buffer); + hba_cmd_table.buffer.dbau = 0; + hba_cmd_table.buffer.dbc = count*512; + + // set command descriptor: one single buffer / read access + hba_cmd_desc.prdtl[0] = 1; + hba_cmd_desc.prdtl[1] = 0; + hba_cmd_desc.flag[0] = 0; // read + +#if RESET_DEBUG +reset_puts("\n[DEBUG HBA] reset_hba_read() : command registered\n"); +#endif + +#if USE_IOB + // update external memory for command table + reset_L2_sync( &hba_cmd_table , 32 ); + + // update external memory for command descriptor + reset_L2_sync( &hba_cmd_desc , 16 ); +#endif + + // start transfer + iowrite32( &ioc_address[HBA_PXCI] , 1 ); + +#if RESET_DEBUG +reset_puts("\n[DEBUG HBA] reset_hba_read() : MULTI_AHCI controler activated\n"); +#endif + +#if (RESET_HARD_CC == 0) || USE_IOB + // inval buffer in L1 cache + reset_L1_inval( buffer , count * 512 ); +#endif + +#if USE_IOB + // inval buffer in L2 cache + reset_L2_inval( buffer , count * 512 ); +#endif + + // poll PXCI until command completed by HBA + unsigned int iter = HBA_POLLING_TIMEOUT; + do + { + pxci = ioread32( &ioc_address[HBA_PXCI] ); + iter--; + if (iter == 0 ) + { + reset_puts("\n[SDC ERROR] in reset_sdc_read() : polling timeout\n"); + return 1; + } + } + while( pxci ); + + // get PXIS register + pxis = ioread32( &ioc_address[HBA_PXIS] ); + + // reset PXIS register + iowrite32( &ioc_address[HBA_PXIS] , 0 ); + + // reset PXCI register : we use only command slot[0] in PXCI + iowrite32( &ioc_address[HBA_PXCI] , 0 ); + + // check error status + if ( pxis & 0x40000000 ) + { + reset_puts("[RESET ERROR] in reset_hba_read() : " + " status error returned by HBA\n"); + return 1; + } + + return 0; +} // end reset_hba_read() + + +/////////////////////////////////////////////////////////////////////////////// +// This function initialises both the HBA registers and the +// memory structures used by the AHCI peripheral (one single command). +/////////////////////////////////////////////////////////////////////////////// +int reset_hba_init() +{ + // initialise the command descriptor + hba_cmd_desc.ctba = (unsigned int)&hba_cmd_table; + hba_cmd_desc.ctbau = 0; + +#if USE_IOB + // update external memory for the commande descriptor + reset_L2_sync( &hba_cmd_desc , sizeof( hba_cmd_desc_t ) ); +#endif + // initialise HBA registers + iowrite32( &ioc_address[HBA_PXCLB] , (unsigned int)&hba_cmd_desc ); + iowrite32( &ioc_address[HBA_PXCLBU] , 0 ); + iowrite32( &ioc_address[HBA_PXIE] , 0 ); + iowrite32( &ioc_address[HBA_PXIS] , 0 ); + iowrite32( &ioc_address[HBA_PXCI] , 0 ); + iowrite32( &ioc_address[HBA_PXCMD] , 1 ); + +#if RESET_DEBUG +reset_puts("\n[DEBUG HBA] reset_hba_init() : AHCI init done\n"); +#endif + + return 0; +} + + +// Local Variables: +// tab-width: 4 +// c-basic-offset: 4 +// c-file-offsets:((innamespace . 0)(inline-open . 0)) +// indent-tabs-mode: nil +// End: +// vim: filetype=c:expandtab:shiftwidth=4:tabstop=4:softtabstop=4 + Index: trunk/softs/tsar_boot/drivers/reset_ioc_hba.h =================================================================== --- trunk/softs/tsar_boot/drivers/reset_ioc_hba.h (revision 992) +++ trunk/softs/tsar_boot/drivers/reset_ioc_hba.h (revision 992) @@ -0,0 +1,94 @@ +/** + * \File : reset_hba.h + * \Date : 01/04/2015 + * \Author : alain greiner + * \Copyright (c) UPMC-LIP6 + */ + +#ifndef _RESET_IOC_HBA_H +#define _RESET_IOC_HBA_H + +/////////////////////////////////////////////////////////////////////////////////// +// HBA component registers offsets +/////////////////////////////////////////////////////////////////////////////////// + +enum SoclibMultiAhciRegisters +{ + HBA_PXCLB = 0, // command list base address 32 LSB bits + HBA_PXCLBU = 1, // command list base address 32 MSB bits + HBA_PXIS = 4, // interrupt status + HBA_PXIE = 5, // interrupt enable + HBA_PXCMD = 6, // run + HBA_PXCI = 14, // command bit-vector + HBA_SPAN = 0x400, // 4 Kbytes per channel => 1024 slots +}; + +/////////////////////////////////////////////////////////////////////////////////// +// structures for one AHCI command table +/////////////////////////////////////////////////////////////////////////////////// + +typedef struct hba_cmd_header_s // size = 16 bytes +{ + unsigned int res0; // reserved + unsigned char lba0; // LBA 7:0 + unsigned char lba1; // LBA 15:8 + unsigned char lba2; // LBA 23:16 + unsigned char res1; // reserved + unsigned char lba3; // LBA 31:24 + unsigned char lba4; // LBA 39:32 + unsigned char lba5; // LBA 47:40 + unsigned char res2; // reserved + unsigned int res3; // reserved + +} hba_cmd_header_t; + +typedef struct hba_cmd_buffer_s // size = 16 bytes +{ + unsigned int dba; // Buffer base address 32 LSB bits + unsigned int dbau; // Buffer base address 32 MSB bits + unsigned int res0; // reserved + unsigned int dbc; // Buffer byte count + +} hba_cmd_buffer_t; + +typedef struct hba_cmd_table_s // one command = header + one buffer +{ + + hba_cmd_header_t header; // contains lba value + hba_cmd_buffer_t buffer; // contains buffer address & size + +} hba_cmd_table_t; + +/////////////////////////////////////////////////////////////////////////////////// +// structure for one AHCI command descriptor +/////////////////////////////////////////////////////////////////////////////////// + +typedef struct hba_cmd_desc_s // size = 16 bytes +{ + unsigned char flag[2]; // W in bit 6 of flag[0] + unsigned char prdtl[2]; // Number of buffers + unsigned int prdbc; // Number of bytes actually transfered + unsigned int ctba; // Command data base address 32 LSB bits + unsigned int ctbau; // Command data base address 32 MSB bits + +} hba_cmd_desc_t; + +/////////////////////////////////////////////////////////////////////////////////// +// access functions +/////////////////////////////////////////////////////////////////////////////////// + +int reset_hba_init (); + +int reset_hba_read( unsigned int lba, + void* buffer, + unsigned int count ); +#endif + +// Local Variables: +// tab-width: 4 +// c-basic-offset: 4 +// c-file-offsets:((innamespace . 0)(inline-open . 0)) +// indent-tabs-mode: nil +// End: +// vim: filetype=c:expandtab:shiftwidth=4:tabstop=4:softtabstop=4 + Index: trunk/softs/tsar_boot/drivers/reset_ioc_rdk.c =================================================================== --- trunk/softs/tsar_boot/drivers/reset_ioc_rdk.c (revision 992) +++ trunk/softs/tsar_boot/drivers/reset_ioc_rdk.c (revision 992) @@ -0,0 +1,31 @@ +/** + * \file reset_ioc_rdk.c + * \date December 14, 2014 + * \author Cesar Fuguet + */ + +#include +#include +#include + +#ifndef SEG_RDK_BASE +# error "SEG_RDK_BASE constant must be defined in the hard_config.h file" +#endif + +static int* const rdk_address = (int* const)SEG_RDK_BASE; + +int reset_rdk_init() +{ + return 0; +} + +int reset_rdk_read( unsigned int lba, void* buffer, unsigned int count ) +{ + char* const src = (char* const)rdk_address + (lba * BLOCK_SIZE); + memcpy(buffer, (void*)src, count * BLOCK_SIZE); + return 0; +} + +/* + * vim: tabstop=4 : softtabstop=4 : shiftwidth=4 : expandtab + */ Index: trunk/softs/tsar_boot/drivers/reset_ioc_rdk.h =================================================================== --- trunk/softs/tsar_boot/drivers/reset_ioc_rdk.h (revision 992) +++ trunk/softs/tsar_boot/drivers/reset_ioc_rdk.h (revision 992) @@ -0,0 +1,18 @@ +/** + * \file reset_ioc_rdk.h + * \date December 14, 2014 + * \author Cesar Fuguet + */ + +#ifndef RESET_IOC_RDK_H +#define RESET_IOC_RDK_H + +int reset_rdk_init(); + +int reset_rdk_read( unsigned int lba, void* buffer, unsigned int count ); + +#endif + +/* + * vim: tabstop=4 : softtabstop=4 : shiftwidth=4 : expandtab + */ Index: trunk/softs/tsar_boot/drivers/reset_ioc_sdc.c =================================================================== --- trunk/softs/tsar_boot/drivers/reset_ioc_sdc.c (revision 992) +++ trunk/softs/tsar_boot/drivers/reset_ioc_sdc.c (revision 992) @@ -0,0 +1,303 @@ +/** + * \File : reset_ioc_sdc.c + * \Date : 31/04/2015 + * \Author : Alain Greiner + * \Copyright (c) UPMC-LIP6 + */ + +#include +#include +#include +#include +#include +#include + +#define SDC_POLLING_TIMEOUT 1000000 // Number of retries when polling PXCI + +#define SDC_RSP_TIMEOUT 100 // Number of retries for a config RSP + +/////////////////////////////////////////////////////////////////////////////////// +// AHCI related global variables +/////////////////////////////////////////////////////////////////////////////////// + +// command descriptor (one single command) +static ahci_cmd_desc_t ahci_cmd_desc __attribute__((aligned(64))); + +// command table (one single command) +static ahci_cmd_table_t ahci_cmd_table __attribute__((aligned(64))); + +// IOC/AHCI device base address +static int* const ioc_address = (int* const)SEG_IOC_BASE; + +/////////////////////////////////////////////////////////////////////////////////// +// SD Card related global variables +/////////////////////////////////////////////////////////////////////////////////// + +// SD card relative address +unsigned int sdc_rca; + +// SD Card Hih Capacity Support when non zero +unsigned int sdc_sdhc; + +/////////////////////////////////////////////////////////////////////////////// +// This function sends a command to the SD card and returns the response. +// - index : CMD index +// - arg : CMD argument +// - return Card response +/////////////////////////////////////////////////////////////////////////////// +static unsigned int reset_sdc_send_cmd ( unsigned int index, + unsigned int arg ) +{ + unsigned int sdc_rsp; + register int iter = 0; + + // load argument + iowrite32( &ioc_address[SDC_CMD_ARG] , arg ); + + // lauch command + iowrite32( &ioc_address[SDC_CMD_ID] , index ); + + // get response + do + { + sdc_rsp = ioread32( &ioc_address[SDC_RSP_STS] ); + iter++; + } + while ( (sdc_rsp == 0xFFFFFFFF) && (iter < SDC_RSP_TIMEOUT) ); + + return sdc_rsp; +} + +///////////////////////////////////////////////////////////////////////////////// +// Extern functions +///////////////////////////////////////////////////////////////////////////////// + +/////////////////////////////////////////////////////////////////////////////// +// This function initialises both the SD Card and the AHCI registers and +// memory structures used by the AHCI_SDC peripheral (one single command). +/////////////////////////////////////////////////////////////////////////////// +unsigned int reset_sdc_init() +{ + //////////// SD Card initialisation ////////// + + unsigned int rsp; + + // define the SD card clock period + iowrite32( &ioc_address[SDC_PERIOD] , 2 ); + + // send CMD0 command (soft reset / no argument) + rsp = reset_sdc_send_cmd( SDC_CMD0 , 0 ); + if ( rsp == 0xFFFFFFFF ) + { + reset_puts("\n[RESET ERROR] in reset_sdc_init() : no aknowledge to CMD0\n"); + return 1; + } + +#if RESET_DEBUG +reset_puts("\n[DEBUG SDC] reset_sdc_init() : SDC_CMD0 done\n"); +#endif + + // send CMD8 command + rsp = reset_sdc_send_cmd( SDC_CMD8 , SDC_CMD8_ARGUMENT ); + if ( rsp == 0xFFFFFFFF ) + { + reset_puts("\n[RESET ERROR] in reset_sdc_init() : no response to CMD8\n"); + return 1; + } + else if ( rsp != SDC_CMD8_ARGUMENT ) + { + reset_puts("\n[RESET ERROR] in reset_sdc_init() : bad response to CMD8\n"); + return 1; + } + +#if RESET_DEBUG +reset_puts("\n[DEBUG SDC] reset_sdc_init() : SDC_CMD8 done\n"); +#endif + + // send CMD41 command to get SDHC + rsp = reset_sdc_send_cmd( SDC_CMD41 , SDC_CMD41_ARGUMENT ); + if ( rsp == 0xFFFFFFFF ) + { + reset_puts("\n[RESET ERROR] in reset_sdc_init() : no response to CMD41\n"); + return 1; + } + sdc_sdhc = ( (rsp & SDC_CMD41_RSP_CCS) != 0 ); + +#if RESET_DEBUG +reset_puts("\n[DEBUG SDC] reset_sdc_init() : SDC_CMD41 done / sdhc = "); +reset_putd( sdc_sdhc ); +reset_puts("\n"); +#endif + + // send CMD3 to get RCA + rsp = reset_sdc_send_cmd( SDC_CMD3 , 0 ); + if ( rsp == 0xFFFFFFFF ) + { + reset_puts("\n[RESET ERROR] in reset_sdc_init() : no response to CMD3\n"); + return 1; + } + sdc_rca = rsp; + +#if RESET_DEBUG +reset_puts("\n[DEBUG SDC] reset_sdc_init() : SDC_CMD3 done / rca = "); +reset_putd( sdc_rca ); +reset_puts("\n"); +#endif + + // send CMD7 + rsp = reset_sdc_send_cmd( SDC_CMD7 , sdc_rca ); + if ( rsp == 0xFFFFFFFF ) + { + reset_puts("\n[RESET ERROR] in reset_sdc_init() : no response to CMD7\n"); + return 1; + } + +#if RESET_DEBUG +reset_puts("\n[DEBUG SDC] reset_sdc_init() : SDC_CMD7 done\n"); +#endif + + //////////// AHCI interface initialisation /////// + + // initialise the command descriptor + ahci_cmd_desc.ctba = (unsigned int)&ahci_cmd_table; + ahci_cmd_desc.ctbau = 0; + +#if USE_IOB + // update external memory for the commande descriptor + reset_L2_sync( &ahci_cmd_desc , sizeof( ahci_cmd_desc_t ) ); +#endif + + // initialise AHCI registers + iowrite32( &ioc_address[AHCI_PXCLB] , (unsigned int)&ahci_cmd_desc ); + iowrite32( &ioc_address[AHCI_PXCLBU] , 0 ); + iowrite32( &ioc_address[AHCI_PXIE] , 0 ); + iowrite32( &ioc_address[AHCI_PXIS] , 0 ); + iowrite32( &ioc_address[AHCI_PXCI] , 0 ); + iowrite32( &ioc_address[AHCI_PXCMD] , 1 ); + +#if RESET_DEBUG +reset_puts("\n[DEBUG SDC] reset_sdc_init() : AHCI init done\n"); +#endif + + return 0; + +} // end reset_sdc_init() + + +/////////////////////////////////////////////////////////////////////////////// +// This function register one command in both the command descriptor +// and the command data, and updates the HBA_PXCI register. +// The addresses are supposed to be identity mapping (vaddr == paddr). +// return 0 if success, -1 if error +/////////////////////////////////////////////////////////////////////////////// +unsigned int reset_sdc_read( unsigned int lba, + void* buffer, + unsigned int count ) +{ + unsigned int pxci; // AHCI_PXCI register value + unsigned int pxis; // AHCI_PXIS register value + +#if RESET_DEBUG +reset_puts("\n[DEBUG SDC] reset_sdc_read() : buffer = "); +reset_putx( (unsigned int)buffer ); +reset_puts(" / nblocks = "); +reset_putd( count ); +reset_puts(" / lba = "); +reset_putd( lba ); +reset_puts("\n"); +#endif + + // check buffer alignment + if( (unsigned int)buffer & 0x3F ) + { + reset_puts("\n[SDC ERROR] in reset_sdc_read() : buffer not 64 bytes aligned\n"); + return 1; + } + + // set command header: lba value + ahci_cmd_table.header.lba0 = (char)lba; + ahci_cmd_table.header.lba1 = (char)(lba>>8); + ahci_cmd_table.header.lba2 = (char)(lba>>16); + ahci_cmd_table.header.lba3 = (char)(lba>>24); + ahci_cmd_table.header.lba4 = 0; + ahci_cmd_table.header.lba5 = 0; + + // set command buffer: address and size) + ahci_cmd_table.buffer.dba = (unsigned int)(buffer); + ahci_cmd_table.buffer.dbau = 0; + ahci_cmd_table.buffer.dbc = count*512; + + // set command descriptor: one single buffer / read access + ahci_cmd_desc.prdtl[0] = 1; + ahci_cmd_desc.prdtl[1] = 0; + ahci_cmd_desc.flag[0] = 0; // read + +#if RESET_DEBUG +reset_puts("\n[DEBUG SDC] reset_sdc_read() : command registered\n"); +#endif + +#if USE_IOB + // update external memory for command table + reset_L2_sync( &ahci_cmd_table , 32 ); + + // update external memory for command descriptor + reset_L2_sync( &ahci_cmd_desc , 16 ); +#endif + + // start transfer + iowrite32( &ioc_address[AHCI_PXCI] , 1 ); + +#if RESET_DEBUG +reset_puts("\n[DEBUG SDC] reset_sdc_read() : AHCI_SDC activated at cycle "); +reset_putd( proctime() ); +reset_puts("\n"); +#endif + +#if (RESET_HARD_CC == 0) || USE_IOB + // inval buffer in L1 cache + reset_L1_inval( buffer , count * 512 ); +#endif + +#if USE_IOB + // inval buffer in L2 cache + reset_L2_inval( buffer , count * 512 ); +#endif + + // poll PXCI until command completed by AHCI + unsigned int iter = SDC_POLLING_TIMEOUT; + do + { + pxci = ioread32( &ioc_address[AHCI_PXCI] ); + iter--; + if (iter == 0 ) + { + reset_puts("\n[SDC ERROR] in reset_sdc_read() : polling PXCI timeout\n"); + return 1; + } + } + while( pxci ); + + // get PXIS register + pxis = ioread32( &ioc_address[AHCI_PXIS] ); + + // reset PXIS register + iowrite32( &ioc_address[AHCI_PXIS] , 0 ); + + // check error status + if ( pxis & 0x40000000 ) + { + reset_puts("\n[RESET ERROR] in reset_sdc_read() : status error\n"); + return 1; + } + + return 0; + +} // end reset_sdc_read() + +// Local Variables: +// tab-width: 4 +// c-basic-offset: 4 +// c-file-offsets:((innamespace . 0)(inline-open . 0)) +// indent-tabs-mode: nil +// End: +// vim: filetype=c:expandtab:shiftwidth=4:tabstop=4:softtabstop=4 Index: trunk/softs/tsar_boot/drivers/reset_ioc_sdc.h =================================================================== --- trunk/softs/tsar_boot/drivers/reset_ioc_sdc.h (revision 992) +++ trunk/softs/tsar_boot/drivers/reset_ioc_sdc.h (revision 992) @@ -0,0 +1,151 @@ +/** + * \File : reset_ioc_sdc.h + * \Date : 31/O4/2015 + * \Author : alain greiner + * \Copyright (c) UPMC-LIP6 + */ + +/////////////////////////////////////////////////////////////////////////////////// +// This driver supports the SocLib VciAhciSdc component, that is a single channel, +// block oriented, SD card contrÃŽler, respecting the AHCI standard. +// This driver supports only SD Cards V2 and higher, and the block +// size must be 512 bytes. +/////////////////////////////////////////////////////////////////////////////////// + +#ifndef _RESET_SDC_IOC_H_ +#define _RESET_SDC_IOC_H_ + +///////////////////////////////////////////////////////////////////////////// +// SDC Addressable Registers (up to 64 registers) +///////////////////////////////////////////////////////////////////////////// + +enum SoclibSdcRegisters +{ + SDC_PERIOD = 32, // system cycles / Write-Only + SDC_CMD_ID = 33, // command index / Write-Only + SDC_CMD_ARG = 34, // command argument / Write-Only + SDC_RSP_STS = 35, // response status / Read-Only +}; + +///////////////////////////////////////////////////////////////////////////// +// Software supported SDC commands +///////////////////////////////////////////////////////////////////////////// + +enum SoclibSdcCommands +{ + SDC_CMD0 = 0, // Soft reset + SDC_CMD3 = 3, // Relative Card Address + SDC_CMD7 = 7, // Toggle mode + SDC_CMD8 = 8, // Voltage info + SDC_CMD41 = 41, // Operation Condition +}; + +enum SoclibSdcErrorCodes +{ + SDC_ERROR_LBA = 0x40000000, // LBA larger tnan SD card capacity + SDC_ERROR_CRC = 0x00800000, // CRC error reported by SD card + SDC_ERROR_CMD = 0x00400000, // command notsupported by SD card +}; + +/////////////////////////////////////////////////////////////////////////////// +// Various SD Card constants +/////////////////////////////////////////////////////////////////////////////// + +#define SDC_CMD8_ARGUMENT 0x00000155 // VHS = 2.7-3.6 V / check = 0x55 +#define SDC_CMD41_ARGUMENT 0x40000000 // High Capacity Host Support +#define SDC_CMD41_RSP_BUSY 0x80000000 // Card Busy when 0 +#define SDC_CMD41_RSP_CCS 0x40000000 // High Capacity when 1 + +///////////////////////////////////////////////////////////////////////////// +// AHCI Addressable Registers +///////////////////////////////////////////////////////////////////////////// + +enum SoclibAhciRegisters +{ + AHCI_PXCLB = 0, // command list base address 32 LSB bits + AHCI_PXCLBU = 1, // command list base address 32 MSB bits + AHCI_PXIS = 4, // interrupt status + AHCI_PXIE = 5, // interrupt enable + AHCI_PXCMD = 6, // run + AHCI_PXCI = 14, // command bit-vector +}; + +///////////////////////////////////////////////////////////////////////////// +// AHCI structures for Command List +///////////////////////////////////////////////////////////////////////////// + +/////// command descriptor /////////////////////// +typedef struct ahci_cmd_desc_s // size = 16 bytes +{ + unsigned char flag[2]; // W in bit 6 of flag[0] + unsigned char prdtl[2]; // Number of buffers + unsigned int prdbc; // Number of bytes actually transfered + unsigned int ctba; // Command Table base address 32 LSB bits + unsigned int ctbau; // Command Table base address 32 MSB bits +} ahci_cmd_desc_t; + + +///////////////////////////////////////////////////////////////////////////// +// AHCI structures for Command Table +///////////////////////////////////////////////////////////////////////////// + +/////// command header /////////////////////////////// +typedef struct ahci_cmd_header_s // size = 16 bytes +{ + unsigned int res0; // reserved + unsigned char lba0; // LBA 7:0 + unsigned char lba1; // LBA 15:8 + unsigned char lba2; // LBA 23:16 + unsigned char res1; // reserved + unsigned char lba3; // LBA 31:24 + unsigned char lba4; // LBA 39:32 + unsigned char lba5; // LBA 47:40 + unsigned char res2; // reserved + unsigned int res3; // reserved +} ahci_cmd_header_t; + +/////// Buffer Descriptor ////////////////////////// +typedef struct ahci_cmd_buffer_s // size = 16 bytes +{ + unsigned int dba; // Buffer base address 32 LSB bits + unsigned int dbau; // Buffer base address 32 MSB bits + unsigned int res0; // reserved + unsigned int dbc; // Buffer bytes count +} ahci_cmd_buffer_t; + +/////// command table ///////////////////////////////// +typedef struct ahci_cmd_table_s // size = 32 bytes +{ + ahci_cmd_header_t header; // contains LBA value + ahci_cmd_buffer_t buffer; // contains buffer descriptor +} ahci_cmd_table_t; + + +/////////////////////////////////////////////////////////////////////////////// +// This function initializes the AHCI_SDC controller and the SD Card. +// Returns 0 if success, > 0 if failure +/////////////////////////////////////////////////////////////////////////////// + +unsigned int reset_sdc_init(); + +/////////////////////////////////////////////////////////////////////////////// +// Transfer data between the block device and a memory buffer. +// - lba : first block index on the block device +// - buffer : base address of the memory buffer +// - count : number of blocks to be transfered. +// Returns 0 if success, > 0 if error. +/////////////////////////////////////////////////////////////////////////////// + +unsigned int reset_sdc_read( unsigned int lba, + void* buffer, + unsigned int count); + +#endif + +// Local Variables: +// tab-width: 4 +// c-basic-offset: 4 +// c-file-offsets:((innamespace . 0)(inline-open . 0)) +// indent-tabs-mode: nil +// End: +// vim: filetype=c:expandtab:shiftwidth=4:tabstop=4:softtabstop=4 Index: trunk/softs/tsar_boot/drivers/reset_ioc_spi.c =================================================================== --- trunk/softs/tsar_boot/drivers/reset_ioc_spi.c (revision 992) +++ trunk/softs/tsar_boot/drivers/reset_ioc_spi.c (revision 992) @@ -0,0 +1,480 @@ +/** + * \file : reset_ioc_spi.c + * \date : 30 August 2012 + * \author : Cesar Fuguet + * + * This file defines the driver of a SD Card device using an SPI controller + */ + +#include +#include +#include +#include +#include + +#ifndef SEG_IOC_BASE +#error "SEG_IOC_BASE constant must be defined in the hard_config.h file" +#endif + +static struct sdcard_dev _sdcard_device; +static struct spi_dev *const _spi_device = (struct spi_dev*)SEG_IOC_BASE; + +static const int sdcard_reset_retries = 4; +static const int spi_init_clkfreq = 200000 ; /* Hz */ +static const int spi_func_clkfreq = 10000000; /* Hz */ + +/** + * \param sdcard: Initialized pointer to the block device + * + * \return void + * + * \brief Enable SD Card select signal + */ +static void _sdcard_enable(struct sdcard_dev * sdcard) +{ + spi_ss_assert(sdcard->spi, sdcard->slave_id); +} + +/** + * \param sdcard: Initialized pointer to the block device + * + * \return void + * + * \brief Disable SD Card select signal + */ +static void _sdcard_disable(struct sdcard_dev * sdcard) +{ + spi_ss_deassert(sdcard->spi, sdcard->slave_id); +} + +/** + * \param tick_count: SD Card clock ticks number + * + * \return void + * + * \brief Enable SD Card clock + * The tick count is byte measured (1 tick, 8 clock) + */ +static void _sdcard_gen_tick(struct sdcard_dev * sdcard, unsigned int tick_count) +{ + register int i = 0; + while(i++ < tick_count) spi_put_tx(sdcard->spi, 0xFF, 0); +} + +/** + * \param sdcard: Initialized pointer to the block device + * + * \return char from the SD card + * + * \brief Get a byte from the SD Card + */ +static unsigned char _sdcard_receive_char(struct sdcard_dev * sdcard) +{ + _sdcard_gen_tick(sdcard, 1); + + return spi_get_rx(sdcard->spi, 0); +} + +/** + * \param sdcard: Initialized pointer to the block device + * + * \return sdcard response + * + * \brief Wait for a valid response after the send of a command + * This function can return if one of the next two conditions are true: + * 1. Bit valid received + * 2. Timeout (not valid bit received after SDCARD_COMMAND_TIMEOUT + * wait ticks) + */ +static unsigned char _sdcard_wait_response(struct sdcard_dev * sdcard) +{ + unsigned char sdcard_rsp; + register int iter; + + iter = 0; + sdcard_rsp = _sdcard_receive_char(sdcard); + while ( + (iter < SDCARD_COMMAND_TIMEOUT) && + !SDCARD_CHECK_R1_VALID(sdcard_rsp) + ) + { + sdcard_rsp = _sdcard_receive_char(sdcard); + iter++; + } + + return sdcard_rsp; +} + +/** + * \params sdcard: Initialized pointer to the block device + * + * \return void + * + * \brief Wait data block start marker + */ +static void _sdcard_wait_data_block(struct sdcard_dev * sdcard) +{ + while (_sdcard_receive_char(sdcard) != 0xFE); +} + +/** + * \param sdcard : Initialized pointer to block device + * \param index : SD card CMD index + * \param app : Type of command, 0 for normal command or 1 for application + * specific + * \param args : SD card CMD arguments + * + * \return response first byte + * + * \brief Send command to the SD card + */ +static int _sdcard_send_command ( + struct sdcard_dev * sdcard , + int index , + int app , + void * args , + unsigned crc7 ) +{ + unsigned char sdcard_rsp; + unsigned char * _args; + + _sdcard_gen_tick(sdcard, 5); + + if (app == SDCARD_ACMD) + { + spi_put_tx(sdcard->spi, 0x40 | 55 , 0 );/* CMD and START bit */ + spi_put_tx(sdcard->spi, 0x00 , 0 );/* Argument[0] */ + spi_put_tx(sdcard->spi, 0x00 , 0 );/* Argument[1] */ + spi_put_tx(sdcard->spi, 0x00 , 0 );/* Argument[2] */ + spi_put_tx(sdcard->spi, 0x00 , 0 );/* Argument[3] */ + spi_put_tx(sdcard->spi, 0x01 | (crc7 << 1), 0 );/* END bit */ + + sdcard_rsp = _sdcard_wait_response(sdcard); + if (SDCARD_CHECK_R1_ERROR(sdcard_rsp)) + { + return sdcard_rsp; + } + } + + _args = (unsigned char *) args; + + _sdcard_gen_tick(sdcard, 1); + + spi_put_tx(sdcard->spi, 0x40 | index , 0 ); + spi_put_tx(sdcard->spi, _args[0] , 0 ); + spi_put_tx(sdcard->spi, _args[1] , 0 ); + spi_put_tx(sdcard->spi, _args[2] , 0 ); + spi_put_tx(sdcard->spi, _args[3] , 0 ); + spi_put_tx(sdcard->spi, 0x01 | (crc7 << 1), 0 ); + + return _sdcard_wait_response(sdcard); +} + +int sdcard_dev_open(struct sdcard_dev * sdcard, struct spi_dev * spi, int ss) +{ + unsigned char args[4]; + unsigned char sdcard_rsp; + unsigned int iter, ersp; + + sdcard->spi = spi; + sdcard->slave_id = ss; + + /* + * Supply SD card ramp up time (min 74 cycles) + */ + _sdcard_gen_tick(sdcard, 10); + + /* + * Assert slave select signal + * Send CMD0 (Reset Command) + * Deassert slave select signal + */ + _sdcard_enable(sdcard); + + args[0] = 0; + args[1] = 0; + args[2] = 0; + args[3] = 0; + sdcard_rsp = _sdcard_send_command(sdcard, 0, SDCARD_CMD, args, 0x4A); + if ( sdcard_rsp != 0x01 ) + { + reset_puts("card CMD0 failed "); + return sdcard_rsp; + } + + _sdcard_disable(sdcard); + /* + * send CMD8. If card is pre-v2, It will reply with illegal command. + * Otherwise we announce sdhc support. + */ + _sdcard_enable(sdcard); + args[0] = 0; + args[1] = 0; + args[2] = 0x01; + args[3] = 0x01; + sdcard_rsp = _sdcard_send_command(sdcard, 8, SDCARD_CMD, args, 0x63); + if (!SDCARD_CHECK_R1_VALID(sdcard_rsp)) { + reset_puts("card CMD8 failed "); + return sdcard_rsp; + } + if (!SDCARD_CHECK_R1_ERROR(sdcard_rsp)) { + /* no error, command accepted. get whole reply */ + ersp = _sdcard_receive_char(sdcard); + ersp = (ersp << 8) | _sdcard_receive_char(sdcard); + ersp = (ersp << 8) | _sdcard_receive_char(sdcard); + ersp = (ersp << 8) | _sdcard_receive_char(sdcard); + if ((ersp & 0xffff) != 0x0101) { + /* voltage mismatch */ + reset_puts("card CMD8 mismatch: "); + reset_putx(ersp); + return sdcard_rsp; + } + reset_puts("v2 or later "); + sdcard->sdhc = 1; + } else if ((sdcard_rsp & SDCARD_R1_ILLEGAL_CMD) == 0) { + /* other error */ + reset_puts("card CMD8 error "); + return sdcard_rsp; + } else { + sdcard->sdhc = 0; + } + _sdcard_disable(sdcard); + /* send CMD41, enabling the card */ + _sdcard_enable(sdcard); + args[0] = sdcard->sdhc ? 0x40: 0; + args[1] = 0; + args[2] = 0; + args[3] = 0; + + iter = 0; + while( iter++ < SDCARD_COMMAND_TIMEOUT ) + { + sdcard_rsp = _sdcard_send_command(sdcard, 41, SDCARD_ACMD, args, 0x00); + if( sdcard_rsp == 0x01 ) + { + continue; + } + + break; + } + + _sdcard_disable(sdcard); + if (sdcard_rsp) { + reset_puts("SD ACMD41 failed "); + return sdcard_rsp; + } + if (sdcard->sdhc != 0) { + /* get the card capacity to see if it's really HC */ + _sdcard_enable(sdcard); + args[0] = sdcard->sdhc ? 0x40: 0; + args[1] = 0; + args[2] = 0; + args[3] = 0; + sdcard_rsp = _sdcard_send_command(sdcard, 58, SDCARD_CMD, + args, 0x00); + if (sdcard_rsp) { + reset_puts("SD CMD58 failed "); + return sdcard_rsp; + } + ersp = _sdcard_receive_char(sdcard); + ersp = (ersp << 8) | _sdcard_receive_char(sdcard); + ersp = (ersp << 8) | _sdcard_receive_char(sdcard); + ersp = (ersp << 8) | _sdcard_receive_char(sdcard); + if (ersp & 0x40000000) { + reset_puts("SDHC "); + } else { + sdcard->sdhc = 0; + } + _sdcard_disable(sdcard); + } + reset_puts("card detected "); + return 0; +} + +/////////////////////////////////////////////////////////////////////////////// +int sdcard_dev_read(struct sdcard_dev * sdcard, void * buf, unsigned int count) +{ + unsigned char args[4]; + unsigned char sdcard_rsp; + register int i; + + for (i = 0; i < 4; i++) + { + args[i] = (sdcard->access_pointer >> (32 - (i+1)*8)) & 0xFF; + } + + _sdcard_enable(sdcard); + + sdcard_rsp = _sdcard_send_command(sdcard, 17, SDCARD_CMD, args, 0x00); + if ( SDCARD_CHECK_R1_ERROR(sdcard_rsp) ) + { + _sdcard_disable(sdcard); + return sdcard_rsp; + } + + _sdcard_wait_data_block(sdcard); + + spi_get_data(sdcard->spi, buf, count); + + /* + * Get the remainder of the block bytes and the CRC16 (comes + * at the end of the data block) + */ + i = count; + while( i++ < (512 + 2) ) _sdcard_receive_char(sdcard); + + _sdcard_disable(sdcard); + + /* + * Move the access pointer to the next block + */ + sdcard->access_pointer += sdcard->block_length; + + return 0; +} + +//////////////////////////////////////////////////////////////////////////////////////// +unsigned int sdcard_dev_write(struct sdcard_dev *sdcard, void * buf, unsigned int count) +{ + return 0; +} + +/////////////////////////////////////////////////////////////////////// +void sdcard_dev_lseek(struct sdcard_dev * sdcard, unsigned int blk_pos) +{ + sdcard->access_pointer = sdcard->block_length * blk_pos; +} + +///////////////////////////////////////////////////////////////////////// +int sdcard_dev_set_blocklen(struct sdcard_dev * sdcard, unsigned int len) +{ + unsigned char args[4]; + unsigned char sdcard_rsp; + register int i; + + if (len != 512) + return 1; + + if (sdcard->sdhc) { + sdcard->block_length = 1; + return 0; + } + + for (i = 0; i < 4; i++) + args[i] = (len >> (32 - (i+1)*8)) & 0xFF; + + _sdcard_enable(sdcard); + + sdcard_rsp = _sdcard_send_command(sdcard, 16, SDCARD_CMD, args, 0x00); + if ( SDCARD_CHECK_R1_ERROR(sdcard_rsp) ) + { + _sdcard_disable(sdcard); + return sdcard_rsp; + } + + _sdcard_disable(sdcard); + + sdcard->block_length = len; + + return 0; +} + +//////////////////// +int reset_spi_init() +{ + unsigned char sdcard_rsp; + + reset_puts("Initializing block device\n\r"); + + /** + * Initializing the SPI controller + */ + spi_dev_config ( + _spi_device , + spi_init_clkfreq , + RESET_SYSTEM_CLK * 1000, + 8 , + SPI_TX_NEGEDGE , + SPI_RX_POSEDGE + ); + + /** + * Initializing the SD Card + */ + unsigned int iter = 0; + while(1) + { + reset_puts("Trying to initialize SD card... "); + + sdcard_rsp = sdcard_dev_open(&_sdcard_device, _spi_device, 0); + if (sdcard_rsp == 0) + { + reset_puts("OK\n"); + break; + } + + reset_puts("KO\n"); + reset_sleep(1000); + if (++iter >= sdcard_reset_retries) + { + reset_puts("\nERROR: During SD card reset to IDLE state\n" + "/ card response = "); + reset_putx(sdcard_rsp); + reset_puts("\n"); + reset_exit(); + } + } + + /** + * Set the block length of the SD Card + */ + sdcard_rsp = sdcard_dev_set_blocklen(&_sdcard_device, 512); + if (sdcard_rsp) + { + reset_puts("ERROR: During SD card blocklen initialization\n"); + reset_exit(); + } + + /** + * Incrementing SDCARD clock frequency for normal function + */ + spi_dev_config ( + _spi_device , + spi_func_clkfreq , + RESET_SYSTEM_CLK * 1000, + -1 , + -1 , + -1 + ); + + reset_puts("Finish block device initialization\n\r"); + + return 0; +} // end reset_spi_init() + +//////////////////////////////////////////////////////////////////////// +int reset_spi_read( unsigned int lba, void* buffer, unsigned int count ) +{ + unsigned int rsp; + unsigned int i; + + sdcard_dev_lseek(&_sdcard_device, lba); + + for(i = 0; i < count; i++) + { + unsigned char* buf = (unsigned char *) buffer + (512 * i); + + if (( rsp = sdcard_dev_read ( &_sdcard_device, buf, 512 ) )) + { + reset_puts("ERROR in reset_spi_read() in SDCARD access / code = "); + reset_putx( rsp ); + reset_puts("\n"); + return 1; + } + } + return 0; +} // end reset_spi_read() + +/* + * vim: tabstop=4 : softtabstop=4 : shiftwidth=4 : expandtab + */ Index: trunk/softs/tsar_boot/drivers/reset_ioc_spi.h =================================================================== --- trunk/softs/tsar_boot/drivers/reset_ioc_spi.h (revision 992) +++ trunk/softs/tsar_boot/drivers/reset_ioc_spi.h (revision 992) @@ -0,0 +1,199 @@ +/** + * \file reset_ioc_spi.h + * \date 30 August 2012 + * \author Cesar fuguet + * + * This file defines the driver of a SD Card device using an SPI controller + */ + +#ifndef RESET_IOC_SPI_H +#define RESET_IOC_SPI_H + +#include + +/** + * \brief SD Card type definition + */ +struct sdcard_dev +{ + /** + * SPI controller pointer + */ + struct spi_dev * spi; + + /** + * Block length of the SDCARD + */ + unsigned int block_length; + + /** + * Access pointer representing the offset in bytes used + * to read or write in the SDCARD. + * + * \note this driver is for cards SDSD, therefore this offset + * must be multiple of the block length + */ + unsigned int access_pointer; + + /** + * Slave ID. This ID represents the number of the slave select signal + * used in the hardware platform + */ + int slave_id; + + /* is the card high capacity ? */ + int sdhc; +}; + +/** + * \param sdcard : uninitialized pointer. This parameter will contain + * a pointer to the initialized block device or NULL otherwise + * \param spi : initialized pointer to the spi controller + * \param ss : slave select signal number + * + * \return 0 when initialization succeeds or an error code value otherwise. + * The error codes are defined in this header file. + * + * \brief Initialize the block device + */ + +int sdcard_dev_open(struct sdcard_dev * sdcard, struct spi_dev * spi, int ss); + +/** + * \param sdcard : Pointer to the initialized block device + * \param buf : Pointer to a memory segment wherein store + * \param count : number of bytes to read + * + * \return 0 when read succeeds or an error code value otherwise. + * The error codes are defined in this header file. + * + * \brief Read in the block device + * + * The read is made in the current block device access pointer. + * In the read succeeds, the block device access pointer is + * relocated to the next block. + */ + +int sdcard_dev_read(struct sdcard_dev * sdcard, void * buf, unsigned int count); + +/** + * \param sdcard : Pointer to the initialized block device + * \param buf : Pointer to a memory segment wherein the + * \param count : number of blocks to write + * + * \return 0 when write succeeds or an error code value otherwise. + * The error codes are defined in this header file. + * + * \brief Write in the block device + * + * The write is made in the current block device access pointer. + * In the write succeeds, the block device access pointer is + * relocated to the next block. + */ + +unsigned int sdcard_dev_write(struct sdcard_dev * sdcard, void * buf, unsigned int count); + +/** + * \param sdcard : Pointer to the initialized block device + * \param pos : Position where the block device access + * pointer must be move + * + * \return void + * + * \brief Change block device access pointer position + * + * The block device access pointer is relocated in terms of blocks + */ + +void sdcard_dev_lseek(struct sdcard_dev * sdcard, unsigned int pos); + +/** + * \param sdcard : Pointer to the initialized block device + * \param len : Block device length to set + * + * \return 0 when succeed or error code value otherwise + * + * \brief Set the block length of the device + */ + +int sdcard_dev_set_blocklen(struct sdcard_dev * sdcard, unsigned int len); + +/** + * \return 0 when succeed or error code value otherwise + * + * \brief Initialize both the SD Card and the SD Card controller + */ + +int reset_spi_init(); + +/** + * \param lba : First block index on device + * \param buffer : Destination memory buffer address + * \param count : Number of bloks to be read + * + * \return 0 when succeed or error code value otherwise + * + * \brief Transfer count blocks from device to memory + */ + +int reset_spi_read( unsigned int lba, void* buffer, unsigned int count ); + + + +/** + * SD Card constants + */ + +/** Number of retries after an unacknowledge command */ +#define SDCARD_COMMAND_TIMEOUT 100 + +/** This command is a simple SD commmand */ +#define SDCARD_CMD 0 + +/** This is an application specific command */ +#define SDCARD_ACMD 1 + +/** The transmition is done in the negative edge of the clock */ +#define SDCARD_TX_NEGEDGE 0 + +/** The transmition is done in the positive edge of the clock */ +#define SDCARD_TX_POSEDGE 1 + +/** The reception is done in the negative edge of the clock */ +#define SDCARD_RX_NEGEDGE 0 + +/** The reception is done in the positive edge of the clock */ +#define SDCARD_RX_POSEDGE 1 + +/** + * SD Card macros + */ + +/** Check if the response is valid */ +#define SDCARD_CHECK_R1_VALID(x) (~x & SDCARD_R1_RSP_VALID) ? 1 : 0 + +/** + * Check if there is an error in the response + * + * \note this macro must be used after verify that the response is + * valid + */ +#define SDCARD_CHECK_R1_ERROR(x) ( x & 0x7E) ? 1 : 0 + +/** + * SD Card Response 1 (R1) format constants + */ +#define SDCARD_R1_IN_IDLE_STATE ( 1 << 0 ) /**< \brief R1 bit 0 */ +#define SDCARD_R1_ERASE_RESET ( 1 << 1 ) /**< \brief R1 bit 1 */ +#define SDCARD_R1_ILLEGAL_CMD ( 1 << 2 ) /**< \brief R1 bit 2 */ +#define SDCARD_R1_COM_CRC_ERR ( 1 << 3 ) /**< \brief R1 bit 3 */ +#define SDCARD_R1_ERASE_SEQ_ERR ( 1 << 4 ) /**< \brief R1 bit 4 */ +#define SDCARD_R1_ADDRESS_ERR ( 1 << 5 ) /**< \brief R1 bit 5 */ +#define SDCARD_R1_PARAMETER_ERR ( 1 << 6 ) /**< \brief R1 bit 6 */ +#define SDCARD_R1_RSP_VALID ( 1 << 7 ) /**< \brief R1 bit 7 */ + +#endif + +/* + * vim: tabstop=4 : shiftwidth=4 : expandtab : softtabstop=4 + */ Index: trunk/softs/tsar_boot/drivers/reset_rdk.c =================================================================== --- trunk/softs/tsar_boot/drivers/reset_rdk.c (revision 987) +++ (revision ) @@ -1,30 +1,0 @@ -/** - * \file reset_rdk.c - * \date December 14, 2014 - * \author Cesar Fuguet - */ -#include -#include -#include - -#ifndef SEG_RDK_BASE -# error "SEG_RDK_BASE constant must be defined in the hard_config.h file" -#endif - -static int* const rdk_address = (int* const)SEG_RDK_BASE; - -int reset_rdk_init() -{ - return 0; -} - -int reset_rdk_read( unsigned int lba, void* buffer, unsigned int count ) -{ - char* const src = (char* const)rdk_address + (lba * BLOCK_SIZE); - memcpy(buffer, (void*)src, count * BLOCK_SIZE); - return 0; -} - -/* - * vim: tabstop=4 : softtabstop=4 : shiftwidth=4 : expandtab - */ Index: trunk/softs/tsar_boot/drivers/reset_rdk.h =================================================================== --- trunk/softs/tsar_boot/drivers/reset_rdk.h (revision 987) +++ (revision ) @@ -1,13 +1,0 @@ -/** - * \file reset_rdk.h - * \date December 14, 2014 - * \author Cesar Fuguet - */ - -int reset_rdk_init(); - -int reset_rdk_read( unsigned int lba, void* buffer, unsigned int count ); - -/* - * vim: tabstop=4 : softtabstop=4 : shiftwidth=4 : expandtab - */ Index: trunk/softs/tsar_boot/drivers/reset_sdc.c =================================================================== --- trunk/softs/tsar_boot/drivers/reset_sdc.c (revision 987) +++ (revision ) @@ -1,120 +1,0 @@ -/** - * \file reset_sdc.c - * \author Cesar Fuguet - * \date July 23, 2014 - * - * \brief Wrapper for the SD card and SPI drivers - */ -#include -#include -#include -#include -#include -#include - -#ifndef SEG_IOC_BASE -# error "SEG_IOC_BASE constant must be defined in the hard_config.h file" -#endif - -static struct sdcard_dev _sdcard_device; -static struct spi_dev *const _spi_device = (struct spi_dev*)SEG_IOC_BASE; - -static const int sdcard_reset_retries = 4; -static const int spi_init_clkfreq = 200000 ; /* Hz */ -static const int spi_func_clkfreq = 10000000; /* Hz */ - -int reset_sdc_init() -{ - unsigned char sdcard_rsp; - - reset_puts("Initializing block device\n\r"); - - /** - * Initializing the SPI controller - */ - spi_dev_config ( - _spi_device , - spi_init_clkfreq , - RESET_SYSTEM_CLK * 1000, - 8 , - SPI_TX_NEGEDGE , - SPI_RX_POSEDGE - ); - - /** - * Initializing the SD Card - */ - unsigned int iter = 0; - while(1) - { - reset_puts("Trying to initialize SD card... "); - - sdcard_rsp = sdcard_dev_open(&_sdcard_device, _spi_device, 0); - if (sdcard_rsp == 0) - { - reset_puts("OK\n"); - break; - } - - reset_puts("KO\n"); - reset_sleep(1000); - if (++iter >= sdcard_reset_retries) - { - reset_puts("\nERROR: During SD card reset to IDLE state\n" - "/ card response = "); - reset_putx(sdcard_rsp); - reset_puts("\n"); - reset_exit(); - } - } - - /** - * Set the block length of the SD Card - */ - sdcard_rsp = sdcard_dev_set_blocklen(&_sdcard_device, 512); - if (sdcard_rsp) - { - reset_puts("ERROR: During SD card blocklen initialization\n"); - reset_exit(); - } - - /** - * Incrementing SDCARD clock frequency for normal function - */ - spi_dev_config ( - _spi_device , - spi_func_clkfreq , - RESET_SYSTEM_CLK * 1000, - -1 , - -1 , - -1 - ); - - reset_puts("Finish block device initialization\n\r"); - - return 0; -} /* end reset_spi_init() */ - -int reset_sdc_read( unsigned int lba, void* buffer, unsigned int count ) -{ - unsigned int sdcard_rsp; - unsigned int i; - - sdcard_dev_lseek(&_sdcard_device, lba); - for(i = 0; i < count; i++) - { - unsigned char* buf = (unsigned char *) buffer + (512 * i); - if (( sdcard_rsp = sdcard_dev_read ( &_sdcard_device, buf, 512 ) )) - { - reset_puts("ERROR during read on the SDCARD device. Code: "); - reset_putx(sdcard_rsp); - reset_puts("\n"); - return 1; - } - } - return 0; -} - -/* - * vim: tabstop=4 : softtabstop=4 : shiftwidth=4 : expandtab - */ Index: trunk/softs/tsar_boot/drivers/reset_sdc.h =================================================================== --- trunk/softs/tsar_boot/drivers/reset_sdc.h (revision 987) +++ (revision ) @@ -1,25 +1,0 @@ -/** - * \file reset_sdc.h - * \author Cesar Fuguet - * \date July 23, 2014 - * - * \brief Wrapper for the SD card and SPI drivers - */ -#ifndef RESET_SDC_H -#define RESET_SDC_H - -/** - * \brief this function initializes the SD card device and the SPI controller - */ -int reset_sdc_init(); - -/** - * \brief read a block in the SD card device using the SPI controller - */ -int reset_sdc_read( unsigned int lba, void* buffer, unsigned int count ); - -#endif /* RESET_SDCARD_H */ - -/* - * vim: tabstop=4 : softtabstop=4 : shiftwidth=4 : expandtab - */ Index: trunk/softs/tsar_boot/drivers/reset_tty.c =================================================================== --- trunk/softs/tsar_boot/drivers/reset_tty.c (revision 987) +++ trunk/softs/tsar_boot/drivers/reset_tty.c (revision 992) @@ -105,5 +105,5 @@ reset_puts("\n!!! Exit Processor "); - reset_putx(pid); + reset_putx(pid & 0x3FF); reset_puts(" !!!\n"); Index: trunk/softs/tsar_boot/drivers/sdcard.c =================================================================== --- trunk/softs/tsar_boot/drivers/sdcard.c (revision 987) +++ (revision ) @@ -1,366 +1,0 @@ -/** - * \file : sdcard.c - * \date : 30 August 2012 - * \author : Cesar Fuguet - * - * This file defines the driver of a SD Card device using an SPI controller - */ - -#include -#include - -/** - * \param sdcard: Initialized pointer to the block device - * - * \return void - * - * \brief Enable SD Card select signal - */ -static void _sdcard_enable(struct sdcard_dev * sdcard) -{ - spi_ss_assert(sdcard->spi, sdcard->slave_id); -} - -/** - * \param sdcard: Initialized pointer to the block device - * - * \return void - * - * \brief Disable SD Card select signal - */ -static void _sdcard_disable(struct sdcard_dev * sdcard) -{ - spi_ss_deassert(sdcard->spi, sdcard->slave_id); -} - -/** - * \param tick_count: SD Card clock ticks number - * - * \return void - * - * \brief Enable SD Card clock - * The tick count is byte measured (1 tick, 8 clock) - */ -static void _sdcard_gen_tick(struct sdcard_dev * sdcard, unsigned int tick_count) -{ - register int i = 0; - while(i++ < tick_count) spi_put_tx(sdcard->spi, 0xFF, 0); -} - -/** - * \param sdcard: Initialized pointer to the block device - * - * \return char from the SD card - * - * \brief Get a byte from the SD Card - */ -static unsigned char _sdcard_receive_char(struct sdcard_dev * sdcard) -{ - _sdcard_gen_tick(sdcard, 1); - - return spi_get_rx(sdcard->spi, 0); -} - -/** - * \param sdcard: Initialized pointer to the block device - * - * \return sdcard response - * - * \brief Wait for a valid response after the send of a command - * This function can return if one of the next two conditions are true: - * 1. Bit valid received - * 2. Timeout (not valid bit received after SDCARD_COMMAND_TIMEOUT - * wait ticks) - */ -static unsigned char _sdcard_wait_response(struct sdcard_dev * sdcard) -{ - unsigned char sdcard_rsp; - register int iter; - - iter = 0; - sdcard_rsp = _sdcard_receive_char(sdcard); - while ( - (iter < SDCARD_COMMAND_TIMEOUT) && - !SDCARD_CHECK_R1_VALID(sdcard_rsp) - ) - { - sdcard_rsp = _sdcard_receive_char(sdcard); - iter++; - } - - return sdcard_rsp; -} - -/** - * \params sdcard: Initialized pointer to the block device - * - * \return void - * - * \brief Wait data block start marker - */ -static void _sdcard_wait_data_block(struct sdcard_dev * sdcard) -{ - while (_sdcard_receive_char(sdcard) != 0xFE); -} - -/** - * \param sdcard : Initialized pointer to block device - * \param index : SD card CMD index - * \param app : Type of command, 0 for normal command or 1 for application - * specific - * \param args : SD card CMD arguments - * - * \return response first byte - * - * \brief Send command to the SD card - */ -static int _sdcard_send_command ( - struct sdcard_dev * sdcard , - int index , - int app , - void * args , - unsigned crc7 ) -{ - unsigned char sdcard_rsp; - unsigned char * _args; - - _sdcard_gen_tick(sdcard, 5); - - if (app == SDCARD_ACMD) - { - spi_put_tx(sdcard->spi, 0x40 | 55 , 0 );/* CMD and START bit */ - spi_put_tx(sdcard->spi, 0x00 , 0 );/* Argument[0] */ - spi_put_tx(sdcard->spi, 0x00 , 0 );/* Argument[1] */ - spi_put_tx(sdcard->spi, 0x00 , 0 );/* Argument[2] */ - spi_put_tx(sdcard->spi, 0x00 , 0 );/* Argument[3] */ - spi_put_tx(sdcard->spi, 0x01 | (crc7 << 1), 0 );/* END bit */ - - sdcard_rsp = _sdcard_wait_response(sdcard); - if (SDCARD_CHECK_R1_ERROR(sdcard_rsp)) - { - return sdcard_rsp; - } - } - - _args = (unsigned char *) args; - - _sdcard_gen_tick(sdcard, 1); - - spi_put_tx(sdcard->spi, 0x40 | index , 0 ); - spi_put_tx(sdcard->spi, _args[0] , 0 ); - spi_put_tx(sdcard->spi, _args[1] , 0 ); - spi_put_tx(sdcard->spi, _args[2] , 0 ); - spi_put_tx(sdcard->spi, _args[3] , 0 ); - spi_put_tx(sdcard->spi, 0x01 | (crc7 << 1), 0 ); - - return _sdcard_wait_response(sdcard); -} - -int sdcard_dev_open(struct sdcard_dev * sdcard, struct spi_dev * spi, int ss) -{ - unsigned char args[4]; - unsigned char sdcard_rsp; - unsigned int iter, ersp; - - sdcard->spi = spi; - sdcard->slave_id = ss; - - /* - * Supply SD card ramp up time (min 74 cycles) - */ - _sdcard_gen_tick(sdcard, 10); - - /* - * Assert slave select signal - * Send CMD0 (Reset Command) - * Deassert slave select signal - */ - _sdcard_enable(sdcard); - - args[0] = 0; - args[1] = 0; - args[2] = 0; - args[3] = 0; - sdcard_rsp = _sdcard_send_command(sdcard, 0, SDCARD_CMD, args, 0x4A); - if ( sdcard_rsp != 0x01 ) - { - reset_puts("card CMD0 failed "); - return sdcard_rsp; - } - - _sdcard_disable(sdcard); - /* - * send CMD8. If card is pre-v2, It will reply with illegal command. - * Otherwise we announce sdhc support. - */ - _sdcard_enable(sdcard); - args[0] = 0; - args[1] = 0; - args[2] = 0x01; - args[3] = 0x01; - sdcard_rsp = _sdcard_send_command(sdcard, 8, SDCARD_CMD, args, 0x63); - if (!SDCARD_CHECK_R1_VALID(sdcard_rsp)) { - reset_puts("card CMD8 failed "); - return sdcard_rsp; - } - if (!SDCARD_CHECK_R1_ERROR(sdcard_rsp)) { - /* no error, command accepted. get whole reply */ - ersp = _sdcard_receive_char(sdcard); - ersp = (ersp << 8) | _sdcard_receive_char(sdcard); - ersp = (ersp << 8) | _sdcard_receive_char(sdcard); - ersp = (ersp << 8) | _sdcard_receive_char(sdcard); - if ((ersp & 0xffff) != 0x0101) { - /* voltage mismatch */ - reset_puts("card CMD8 mismatch: "); - reset_putx(ersp); - return sdcard_rsp; - } - reset_puts("v2 or later "); - sdcard->sdhc = 1; - } else if ((sdcard_rsp & SDCARD_R1_ILLEGAL_CMD) == 0) { - /* other error */ - reset_puts("card CMD8 error "); - return sdcard_rsp; - } else { - sdcard->sdhc = 0; - } - _sdcard_disable(sdcard); - /* send CMD41, enabling the card */ - _sdcard_enable(sdcard); - args[0] = sdcard->sdhc ? 0x40: 0; - args[1] = 0; - args[2] = 0; - args[3] = 0; - - iter = 0; - while( iter++ < SDCARD_COMMAND_TIMEOUT ) - { - sdcard_rsp = _sdcard_send_command(sdcard, 41, SDCARD_ACMD, args, 0x00); - if( sdcard_rsp == 0x01 ) - { - continue; - } - - break; - } - - _sdcard_disable(sdcard); - if (sdcard_rsp) { - reset_puts("SD ACMD41 failed "); - return sdcard_rsp; - } - if (sdcard->sdhc != 0) { - /* get the card capacity to see if it's really HC */ - _sdcard_enable(sdcard); - args[0] = sdcard->sdhc ? 0x40: 0; - args[1] = 0; - args[2] = 0; - args[3] = 0; - sdcard_rsp = _sdcard_send_command(sdcard, 58, SDCARD_CMD, - args, 0x00); - if (sdcard_rsp) { - reset_puts("SD CMD58 failed "); - return sdcard_rsp; - } - ersp = _sdcard_receive_char(sdcard); - ersp = (ersp << 8) | _sdcard_receive_char(sdcard); - ersp = (ersp << 8) | _sdcard_receive_char(sdcard); - ersp = (ersp << 8) | _sdcard_receive_char(sdcard); - if (ersp & 0x40000000) { - reset_puts("SDHC "); - } else { - sdcard->sdhc = 0; - } - _sdcard_disable(sdcard); - } - reset_puts("card detected "); - return 0; -} - -int sdcard_dev_read(struct sdcard_dev * sdcard, void * buf, unsigned int count) -{ - unsigned char args[4]; - unsigned char sdcard_rsp; - register int i; - - for (i = 0; i < 4; i++) - { - args[i] = (sdcard->access_pointer >> (32 - (i+1)*8)) & 0xFF; - } - - _sdcard_enable(sdcard); - - sdcard_rsp = _sdcard_send_command(sdcard, 17, SDCARD_CMD, args, 0x00); - if ( SDCARD_CHECK_R1_ERROR(sdcard_rsp) ) - { - _sdcard_disable(sdcard); - return sdcard_rsp; - } - - _sdcard_wait_data_block(sdcard); - - spi_get_data(sdcard->spi, buf, count); - - /* - * Get the remainder of the block bytes and the CRC16 (comes - * at the end of the data block) - */ - i = count; - while( i++ < (512 + 2) ) _sdcard_receive_char(sdcard); - - _sdcard_disable(sdcard); - - /* - * Move the access pointer to the next block - */ - sdcard->access_pointer += sdcard->block_length; - - return 0; -} - -unsigned int sdcard_dev_write(struct sdcard_dev *sdcard, void * buf, unsigned int count) -{ - return 0; -} - -void sdcard_dev_lseek(struct sdcard_dev * sdcard, unsigned int blk_pos) -{ - sdcard->access_pointer = sdcard->block_length * blk_pos; -} - -int sdcard_dev_set_blocklen(struct sdcard_dev * sdcard, unsigned int len) -{ - unsigned char args[4]; - unsigned char sdcard_rsp; - register int i; - - if (len != 512) - return 1; - - if (sdcard->sdhc) { - sdcard->block_length = 1; - return 0; - } - - for (i = 0; i < 4; i++) - args[i] = (len >> (32 - (i+1)*8)) & 0xFF; - - _sdcard_enable(sdcard); - - sdcard_rsp = _sdcard_send_command(sdcard, 16, SDCARD_CMD, args, 0x00); - if ( SDCARD_CHECK_R1_ERROR(sdcard_rsp) ) - { - _sdcard_disable(sdcard); - return sdcard_rsp; - } - - _sdcard_disable(sdcard); - - sdcard->block_length = len; - - return 0; -} - -/* - * vim: tabstop=4 : shiftwidth=4 : expandtab : softtabstop=4 - */ Index: trunk/softs/tsar_boot/drivers/sdcard.h =================================================================== --- trunk/softs/tsar_boot/drivers/sdcard.h (revision 987) +++ (revision ) @@ -1,172 +1,0 @@ -/** - * \file sdcard.h - * \date 30 August 2012 - * \author Cesar fuguet - * - * This file defines the driver of a SD Card device using an SPI controller - */ - -#ifndef SDCARD_H -#define SDCARD_H - -#include - -/** - * \brief SD Card type definition - */ -struct sdcard_dev -{ - /** - * SPI controller pointer - */ - struct spi_dev * spi; - - /** - * Block length of the SDCARD - */ - unsigned int block_length; - - /** - * Access pointer representing the offset in bytes used - * to read or write in the SDCARD. - * - * \note this driver is for cards SDSD, therefore this offset - * must be multiple of the block length - */ - unsigned int access_pointer; - - /** - * Slave ID. This ID represents the number of the slave select signal - * used in the hardware platform - */ - int slave_id; - - /* is the card high capacity ? */ - int sdhc; -}; - -/** - * \param sdcard : uninitialized pointer. This parameter will contain - * a pointer to the initialized block device or NULL otherwise - * \param spi : initialized pointer to the spi controller - * \param ss : slave select signal number - * - * \return 0 when initialization succeeds or an error code value otherwise. - * The error codes are defined in this header file. - * - * \brief Initialize the block device - */ -int sdcard_dev_open(struct sdcard_dev * sdcard, struct spi_dev * spi, int ss); - -/** - * \param sdcard : Pointer to the initialized block device - * \param buf : Pointer to a memory segment wherein store - * \param count : number of bytes to read - * - * \return 0 when read succeeds or an error code value otherwise. - * The error codes are defined in this header file. - * - * \brief Read in the block device - * - * The read is made in the current block device access pointer. - * In the read succeeds, the block device access pointer is - * relocated to the next block. - */ -int sdcard_dev_read(struct sdcard_dev * sdcard, void * buf, unsigned int count); - -/** - * \param sdcard : Pointer to the initialized block device - * \param buf : Pointer to a memory segment wherein the - * \param count : number of blocks to write - * - * \return 0 when write succeeds or an error code value otherwise. - * The error codes are defined in this header file. - * - * \brief Write in the block device - * - * The write is made in the current block device access pointer. - * In the write succeeds, the block device access pointer is - * relocated to the next block. - */ -unsigned int sdcard_dev_write(struct sdcard_dev * sdcard, void * buf, unsigned int count); - -/** - * \param sdcard : Pointer to the initialized block device - * \param pos : Position where the block device access - * pointer must be move - * - * \return void - * - * \brief Change block device access pointer position - * - * The block device access pointer is relocated in terms of blocks - */ -void sdcard_dev_lseek(struct sdcard_dev * sdcard, unsigned int pos); - -/** - * \param sdcard : Pointer to the initialized block device - * \param len : Block device length to set - * - * \return 0 when succeed or error code value otherwise - * - * \brief Set the block length of the device - */ -int sdcard_dev_set_blocklen(struct sdcard_dev * sdcard, unsigned int len); - -/** - * SD Card constants - */ - -/** Number of retries after an unacknowledge command */ -#define SDCARD_COMMAND_TIMEOUT 100 - -/** This command is a simple SD commmand */ -#define SDCARD_CMD 0 - -/** This is an application specific command */ -#define SDCARD_ACMD 1 - -/** The transmition is done in the negative edge of the clock */ -#define SDCARD_TX_NEGEDGE 0 - -/** The transmition is done in the positive edge of the clock */ -#define SDCARD_TX_POSEDGE 1 - -/** The reception is done in the negative edge of the clock */ -#define SDCARD_RX_NEGEDGE 0 - -/** The reception is done in the positive edge of the clock */ -#define SDCARD_RX_POSEDGE 1 - -/** - * SD Card macros - */ - -/** Check if the response is valid */ -#define SDCARD_CHECK_R1_VALID(x) (~x & SDCARD_R1_RSP_VALID) ? 1 : 0 - -/** - * Check if there is an error in the response - * - * \note this macro must be used after verify that the response is - * valid - */ -#define SDCARD_CHECK_R1_ERROR(x) ( x & 0x7E) ? 1 : 0 - -/** - * SD Card Response 1 (R1) format constants - */ -#define SDCARD_R1_IN_IDLE_STATE ( 1 << 0 ) /**< \brief R1 bit 0 */ -#define SDCARD_R1_ERASE_RESET ( 1 << 1 ) /**< \brief R1 bit 1 */ -#define SDCARD_R1_ILLEGAL_CMD ( 1 << 2 ) /**< \brief R1 bit 2 */ -#define SDCARD_R1_COM_CRC_ERR ( 1 << 3 ) /**< \brief R1 bit 3 */ -#define SDCARD_R1_ERASE_SEQ_ERR ( 1 << 4 ) /**< \brief R1 bit 4 */ -#define SDCARD_R1_ADDRESS_ERR ( 1 << 5 ) /**< \brief R1 bit 5 */ -#define SDCARD_R1_PARAMETER_ERR ( 1 << 6 ) /**< \brief R1 bit 6 */ -#define SDCARD_R1_RSP_VALID ( 1 << 7 ) /**< \brief R1 bit 7 */ - -#endif - -/* - * vim: tabstop=4 : shiftwidth=4 : expandtab : softtabstop=4 - */ Index: trunk/softs/tsar_boot/include/reset_ioc.h =================================================================== --- trunk/softs/tsar_boot/include/reset_ioc.h (revision 987) +++ trunk/softs/tsar_boot/include/reset_ioc.h (revision 992) @@ -9,4 +9,5 @@ * on the USE_IOC_BDV, USE_IOC_SDC or USE_IOC_HBA USE_IOC_RDK flags */ + #ifndef RESET_IOC_H #define RESET_IOC_H Index: trunk/softs/tsar_boot/src/reset_elf_loader.c =================================================================== --- trunk/softs/tsar_boot/src/reset_elf_loader.c (revision 987) +++ trunk/softs/tsar_boot/src/reset_elf_loader.c (revision 992) @@ -44,5 +44,5 @@ } -#if (RESET_DEBUG == 1) +#if (RESET_DEBUG > 1) reset_display_block( (char*)&elf_header ); #endif @@ -68,5 +68,5 @@ #if (RESET_DEBUG == 1) - reset_puts("[RESET DEBUG] Loadable segment found:\n"); + reset_puts("\n[RESET DEBUG] Loadable segment found:\n"); reset_print_elf_phdr(&elf_pht[pseg]); #endif Index: trunk/softs/tsar_boot/src/reset_ioc.c =================================================================== --- trunk/softs/tsar_boot/src/reset_ioc.c (revision 987) +++ trunk/softs/tsar_boot/src/reset_ioc.c (revision 992) @@ -6,6 +6,6 @@ * \brief API for accessing the disk controller * - * \note These functions call the specific disk controller driver depending - * on the USE_IOC_BDV, USE_IOC_SDC or USE_IOC_RDK constants + * \note These functions call the specific disk controller driver depending on + * USE_IOC_BDV / USE_IOC_SDC / USE_IOC_RDK / USE_IOC_SDC / USE_IOC_SPI */ @@ -13,22 +13,26 @@ #include -#if (USE_IOC_BDV + USE_IOC_SDC + USE_IOC_RDK + USE_IOC_HBA) != 1 +#if (USE_IOC_BDV + USE_IOC_SDC + USE_IOC_RDK + USE_IOC_HBA + USE_IOC_SPI) != 1 # error "in reset_ioc.c : undefined disk controller in hard_config.h" #endif #if USE_IOC_SDC -#include +#include #endif #if USE_IOC_BDV -#include +#include #endif #if USE_IOC_RDK -#include +#include #endif #if USE_IOC_HBA -#include +#include +#endif + +#if USE_IOC_SPI +#include #endif @@ -47,4 +51,6 @@ #elif USE_IOC_HBA return reset_hba_init(); +#elif USE_IOC_SPI + return reset_spi_init(); #else # error "in reset_ioc_init.c : undefined disk controller in hard_config.h" @@ -72,4 +78,6 @@ #elif USE_IOC_HBA return reset_hba_read(lba, buffer, count); +#elif USE_IOC_SPI + return reset_spi_read(lba, buffer, count); #else # error "in reset_ioc_read.c : undefined disk controller in hard_config.h" Index: trunk/softs/tsar_boot/src/reset_utils.c =================================================================== --- trunk/softs/tsar_boot/src/reset_utils.c (revision 987) +++ trunk/softs/tsar_boot/src/reset_utils.c (revision 992) @@ -231,5 +231,5 @@ unsigned int word; - reset_puts("***********************************************************************\n"); + reset_puts("\n***********************************************************************\n"); for ( line = 0 ; line < 32 ; line++ ) { @@ -241,5 +241,5 @@ for ( word=0 ; word<4 ; word++ ) { - unsigned int byte = (line<<5) + (word<<2); + unsigned int byte = (line<<4) + (word<<2); unsigned int hexa = (buffer[byte ]<<24) | (buffer[byte+1]<<16) |