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Diff
Rev
Age
Author
Log Message
(edit)
@45
15 years
alain
Introducing an improved memory consistency in the multi-write-buffer: …
(edit)
@41
15 years
gao
Special for cc_vcache and cc_vcache_multi
(edit)
@40
15 years
gao
cc_vcache_multi added
(edit)
@39
15 years
gao
old file delete
(edit)
@38
15 years
gao
cc_vcache added
(edit)
@37
15 years
gao
Bug correction
(edit)
@35
15 years
simerabe
fixing bug : multi-inclusion control
(edit)
@33
15 years
simerabe
fixing bug : case of non initiator or non target
(edit)
@32
15 years
guthmull
Add SC randomization to V1
(edit)
@31
15 years
guthmull
Fix an issue in the select function
(edit)
@29
15 years
nipo
Fix metadata
(edit)
@26
15 years
guthmull
Update metadata
(edit)
@20
15 years
nipo
Update DSX metadata
(edit)
@19
15 years
guthmull
Fix uninitialized variable
(edit)
@18
15 years
gao
Bug correction
(edit)
@17
15 years
simerabe
updating lib components
(edit)
@14
15 years
simerabe
fixing bug related to broadcast
(edit)
@13
15 years
bouyer
Fix build with systemcass (add .read() on register access)
(edit)
@12
15 years
gao
bug correction
(edit)
@11
15 years
simerabe
adding trace for debugging
(edit)
@8
15 years
simerabe
new ring components for systemcass
(edit)
@7
15 years
guthmull
Fix same deadlock issue as in V4
(edit)
@6
15 years
guthmull
Fix the deadlock also for SC requests
(edit)
@5
15 years
guthmull
Fix a deadlock issue on the coherency network
(edit)
@4
15 years
nipo
Forgot the vci_cc_vcache_wrapper2_multi
(edit)
@2
15 years
nipo
Import TSAR modules in TSAR's own svn
(add)
@1
15 years
nipo
Create a directory for tsar modules
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