Timeline
Jan 28, 2011:
- 2:16 PM Changeset [135] by
- Initiator with bug correction in latency computing
Jan 24, 2011:
- 5:36 PM Changeset [134] by
- add multi write buffer in cc_xcache_v4
- 1:30 PM Changeset [133] by
- Platform with more parameters
Jan 21, 2011:
- 6:19 PM Changeset [132] by
- Synthetic Initiator with the latests bugs fixed
Jan 20, 2011:
- 5:37 PM Changeset [131] by
- Initiator with only one FSM for responses
- 4:27 PM Changeset [130] by
- Cleanup fsm seperated from vci fsm to evite deadlock
Jan 18, 2011:
- 7:04 PM Changeset [129] by
- 6:37 PM Changeset [128] by
- decreasing the number of registers
- 12:40 PM Changeset [127] by
- Removing useless prints
Jan 13, 2011:
- 2:02 PM Changeset [126] by
- Synthetic Initiator only with sc_signal
Jan 11, 2011:
- 4:09 PM Changeset [125] by
- Synthetic Initiator with good data to print
Jan 10, 2011:
- 3:50 PM Changeset [124] by
- Synthetic Initiator…
Jan 7, 2011:
- 1:50 PM Changeset [123] by
- Synthetic Initiator with parallel transactions
Note: See TracTimeline
for information about the timeline view.
