Context Navigation

Timeline

6:56 PM Changeset [346] by alain: New contructors for vci_mem_cache & vci_cc_vcache, as we don't need …
6:15 PM Changeset [345] by alain: Introducing the cluster component in tsarv5_generic_mmu platform.
6:07 PM Changeset [344] by alain: Introducing the tsarv5_generic_mmu platform.
10:00 AM Changeset [343] by cfuguet: Using the Xicu SOFT IRQs (IPIs). Adding them on the Xicu constructor

7:30 PM Changeset [342] by joannou: Introducing tsar_generic_mmu_dspin_coherence platform (ring dspin for …
7:08 PM Changeset [341] by joannou: In vci_cc_vcache_wrapper_dspin_coherence, DCACHE_TLB_PTE1_MISS and …
6:25 PM Changeset [340] by cfuguet: Erasing always false condition in the if statement of the …
6:23 PM Changeset [339] by cfuguet: Erasing always false condition in the if statement of the …
2:12 PM Changeset [338] by joannou: * In vci_cc_vcache_wrapper_dspin_coherence, modified both states …
1:50 PM Changeset [337] by joannou: In generic_cache_tsar, added new read function that returns 2 32bits …

2:25 PM Changeset [336] by cfuguet: Bug fix in the vci_cc_vcache_wrapper and vci_mem_cache components (and …

11:15 AM Changeset [335] by joannou: Added llsc table initialization in both vci_mem_cache and …
11:12 AM Changeset [334] by joannou: Separated stat counters resets from internal registers resets

5:40 PM Changeset [333] by joannou: - In vci_cc_vcache_wrapper_dspin_coherence : initializing …

4:21 PM Changeset [332] by joannou: Updated top.cpp in tsar_mono_mmu_dspin_coherence to respect new file …
4:06 PM Changeset [331] by joannou: Renaming all files form vci_cc_vcache_wrapper_dspin_coherence and …

10:55 AM Changeset [330] by joannou: * Commented debug in dspin_local_ring_fast_c * Added test on plen …

2:18 PM InterconnexionNetworks edited by joannou: updated table for types encoding from L2 to L1 (diff)
2:06 PM InterconnexionNetworks edited by alain: (diff)
2:04 PM InterconnexionNetworks edited by alain: (diff)
1:27 PM InterconnexionNetworks edited by alain: (diff)
1:11 PM InterconnexionNetworks edited by alain: (diff)
1:06 PM InterconnexionNetworks edited by alain: (diff)
1:01 PM InterconnexionNetworks edited by alain: (diff)
12:57 PM InterconnexionNetworks edited by alain: (diff)
12:55 PM InterconnexionNetworks edited by alain: (diff)
12:53 PM InterconnexionNetworks edited by alain: (diff)
10:56 AM WikiStart edited by alain: (diff)
10:51 AM InterconnexionNetworks edited by alain: (diff)

4:48 PM InterconnexionNetworks edited by alain: (diff)
4:33 PM InterconnexionNetworks edited by alain: (diff)
4:15 PM InterconnexionNetworks edited by alain: (diff)
3:54 PM Changeset [329] by joannou: Added test on INST/DATA for the CLACK in the …
3:51 PM InterconnexionNetworks edited by alain: (diff)
3:45 PM Changeset [328] by cfuguet: Including TYPE_CLEANUP_ACK_INST and TYPE_CLEANUP_ACK_DATA in the …

9:25 PM Changeset [327] by simerabe: introducing topcell examples using dspin ring interconnect
9:13 PM Changeset [326] by simerabe: introducing 2 new components : simple and local ring interconnect …
4:14 PM Changeset [325] by joannou: bugfix in vci_cc_vcache_wrapper_dspin_coherence : - consume fifo in …
2:41 PM Changeset [324] by joannou: updated the test_interrupt_delayslot : now testing for several delay values
10:59 AM Changeset [323] by joannou: removed unusefull flipflop r_*cache_cc_fifo_done + syntax correction …
9:52 AM Changeset [322] by cfuguet: Erasing binary generated files in tests_ccvcache_v4/test_sync from the repo

6:17 PM Changeset [321] by joannou: bugfix in vci_cc_vcache_wrapper_dspin_coherence in coherence type checking
5:33 PM Changeset [320] by cfuguet: vci_mem_cache_dspin_coherence: - Fixing typo error in …
3:38 PM Changeset [319] by cfuguet: Fix bug in vci_mem_cache_dspin_coherence. The write signal in the …
3:12 PM Changeset [318] by joannou: vci_cc_vcache_wrapper_dspin_coherence now use DspinDhccpParam::* types …
2:53 PM Changeset [317] by cfuguet: Introducing missing debug strings in the vci_mem_cache cpp file
11:00 AM Changeset [316] by joannou: Introducing new tsar_mono_mmu_dspin_coherence platform Same as …
10:43 AM Changeset [315] by joannou: Introducing new dspin interface for …

4:41 PM Changeset [314] by cfuguet: Erasing old comments in the reset.s file of the pre-loader
3:20 PM Changeset [313] by cfuguet: Erasing useless template parameters for the …

1:03 AM Changeset [312] by cfuguet: Updating width of the way index in DSPIN coherence flits. Using 2 bits …
12:24 AM Changeset [311] by cfuguet: Including GET and SET methods for the FROM_L1_BC and FROM_MC_BC bit in …

3:08 PM Changeset [310] by cfuguet: Introducing FROM_L1_BC and FROM_MC_BC in dspin param class to access …

4:14 PM Changeset [309] by joannou: Bugfix : typo in component name (was 'dhcpp', is now 'dhccp')
3:12 PM Changeset [308] by cfuguet: Fixing parameter name error in metadata of vci_mem_cache
2:45 PM Changeset [307] by cfuguet: Including vci_mem_cache v5 using dspin interface for the coherence …

Note: See TracTimeline for information about the timeline view.