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Changes between Version 10 and Version 11 of AtomicOperations

-                      v10
+                      v11
 == 1.  Goals ==
 The TSAR architecture implements atomic read-then write operations to support various software synchronization mechanisms. The constraints are the following :
+The TSAR architecture implements atomic read-then-write operations to support various software synchronization mechanisms. The constraints are the following :
  * A software program must have the possibility to read a data at address X, test this data, and write the (possibly modified) data at the same address X, with the guaranty that no other access to this data was done between the read and write access.
  * As we want to support commodity operating systems and existing software applications, any memory address can be the target of an atomic access.
  * As the atomic access can be used to implement spin-locks, the lock address must be cachable in order to benefit from the general coherence protocol, and avoid unnecessary transactions on the interconnection network.
+ * As the atomic access can be used to implement spin-locks, the lock address must be cacheable in order to benefit from the general coherence protocol, and avoid unnecessary transactions on the interconnection network.
 == 2.  LL/SC mechanism ==