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Changes between Version 21 and Version 22 of AtomicOperations

-                      v21
+                      v22
  * The '''LL/SC''' (Linked Load / Store Conditional) operation is implemented as two specific VCI transactions. As the LL/SC instructions are implemented in the MIPS32 instruction set, these instructions can be used by both the kernel code and by the application code to read a data at address X, test and modify this data, and write the modified data at the same address X, with the guaranty that no other access to this address was done between the read and the write access.
  * The '''CAS''' (Compare and Swap) operation is implemented as a specific VCI transaction. As there is no CAS instruction in the MIPS32 instruction set, this operation is only used by some hardware components such as the L1 cache controller, or by some DMA peripheral controllers.
+ * The '''CAS''' (Compare and Swap) operation is implemented as a specific VCI transaction. As there is no CAS instruction in the MIPS32 instruction set, this operation is only used by some hardware components such as the L1 cache controller.
 For both types of operation, the addresses a supposed to be aligned on 32 bits word boundaries, and the data are supposed to be 32 bits words.
+For both types of operation, the addresses is supposed to be aligned on 32 bits word boundaries, and the data are supposed to be 32 bits words.
 == 2.  LL/SC operation ==