Changes between Version 23 and Version 24 of InterconnexionNetworks
- Timestamp:
- Aug 30, 2010, 12:26:27 PM (14 years ago)
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InterconnexionNetworks
v23 v24 24 24 25 25 The X_ID, Y_ID and L_ID are coded on NX, NY, NL bits respectively. 26 The NX, NY and NL parameters are global for a given instance of the TSAR architecture, but NX & NY cannot be larger than 5 (no more than 1024 clusters), and NL cannot be larger than 4 (no more than 16 ports per cluster). 26 The NX, NY and NL parameters are global for a given instance of the TSAR architecture. NX & NY cannot be larger than 5 (no more than 1024 clusters), 27 but can be smaller, if the number of clusters is larger than 1024. NL cannot be larger than 4 (no more than 16 ports per cluster). 27 28 28 29 In order to simplify the hardware implementation of the memory coherence protocol, the L_ID values are standardized on the coherence network, and the same value is used for an initaitor port and for a target port: 29 30 30 ||COMPONENT ||L OCAL_INDEX||31 || || 32 ||Memory Cache ||0000 33 ||Processor 0 (L1 cache) ||0001 34 ||Processor 1 (L1 cache) ||0010 35 ||Processor 2 (L1 cache ||0011 36 ||Processor 3 (L1 cache) ||0100 31 ||COMPONENT ||L_ID|| 32 || || || 33 ||Memory Cache ||0000|| 34 ||Processor 0 (L1 cache) ||0001|| 35 ||Processor 1 (L1 cache) ||0010|| 36 ||Processor 2 (L1 cache ||0011|| 37 ||Processor 3 (L1 cache) ||0100|| 37 38 38 39 === 2.1 Target identification === … … 41 42 a VCI target is identified by the (NX + NY + NLADR) most significant bits of the VCI ADDRESS field : 42 43 43 || X (NX bits) || Y (NY bits) || LADR (NLADR bits) || OFFSET (40 - NX - NY - NL bits) || 44 || X || Y || LADR || OFFSET || 45 || NX bits || NY bits || NLADR bits || 40-NX-NY-NLADR || 44 46 45 47 * According to the NUMA characteristics of the TSAR architecture, there is no transcoding of the X & Y fields, that directly define the target cluster coordinates (X_INDEX, Y_INDEX). … … 51 53 a VCI initiator is identified by the VCI SRCID & RSRCID fields (NX + NY + NL bits) : 52 54 53 || X_ID (NX bits) || Y_ID (NY bits) || L_ID (NL bits) || 54 55 Therefore, the total SRCID width cannot be larger than 14 bits. 55 || X_ID || Y_ID || L_ID || 56 || NX bits || NY bits || NL bits || 57 58 Therefore, the total SRCID width cannot be larger than 14 bits. It can use less than 14 bits when the number of clusters is smaller than 1024. 56 59 57 60 == 3. Direct Network & Coherence Network == … … 116 119 * For a broadcast packet, BC = 1, and the XMIN, XMAX, YMIN, YMAX fields (5 bits each), are used by the network to limit the broadcast. 117 120 121 The DSPIN format has been designed to transport 40 bits VCI ADDRESS, and 14 bits VCI SRCID. 122 If the VCI ADDRESS use less than 40 bits (for example 32 bits), the VCI ADDRESS field is left aligned, and the LSB bits of the DSPIN field are completed with "0". 123 If the SRCID field uses less than 14 bits (NX < 5 or NY < 5), the SRCID field is left aligned, and the LSB bits of the DSPIN field are completed with "O". 124 118 125 The five types of DSPIN packets are defined below: 119 126 … … 151 158 Flit 0 : 152 159 ||EOP||XMIN||XMAX||YMIN||YMAX|| CID ||TRDID||PKTID||BC|| 153 || 1 || 5 || 5 || 5 || 5|| 10 || 4 || 4 ||1 ||160 || 1 || 5 || 5 || 5 || 5 || 10 || 4 || 4 ||1 || 154 161 Flit 1 : 155 162 ||EOP||reserved||----------------NLINE-------------------||
