Changes between Version 36 and Version 37 of InterconnexionNetworks
- Timestamp:
- Jan 14, 2013, 5:39:49 PM (12 years ago)
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InterconnexionNetworks
v36 v37 93 93 ||TRDID, RTRDID || 4 bits || 94 94 ||PKTID, RPKTID || 4 bits || 95 ||RERROR || 2 bits||95 ||RERROR || 1 bit || 96 96 97 The TSAR architecture uses two bits for the VCI RERROR field, in order to simplify the VCI/DSPIN wrapper, and to reduce the DSPIN Write Response packet length to one flit :97 The TSAR architecture uses one single bit for the VCI RERROR field, even if the DSPIN infrastructure supports 2 bits for the error field. 98 98 99 || RERROR || code ||100 | || ||101 ||READ_OK || 00 ||102 ||WRITE_OK || 10 ||103 ||READ_ERROR || 01 ||104 ||WRITE_ERROR || 11 ||105 106 99 107 100 === 3.3 DSPIN Packet format === 108 101 109 The VCI command & response packets are translated (actually serialized) to a more convenient DSPIN network format by the VCI/RING wrappers located between the VCI initiator and target components and the DSPIN network. The DSPIN command packet width is 40 bits, and the DSPIN response packet width is 33 bits. The DSPIN interconnexion network uses only the following information to route both the DSPIN packets to the proper destination:102 The VCI command & response packets are translated (actually serialized) to a more convenient DSPIN network format by the VCI/RING wrappers (in platform using the RING local interconnect) or by the VCI/DSPIN wrappers (in platforms using the XBAR local interconnect). These wrappers are located between the VCI initiator and target components and the DSPIN network. The DSPIN command packet width is 40 bits, and the DSPIN response packet width is 33 bits. The DSPIN interconnexion network uses only the following information to route both the DSPIN packets to the proper destination: 110 103 * The MSB bit is the EOP flag, defining the last flit of a DSPIN packet. 111 104 * The LSB bit of the first flit is the BC flag, defining a DSPIN broadcast packet. … … 158 151 || 1 || (5) || (34) || 159 152 160 ==== 3.3.4 DSPIN Re ad Response packet format (33 bits) ====153 ==== 3.3.4 DSPIN Response packet format (33 bits) ==== 161 154 162 A N flits VCI Read Response packet is translated to a N+1 flits DSPIN Read Response packet : 155 A single flit DSPIN Response packet is built for the following VCI response packets: 156 * a single flit VCI response packet to a WRITE command (no data transmitted), 157 * a single flit VCI response packet to a READ command, where the RDATA field has value 0, 158 * a single flit VCI response packet to a SC or CAS command, where the RDATA field has value 0, 159 160 For all other VCI response packets (multi-flits VCI response packet, or non-zero RDATA value) 161 a multi-flits DSPIN response packet is built : a N flits VCI response packet is translated to a N+1 flits DSPIN response packet. 163 162 164 163 Flit 0 :
