Changes between Version 81 and Version 82 of InterconnexionNetworks


Ignore:
Timestamp:
Aug 30, 2013, 4:10:02 PM (11 years ago)
Author:
cfuguet
Comment:

Updating coherence DSPIN packets format

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  • InterconnexionNetworks

    v81 v82  
    99 * The '''Direct Network''' implements the 40 bits TSAR physical address space supporting software driven transactions. It  transports the direct READ, WRITE, LL, SC and CAS transactions from a VCI initiator (typically a L1 cache controller) to a VCI target (typically a memory cache controller, or a memory mapped peripheral). All VCI packets are translated to DSPIN packets by specific VCI/DSPIN wrappers. There is two physically separated networks for command packets and response packets. Both networks have a two-level hierarchical structure with a local interconnect in each cluster (that can be implemented as a local crossbar, or as a local ring), and a global interconnect (implemented as a 2D mesh).
    1010
    11  * The '''Coherence Network''' is used to transport the coherence packets implementing the DHCCP coherence protocol between L2 cache controllers and L1 cache controllers. This network is not visible by the software, and does not use wrappers, as the L1 and L2 cache controllers use directly the DSPIN packet format. Here again there is two physically separated networks to transport L2-to-L1 packets, and to transport L1-to-L2 packets. Both networks have a two-level hierarchical structure with a local interconnect in each cluster (that can be implemented as a local crossbar, or as a local ring), and a global interconnect (implemented as a 2D mesh).
     11 * The '''Coherence Network''' is used to transport the coherence packets implementing the DHCCP coherence protocol between L2 cache controllers and L1 cache controllers. This network is not visible by the software, and does not use wrappers, as the L1 and L2 cache controllers use directly the DSPIN packet format. Here again there is three physically separated networks to transport L2-to-L1  packets (M2P network), to transport L1-to-L2 packets (P2M network) and to transport CLACK packets (CLACK network). These networks have a two-level hierarchical structure with a local interconnect in each cluster (that can be implemented as a local crossbar, or as a local ring), and a global interconnect (implemented as a 2D mesh).
    1212
    1313 * The '''RAM Network''' supports communications between the L2 caches and the ''tiles'' implementing the L3 cache, in case of MISS or cache line replacement in the L2 caches. It supports also the direct communication between the external peripheral that have a DMA capability (Disk controllers, or network controllers) and the L3 cache. It has a 3D mesh topology and the DSPIN flit width is 64 bits.
    1414
    15 Regarding implementation, the '''Direct Network''' and the '''coherence Network''' are physically separated for the local interconnect, as  there is four physically separated local crossbars (or local rings) transporting the ''direct command'', ''direct response'', '' coherence L1-to-L2'', ''coherence L2-to-L1'' packets.  But they are only logically separated for the global interconnect, as w euse the DSPIN virtual channels: the ''direct command'' and the ''coherence L2-to-L1'' packets are multiplexed on the same 2D mesh (40 bits DSPIN flit width). Similarly, the ''direct response'' and ''coherence L1-to-L2'' packets are multiplexed on the same 2D mesh (33 bits DSPIN flit width). The "Direct Network" and the "Coherence Network" using
     15Regarding implementation, the '''Direct Network''' and the '''Coherence Network''' are physically separated for the local interconnect, as there is five physically separated local crossbars (or local rings) transporting the ''direct command'', ''direct response'','' coherence P2M'', ''coherence M2P'' and ''coherence CLACK'' packets.  But they are only logically separated for the global interconnect, as they use the DSPIN virtual channels: the ''direct command'', the ''coherence M2P'' and the ''coherence CLACK'' packets are multiplexed on the same 2D mesh (40 bits DSPIN flit width). Similarly, the ''direct response'' and ''coherence P2M'' packets are multiplexed on the same 2D mesh (33 bits DSPIN flit width). The "Direct Network" and the "Coherence Network" using
    1616the same hardware infrastructure are also called the "INT network".
    1717
    … …  
    189189
    190190The coherence transactions are directly transmitted to the coherence network by the L1 caches and L2 caches in DSPIN format.
    191 The L2-to-L1 network uses 40 bits flits (including EOP). The L1-to-L2 network uses 33 bits flits (including EOP).
    192 Broadcast commands are only used on the L2-to-L1 network, and use the BC bit in first flit.
    193 
    194  * Other than BROADCAST, there is 6 packet types from L2 to L1 (3 bits encoding)
    195 
    196 || TYPE           || BIT2 || BIT1 || BIT0 ||
    197 ||                ||      ||      ||      ||
    198 ||UPDATE_DATA     ||  0   ||  0   ||  0   ||
    199 ||UPDATE_INS      ||  0   ||  0   ||  1   ||
    200 ||INVAL_DATA      ||  0   ||  1   ||  0   ||
    201 ||INVAL_INS       ||  0   ||  1   ||  1   ||
    202 ||CLEANUP_ACK_DATA||  1   ||  *   ||  0   ||
    203 ||CLEANUP_ACK_INS ||  1   ||  *   ||  1   ||
    204 
    205  * There is 3 packet types from L1 to L2 (2 bits encoding)
     191The M2P (L2-L1) network uses 40 bits flits (including EOP). The P2M (L1-L2) network uses 33 bits flits (including EOP).
     192The CLACK (L2-L1) network uses 40 bits (including EOP).
     193Broadcast commands are only used on the M2P network, and use the BC bit in first flit.
     194
     195 * Other than BROADCAST, there are 4 packet types on the M2P network (2 bits encoding)
    206196
    207197|| TYPE       || BIT1 || BIT0 ||
    208 ||            ||      ||      ||   
     198||            ||      ||      ||
     199||UPDATE_DATA ||  0   ||  0   ||
     200||UPDATE_INS  ||  0   ||  1   ||
     201||INVAL_DATA  ||  1   ||  0   ||
     202||INVAL_INS   ||  1   ||  1   ||
     203
     204 * There are 2 packet types on the CLACK network (1 bit encoding)
     205
     206|| TYPE       || BIT0 ||
     207||            ||      ||
     208||CLACK_DATA  ||  0   ||
     209||CLACK_INS   ||  1   ||
     210
     211 * There are 3 packet types on the P2M network (2 bits encoding)
     212
     213|| TYPE       || BIT1 || BIT0 ||
     214||            ||      ||      ||
     215||MULTI-ACK   ||  0   ||  *   ||
    209216||CLEANUP_DATA||  1   ||  0   ||
    210217||CLEANUP_INS ||  1   ||  1   ||
    211 ||MULTI-ACK   ||  0   ||  *   ||
    212 
    213 === 6.1 DSPIN MULTI-UPDATE packet format (L2-to-L1 : 40 bits) ===
     218
     219
     220=== 6.1 DSPIN MULTI-UPDATE packet format (M2P : 40 bits) ===
    214221
    215222This DSPIN packet contains 2+N flits.
    216223 * The DEST field contains the target L1 cache identifier (SRCID).
    217224 * The SOURCE field contains the source L2 cache identifier (SRCID).
    218  * The UPTID field contains the UPDATE Table index.
     225 * The TRDID field contains the UPDATE Table index.
    219226 * The WORD field contains the first modified word index.
    220227 * The NLINE field contains the cache line identifier (34 bits).
    221228
    222229Flit 0 :
    223 ||EOP||---DEST---||-res-||--SOURCE--||UPTID||TYPE||BC||
    224 ||0  || (14)     || (3) || (14)     || (4) || (3)||0 ||
     230||EOP||----DEST----||-res-||--SOURCE--||TRDID||TYPE||BC||
     231|| 0 ||    (14)    || (4) ||   (14)   || (4) || (2)||0 ||
    225232Flit 1 :
    226233||EOP||res||WORD||---------------NLINE-----------------||
    227 ||0  ||(1)|| (4)||               (34)                  ||
     234|| 0 ||(1)||(4) ||               (34)                  ||
    228235Flit 2 :
    229236||EOP||-res-||-BE-||-------------WDATA-----------------||
    230 ||0  ||(3) ||(4) ||             (32)                  ||
     237|| 0 || (3) ||(4) ||             (32)                  ||
    231238
    232239Flit N :
    233240||EOP||-res-||-BE-||-------------WDATA-----------------||
    234 ||1  ||(3) ||(4) ||             (32)                  ||
    235 
    236 === 6.2 DSPIN MULTI-INVAL packet format (L2-to-L1 : 40 bits) ===
     241|| 1 || (3) ||(4) ||             (32)                  ||
     242
     243=== 6.2 DSPIN MULTI-INVAL packet format (M2P : 40 bits) ===
    237244
    238245This DSPIN packet contains 2 flits.
    239246 * The DEST field contains the target L1 cache identifier (SRCID).
    240247 * The SOURCE field contains the source L2 cache identifier (SRCID).
    241  * The UPTID field contains the UPDATE Table index.
     248 * The TRDID field contains the INVALIDATE Table index.
    242249 * The WORD field contains the first modified word index.
    243250 * The NLINE field contains the cache line identifier (34 bits).
    244251
    245252Flit 0 :
    246 ||EOP||---DEST---||-res-||---SOURCE--||UPTID||TYPE||BC||
    247 ||0  ||   (14)   || (3) ||   (14)    || (4) || (3)||0 ||
    248 Flit 1 :
    249 ||EOP||res||WORD||---------------NLINE------------------||
    250 ||1  ||(1)|| (4)||               (34)                   ||
     253||EOP||----DEST----||-res-||--SOURCE--||TRDID||TYPE||BC||
     254|| 0 ||   (14)     || (4) ||   (14)   || (4) || (2)||0 ||
     255Flit 1 :
     256||EOP||---res---||--------------NLINE------------------||
     257|| 1 ||   (5)   ||              (34)                   ||
    251258 
    252 === 6.3 DSPIN BROADCAST packet format (L2-to-L1 : 40 bits) ===
     259=== 6.3 DSPIN BROADCAST packet format (M2P : 40 bits) ===
    253260
    254261This DSPIN packet contains 2 flits.
    … …  
    258265
    259266Flit 0 :
    260 ||EOP||XMIN||XMAX||YMIN||YMAX||--SOURCE--||-res-||BC||
    261 || 0 || (5)|| (5)|| (5)|| (5)||   (14)   || (4) || 1||
    262 Flit 1 :
    263 ||EOP||res||---------------------NLINE--------------------||
    264 || 1 ||(5)||                     (34)                     ||
    265 
    266 === 6.4 DSPIN CLEANUP-ACK packet format (L2-to-L1 : 40 bits) ===
     267||EOP||XMIN||XMAX||YMIN||YMAX||---SOURCE---||-res--||BC||
     268|| 0 ||(5) ||(5) ||(5) ||(5) ||    (14)    || (4)  ||1 ||
     269Flit 1 :
     270||EOP||---res---||------------NLINE--------------------||
     271|| 1 ||   (5)   ||            (34)                     ||
     272
     273=== 6.4 DSPIN CLACK packet format (CLACK : 40 bits) ===
    267274
    268275This DSPIN packet contains one flit.
    … …  
    272279
    273280Flit 0 :
    274 ||EOP||---DEST---||-res-||----SET-----||-WAY-||TYPE||BC||
    275 ||1  || (14)     || (3) ||    (16)    || (2) || (3)||0 ||
    276 
    277 
    278 === 6.5 DSPIN CLEANUP packet format (L1-to-L2 : 33 bits)
     281||EOP||---DEST---||--res-||----SET----||-WAY-||TYPE||BC||
     282|| 1 ||   (14)   || (15) ||    (6)    || (2) ||(1) ||0 ||
     283
     284
     285=== 6.5 DSPIN CLEANUP packet format (P2M : 33 bits)
    279286
    280287This DSPIN packet contains 2 flits.
    … …  
    286293
    287294Flit 0 :
    288 ||EOP||--DEST--||--SOURCE--||NL2||res||WAY||TYPE||BC||
    289 || 0 ||   (10) ||   (14)   ||(2)||(1)||(2)||(2) ||0 ||
    290 
    291 Flit 1 :
    292 ||EOP||---------------NL32------------------------------||
    293 ||1  ||               (32)                              ||
    294 
    295 === 6.6 DSPIN MULTI-ACK packet format (L1-2-L2 : 33 bits) ===
     295||EOP||--DEST--||---SOURCE---||NL2||res||WAY||TYPE||BC||
     296|| 0 ||  (10)  ||    (14)    ||(2)||(1)||(2)||(2) ||0 ||
     297
     298Flit 1 :
     299||EOP||--------------------NL32-----------------------||
     300|| 1 ||                    (32)                       ||
     301
     302=== 6.6 DSPIN MULTI-ACK packet format (P2M : 33 bits) ===
    296303
    297304This DSPIN packet contains one flit.
    … …  
    301308
    302309Flit 0 :
    303 ||EOP||--DEST--||--SOURCE--||res||-UPDTID-||TYPE||BC||
    304 || 1 ||   (10) ||   (14)   ||(1)|| (4)    ||(2) ||0 ||
     310||EOP||--DEST--||---SOURCE---||res||-UPDTID-||TYPE||BC||
     311|| 1 ||  (10)  ||    (14)    ||(1)||  (4)   ||(2) ||0 ||
    305312
    306313== 7. Initiators & targets on the external network ==
    … …  
    381388|| 1 || (14) ||                (44)                           || (2)  || (4)  ||
    382389
    383